Searched refs:BaseIdx (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | PseudoLoweringEmitter.cpp | 57 unsigned BaseIdx);
75 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) { in addDagOperandMapping() argument
83 OperandMap[BaseIdx + i].Kind = OpData::Reg; in addDagOperandMapping()
84 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); in addDagOperandMapping()
92 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!"); in addDagOperandMapping()
94 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) { in addDagOperandMapping()
98 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
106 OperandMap[BaseIdx + i + I].Kind = OpData::Operand; in addDagOperandMapping()
109 OperandMap[BaseIdx + i].Kind = OpData::Imm; in addDagOperandMapping()
110 OperandMap[BaseIdx + i].Data.Imm = II->getValue(); in addDagOperandMapping()
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | Store.cpp | 499 SVal BaseIdx = ElemR->getIndex(); in getLValueElement() local
501 if (!isa<nonloc::ConcreteInt>(BaseIdx)) in getLValueElement()
505 BaseIdx.castAs<nonloc::ConcreteInt>().getValue(); in getLValueElement()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | StackMaps.cpp | 469 unsigned BaseIdx = GCPtrIndices[P.first]; in parseStatepointOpers()
471 LLVM_DEBUG(dbgs() << "Base : " << BaseIdx << " Derived : " << DerivedIdx in parseStatepointOpers()
473 (void)parseOperand(MOB + BaseIdx, MOE, Locations, LiveOuts); in parseStatepointOpers()
454 unsigned BaseIdx = GCPtrIndices[P.first]; parseStatepointOpers() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 5730 SDValue BaseIdx = N->getOperand(1); in PromoteIntRes_EXTRACT_SUBVECTOR() local
5744 uint64_t IdxVal = BaseIdx->getAsZExtVal(); in PromoteIntRes_EXTRACT_SUBVECTOR()
5748 BaseIdx.getValueType())); in PromoteIntRes_EXTRACT_SUBVECTOR()
5751 DAG.getConstant(IdxVal % NElts, dl, BaseIdx.getValueType())); in PromoteIntRes_EXTRACT_SUBVECTOR()
5757 SDValue Ops[] = {GetWidenedVector(InOp0), BaseIdx}; in PromoteIntRes_EXTRACT_SUBVECTOR()
5766 SDValue Ops[] = { GetPromotedInteger(InOp0), BaseIdx }; in PromoteIntRes_EXTRACT_SUBVECTOR()
5793 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(), BaseIdx, in PromoteIntRes_EXTRACT_SUBVECTOR()
5794 DAG.getConstant(i, dl, BaseIdx.getValueType())); in PromoteIntRes_EXTRACT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | RewriteStatepointsForGC.cpp | 1539 Value *BaseIdx = Builder.getInt32(FindIndex(LiveVariables, BasePtrs[i])); in CreateGCRelocates() local
1549 GCRelocateDecl, {StatepointToken, BaseIdx, LiveIdx}, in CreateGCRelocates()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 554 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), Align) - Align; in getAlignedHighSGPRForRC() local
555 MCRegister BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx)); in getAlignedHighSGPRForRC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4985 unsigned BaseIdx = Op.getConstantOperandVal(2); in getTargetConstantBitsFromNode() local
4986 UndefSrcElts.insertBits(UndefSubElts, BaseIdx); in getTargetConstantBitsFromNode()
4988 EltSrcBits[BaseIdx + i] = EltSubBits[i]; in getTargetConstantBitsFromNode()
5005 unsigned BaseIdx = Op.getConstantOperandVal(1); in getTargetConstantBitsFromNode() local
5006 UndefElts = UndefElts.extractBits(NumSubElts, BaseIdx); in getTargetConstantBitsFromNode()
5007 if ((BaseIdx + NumSubElts) != NumSrcElts) in getTargetConstantBitsFromNode()
5008 EltBits.erase(EltBits.begin() + BaseIdx + NumSubElts, EltBits.end()); in getTargetConstantBitsFromNode()
5009 if (BaseIdx != 0) in getTargetConstantBitsFromNode()
5010 EltBits.erase(EltBits.begin(), EltBits.begin() + BaseIdx); in getTargetConstantBitsFromNode()
6208 int BaseIdx = i * NumBytesPerElt; in getFauxShuffleMask() local
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