Home
last modified time | relevance | path

Searched refs:BLTU (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.cpp336 case LoongArch::BLTU: in isBranchOffsetInRange()
506 case LoongArch::BLTU: in getOppositeBranchOpc()
509 return LoongArch::BLTU; in getOppositeBranchOpc()
H A DLoongArchInstrInfo.td824 def BLTU : BrCC_2RI16<0x68000000>;
1444 def : BccPat<setult, BLTU>;
1455 def : BccSwapPat<setugt, BLTU>;
2242 (BLTU GPR:$rd, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.cpp193 case RISCV::BLTU: in relaxInstruction()
366 case RISCV::BLTU: in getRelaxedOpcode()
H A DRISCVMCCodeEmitter.cpp239 return RISCV::BLTU; in getInvertedBranchOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMCCodeEmitter.cpp313 case LoongArch::BLTU: in getExprOpValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp540 return Xtensa::BLTU; in getBranchOpcode()
544 return Xtensa::BLTU; in getBranchOpcode()
H A DXtensaInstrInfo.td327 def BLTU : Branch_RR<0x03, "bltu", SETULT>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp526 case Mips::BLTU: in getEquivalentCompactForm()
H A DMipsInstrInfo.td2967 def BLTU : CondBranchPseudo<"bltu">;
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DEmulateInstructionRISCV.cpp53 constexpr uint32_t BLTU = 0b110; variable
178 case BLTU: in CompareB()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp861 case RISCV::BLTU: in getCondFromBranchOpc()
896 return RISCV::BLTU; in getBrCond()
1278 case RISCV::BLTU: in isBranchOffsetInRange()
H A DRISCVInstrInfo.td632 def BLTU : BranchCC_rri<0b110, "bltu">;
928 (BLTU GPR:$rt, GPR:$rs, simm13_lsb0:$offset), 0>;
1458 defm : BccPat<SETULT, BLTU>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2490 case Mips::BLTU: in tryExpandInstruction()
4001 PseudoOpcode = Mips::BLTU; in expandCondBranches()
4045 case Mips::BLTU: in expandCondBranches()
4051 ((PseudoOpcode == Mips::BLTU) || (PseudoOpcode == Mips::BLTUL)); in expandCondBranches()
4143 (IsTrgRegZero && PseudoOpcode == Mips::BLTU)) { in expandCondBranches()