Searched refs:BLGP (Results 1 – 8 of 8) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 1646 uint64_t BLGP = cast<ConstantInt>(II.getArgOperand(4))->getZExtValue(); in instCombineIntrinsic() local
1667 unsigned Src1NumElts = getFormatNumRegs(BLGP); in instCombineIntrinsic()
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| H A D | SIInstrInfo.td | 1271 def blgp : CustomOperand<i32, 1, "BLGP">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 618 unsigned BLGP,
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| H A D | AMDGPUBaseInfo.cpp | 588 unsigned BLGP, in getMFMA_F8F6F4_WithFormatArgs() argument
591 uint8_t SrcBNumRegs = mfmaScaleF8F6F4FormatToNumRegs(BLGP); in getMFMA_F8F6F4_WithFormatArgs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 999 unsigned BLGP = MI.getOperand(BlgpIdx).getImm(); in convertMAIInst() local
1002 AMDGPU::getMFMA_F8F6F4_WithFormatArgs(CBSZ, BLGP, MI.getOpcode()); in convertMAIInst()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 6600 uint64_t BLGP = cast<ConstantInt>(Call.getArgOperand(4))->getZExtValue(); in visitIntrinsicCall() local
6603 Check(BLGP <= 4, "invalid value for blgp format", Call, in visitIntrinsicCall()
6639 Check(Src1Ty->getNumElements() >= getFormatNumRegs(BLGP), in visitIntrinsicCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4426 unsigned BLGP = Inst.getOperand(BlgpIdx).getImm(); in validateMFMA() local
4440 if (Info->NumRegsSrcB != mfmaScaleF8F6F4FormatToNumRegs(BLGP)) { in validateMFMA()
4444 "wrong register tuple size for blgp value " + Twine(BLGP)); in validateMFMA()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 3340 // Note: in gfx942 BLGP argument is replaced by NEG bitfield in the DGEMM MFMA.
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