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Searched refs:BIT_7 (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/dev/qlxge/
H A Dqls_hw.h46 #define BIT_7 (0x1 << 7) macro
214 #define Q81_CTL_FUNC_SPECIFIC_EPC_O BIT_7
253 #define Q81_CTL_CONFIG_DCQ BIT_7
295 #define Q81_CTL_INTRM_MC BIT_7
475 #define Q81_CTL_RD_CAM_HIT BIT_7
514 #define Q81_WQ_ICB_FLAGS_LO BIT_7
539 #define Q81_CQ_ICB_FLAGS_LC BIT_7
575 #define Q81_RSS_ICB_FLAGS_L4K BIT_7
690 #define Q81_TX_TSO_FLAGS_IPV6 BIT_7
742 #define Q81_TX_MAC_COMP_ERR_B BIT_7
[all …]
/freebsd/sys/dev/msk/
H A Dif_mskreg.h184 #define BIT_7 (1 << 7) macro
302 #define PCI_EXT_PATCH_3 BIT_7
366 #define PCI_GAT_MAIN_PWR_N_AVAIL BIT_7 /* Main Power Not Available */
796 #define CS_ST_SW_IRQ BIT_7 /* Set IRQ SW Request */
809 #define PC_VAUX_ENA BIT_7 /* Switch VAUX Enable */
839 #define Y2_IS_PSM_ACK BIT_7 /* PSM Ack (Yukon Optima) */
933 #define Y2_STATUS_LNK2_INAC BIT_7 /* Status Link 2 inactiv (0 = activ) */
987 #define TST_FRC_DPERR_MR BIT_7 /* force DATAPERR on MST RD */
1072 #define TXA_ENA_FSYNC BIT_7 /* Enable force of sync Tx queue */
1108 #define BMU_FIFO_OP_ON BIT_7 /* FIFO Operational On */
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/freebsd/sys/dev/qlxgb/
H A Dqla_def.h45 #define BIT_7 (0x1 << 7) macro
/freebsd/sys/dev/qlxgbe/
H A Dql_def.h45 #define BIT_7 (0x1 << 7) macro
H A Dql_hw.h1043 #define Q8_GET_LINK_STAT_MAC_REMOTE_FAULT BIT_7