Searched refs:BIT_5 (Results 1 – 5 of 5) sorted by relevance
186 #define BIT_5 (1 << 5) macro304 #define PCI_EXT_PATCH_1 BIT_5368 #define PCI_GAT_PCIE_RESET_ASS BIT_5 /* PCIe Reset Asserted */798 #define CS_STOP_DONE BIT_5 /* Stop Master is finished */811 #define PC_VCC_ENA BIT_5 /* Switch VCC Enable */841 #define Y2_IS_PHY_QLNK BIT_5 /* PHY Quick Link (Yukon Optima) */874 #define Y2_IS_PAR_RD1 BIT_5 /* Read RAM parity error interrupt */935 #define Y2_COR_CLK_LNK2_DIS BIT_5 /* Disable Core clock Link 2 */989 #define TST_FRC_DPERR_TR BIT_5 /* force DATAPERR on TRG RD */1074 #define TXA_ENA_ALLOC BIT_5 /* Enable alloc of free bandwidth */[all …]
44 #define BIT_5 (0x1 << 5) macro184 #define Q81_CTL_SYSTEM_ENABLE_VQM_WR BIT_5216 #define Q81_CTL_FUNC_SPECIFIC_EC BIT_5255 #define Q81_CTL_CONFIG_LE BIT_5271 #define Q81_CTL_STATUS_PI1 BIT_5424 #define Q81_CTL_NIC_RCVC_DTP BIT_5516 #define Q81_WQ_ICB_FLAGS_LB BIT_5541 #define Q81_CQ_ICB_FLAGS_LL BIT_5736 #define Q81_TX_MAC_COMP_FLAGS_L BIT_5841 #define Q81_RX_FLAGS1_U BIT_5
43 #define BIT_5 (0x1 << 5) macro
1041 #define Q8_GET_LINK_STAT_PCS_LINK_DOWN BIT_5