Searched refs:BIT_17 (Results 1 – 5 of 5) sorted by relevance
174 #define BIT_17 (1 << 17) macro328 #define PCI_CLK_MACSEC_DIS BIT_17 /* Disable Clock MACSec. */360 #define PCI_REL_PCIE_RX_EX_IDLE BIT_17 /* PCIe Rx Exit Electrical Idle State */385 #define PCI_CF1_PRST_PHY_CLKREQ BIT_17 /* Enable PCI-E rst & PM2PHY gen. CLKREQ */417 #define PEX_RX_OV BIT_17 /* Receiver Overflow (not supported) */786 #define Y2_VMAIN_AVAIL BIT_17 /* VMAIN available (YUKON-2 only) */1965 #define GMF_ASF_RX_OVER_ON BIT_17 /* enable flushing of ASF when overrun */1990 #define GMF_WSP_TST_OFF BIT_17 /* Write Shadow Pointer Test Off */2033 #define Y2_ASF_HCU_CCSR_CLR_IRQ_HOST BIT_17 /* Clear IRQ_HOST */2092 #define GPC_DIS_125 BIT_17 /* Disable 125 MHz clock */
55 #define BIT_17 (0x1 << 17) macro
56 #define BIT_17 (0x1 << 17) macro71 #define BIT_17 (0x1 << 17) macro485 #define Q81_CTL_RD_LLDP_PKT BIT_17
959 #define Q8_PORT_CFG_BITS_XMT_DISABLE BIT_17