Searched refs:BIT_0 (Results 1 – 8 of 8) sorted by relevance
191 #define BIT_0 (1 << 0) macro308 #define PCI_USEDATA64 BIT_0 /* Use 64Bit Data bus ext */340 #define PCI_CLK_GATE_ROOT_COR_ENA BIT_0 /* Enable Gate Root Core Clock */373 #define PCI_GAT_GPHY_LINK_DOWN BIT_0 /* GPHY Link Down */390 #define PCI_CF1_ENA_TXBMU_WR_IDLE BIT_0 /* Enable TX BMU Write IDLE for ASPM */403 #define PEX_DC_EN_COR_ER_RP BIT_0 /* Enable Correctable Error Reporting */803 #define CS_RST_SET BIT_0 /* Set Software Reset */806 #define LED_STAT_OFF BIT_0 /* Status LED Off */816 #define PC_VCC_OFF BIT_0 /* Switch VCC Off */846 #define Y2_IS_CHK_TXA1 BIT_0 /* Descriptor error TXA 1 */[all …]
39 #define BIT_0 (0x1 << 0) macro189 #define Q81_CTL_SYSTEM_ENABLE_EFE BIT_0259 #define Q81_CTL_CONFIG_LRQ BIT_0276 #define Q81_CTL_STATUS_FE BIT_0301 #define Q81_CTL_INTRM_PI BIT_0431 #define Q81_CTL_NIC_RCVC_PPE BIT_0470 #define Q81_CTL_RD_BCAST BIT_0654 #define Q81_TX_MAC_FLAGS_OI BIT_0686 #define Q81_TX_TSO_FLAGS_OI BIT_0699 #define Q81_TX_TSO_VLAN_OFF_IC BIT_0[all …]
38 #define BIT_0 (0x1 << 0) macro
763 if ((val & BIT_0) == 0) in qla_flash_get_status()906 if ((val & BIT_0) == 0) in qla_flash_wait_for_write_complete()
55 if ((READ_REG32(ha, sem_reg) & BIT_0)) in qla_sem_lock()
150 data = (BIT_2|BIT_1|BIT_0); in ql_rdwr_offchip_mem()156 data = (BIT_1|BIT_0); in ql_rdwr_offchip_mem()
1009 #define Q8_GET_LINK_STAT_CFG_BITS_LINK_UP BIT_01038 #define Q8_GET_LINK_STAT_LOSS_OF_SIGNAL BIT_0