| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 62 AssertZext, enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 580 Lo = DAG.getNode(ISD::AssertZext, dl, L.getValueType(), L, N->getOperand(1)); in SplitVecRes_AssertZext()
581 Hi = DAG.getNode(ISD::AssertZext, dl, H.getValueType(), H, N->getOperand(1)); in SplitVecRes_AssertZext()
|
| H A D | SelectionDAGDumper.cpp | 116 case ISD::AssertZext: return "AssertZext"; in getOperationName()
|
| H A D | LegalizeIntegerTypes.cpp | 60 case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break; in PromoteIntegerResult()
363 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
860 ? ISD::AssertZext in PromoteIntRes_FP_TO_XINT()
2785 case ISD::AssertZext: ExpandIntRes_AssertZext(N, Lo, Hi); break; in ExpandIntegerResult()
3731 Hi = DAG.getNode(ISD::AssertZext, dl, NVT, Hi, in ExpandIntRes_AssertZext()
3735 Lo = DAG.getNode(ISD::AssertZext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertZext()
|
| H A D | SelectionDAGBuilder.cpp | 951 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl, in getCopyFromRegs()
5955 case ISD::AssertZext: in getUnderlyingArgRegs()
10398 SDValue ZExt = DAG.getNode(ISD::AssertZext, SL, Op.getValueType(), Op, in lowerRangeToAssertZExt()
11161 AssertOp = ISD::AssertZext; in LowerCallTo()
11722 AssertOp = ISD::AssertZext; in LowerArguments()
11762 if (Res.getOpcode() == ISD::AssertZext) in LowerArguments()
|
| H A D | LegalizeVectorOps.cpp | 819 NewOpc = ISD::AssertZext; in PromoteFP_TO_INT()
|
| H A D | LegalizeVectorTypes.cpp | 1071 case ISD::AssertZext: SplitVecRes_AssertZext(N, Lo, Hi); break; in SplitVectorResult()
4314 case ISD::AssertZext: Res = WidenVecRes_AssertZext(N); break; in WidenVectorResult()
5640 return DAG.getNode(ISD::AssertZext, SDLoc(N), InOp.getValueType(), InOp, in WidenVecRes_AssertZext()
|
| H A D | SelectionDAGISel.cpp | 3219 case ISD::AssertZext: in SelectCodeCommon()
|
| H A D | LegalizeDAG.cpp | 755 Result = DAG.getNode(ISD::AssertZext, dl, in LegalizeLoadOps()
3195 LHS = DAG.getNode(ISD::AssertZext, dl, OuterType, Res, in ExpandNode()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 799 def AssertZextSD: SDNode<"ISD::AssertZext", SDTAssertZext>;
800 class AssertZext<ValueType T>: PatFrag<(ops node:$A), (AssertZextSD $A, T)>;
827 defm: Cmpb_pat <A4_cmpbeqi, seteq, AssertZext<i8>, IsUGT<8,31>, 255>;
828 defm: CmpbN_pat <A4_cmpbeqi, setne, AssertZext<i8>, IsUGT<8,31>, 255>;
829 defm: Cmpb_pat <A4_cmpbgtui, setugt, AssertZext<i8>, IsUGT<32,31>, 255>;
830 defm: CmpbN_pat <A4_cmpbgtui, setule, AssertZext<i8>, IsUGT<32,31>, 255>;
831 defm: Cmpb_pat <A4_cmphgtui, setugt, AssertZext<i16>, IsUGT<32,31>, 65535>;
832 defm: CmpbN_pat <A4_cmphgtui, setule, AssertZext<i16>, IsUGT<32,31>, 65535>;
833 defm: CmpbND_pat<A4_cmpbgtui, setult, AssertZext<i8>, IsUGT<32,32>, 255>;
834 defm: CmpbND_pat<A4_cmphgtui, setult, AssertZext<i16>, IsUGT<32,32>, 65535>;
|
| H A D | HexagonISelDAGToDAG.cpp | 1680 case ISD::AssertZext: in keepsLowBits()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFragments.td | 689 // be copying from a truncate. AssertSext/AssertZext/AssertAlign aren't saying
698 N->getOpcode() != ISD::AssertZext &&
|
| H A D | X86ISelLoweringCall.cpp | 1780 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
2641 Op == ISD::AssertZext) { in MatchingStackOffset()
2647 if (TruncInput.getOpcode() == ISD::AssertZext && in MatchingStackOffset()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 249 Opcode = ISD::AssertZext; in LowerFormalArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 375 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2026 unsigned Opc = Arg->Flags.isZExt() ? ISD::AssertZext : ISD::AssertSext; in convertArgType()
3041 NewArg = DAG.getNode(ISD::AssertZext, DL, NewArg.getValueType(), NewArg, in LowerFormalArguments()
3079 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
3098 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
3286 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
7705 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Param, in lowerImplicitZextParam()
8392 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Val, in lowerWorkitemID()
11542 SDValue Ext = DAG.getNode(ISD::AssertZext, SL, VT, BFE, in performAndCombine()
11940 case ISD::AssertZext: in calculateByteProvider()
11948 Op->getOpcode() == ISD::AssertZext || in calculateByteProvider()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 471 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 481 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
827 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 312 if (TruncInput.getOpcode() == ISD::AssertZext && in MatchingStackOffset()
964 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 665 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 518 ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL}); in MipsTargetLowering()
3568 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3630 Val = DAG.getNode(ISD::AssertZext, DL, LocVT, Val, DAG.getValueType(ValVT)); in UnpackFromArgumentSlot()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1485 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
4295 Flag = DAG.getNode(ISD::AssertZext, DL, MVT::i128, Flag, in lowerXALUO()
4392 Flag = DAG.getNode(ISD::AssertZext, DL, MVT::i128, Flag, in lowerUADDSUBO_CARRY()
4717 SDValue OrigVal = DAG.getNode(ISD::AssertZext, DL, WideVT, AtomicOp.getValue(0), in lowerATOMIC_CMP_SWAP()
7164 else if (LHS->getOpcode() == ISD::AssertZext) in combineSTORE()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 664 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1486 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall_64()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1426 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 1598 if (Op0.getOpcode() == ISD::AssertZext && in lowerUINT_TO_FP()
3471 case ISD::AssertZext: { in checkValueWidth()
|