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Searched refs:ArgVT (Results 1 – 25 of 40) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp90 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments() local
92 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeFormalArguments()
130 MVT ArgVT = Outs[i].VT; in AnalyzeCallOperands() local
132 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeCallOperands()
135 << ArgVT << '\n'; in AnalyzeCallOperands()
148 MVT ArgVT = ArgVTs[i]; in AnalyzeCallOperands() local
150 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeCallOperands()
153 << ArgVT << '\n'; in AnalyzeCallOperands()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVINTERPInstructions.td88 class VOP3_VINTERP_F16_t16 <list<ValueType> ArgVT> : VOPProfile_True16<VOPProfile<ArgVT>> {
91 let Src2Mod = !if(!eq(ArgVT[3].Size, 16), FPT16VRegInputMods</*Fake16*/0>,
96 !if(!eq(ArgVT[3].Size, 16), VRegSrc_16, VRegSrc_32):$src2,
103 class VOP3_VINTERP_F16_fake16 <list<ValueType> ArgVT> : VOPProfile_Fake16<VOPProfile<ArgVT>> {
106 let Src2Mod = !if(!eq(ArgVT[3].Size, 16), FPT16VRegInputMods</*Fake16*/1>,
112 !if(!eq(ArgVT[3].Size, 16), VRegSrc_fake16, VRegSrc_32):$src2,
125 multiclass VINTERP_t16<string OpName, list<ValueType> ArgVT> {
127 def _t16 : VINTERP_Pseudo<OpName#"_t16", VOP3_VINTERP_F16_t16<ArgVT>> ;
130 def _fake16 : VINTERP_Pseudo<OpName#"_fake16", VOP3_VINTERP_F16_fake16<ArgVT>> ;
H A DAMDGPUISelLowering.cpp1252 EVT ArgVT = ValueVTs[Value]; in analyzeFormalArgumentsCompute() local
1253 EVT MemVT = ArgVT; in analyzeFormalArgumentsCompute()
1254 MVT RegisterVT = getRegisterTypeForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute()
1255 unsigned NumRegs = getNumRegistersForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute()
1259 if (ArgVT.isExtended()) { in analyzeFormalArgumentsCompute()
1264 MemVT = ArgVT; in analyzeFormalArgumentsCompute()
1266 } else if (ArgVT.isVector() && RegisterVT.isVector() && in analyzeFormalArgumentsCompute()
1267 ArgVT.getScalarType() == RegisterVT.getScalarType()) { in analyzeFormalArgumentsCompute()
1268 assert(ArgVT.getVectorNumElements() > RegisterVT.getVectorNumElements()); in analyzeFormalArgumentsCompute()
1273 } else if (ArgVT.isVector() && in analyzeFormalArgumentsCompute()
[all …]
H A DSIInstrInfo.td2568 field list<ValueType> ArgVT = _ArgVT;
2573 field ValueType DstVT = ArgVT[0];
2574 field ValueType Src0VT = ArgVT[1];
2575 field ValueType Src1VT = ArgVT[2];
2576 field ValueType Src2VT = ArgVT[3];
2770 class VOP_NO_EXT <VOPProfile p> : VOPProfile <p.ArgVT> {
2780 class VOP_PAT_GEN <VOPProfile p, int mode=PatGenMode.NoPattern> : VOPProfile <p.ArgVT> {
2787 class VOPProfile_True16<VOPProfile P> : VOPProfile<P.ArgVT> {
2820 class VOPProfile_Fake16<VOPProfile P> : VOPProfile<P.ArgVT> {
H A DAMDGPUTargetTransformInfo.cpp1327 for (auto ArgVT : ValueVTs) { in adjustInliningThresholdUsingCallee() local
1329 CB->getContext(), CB->getCallingConv(), ArgVT); in adjustInliningThresholdUsingCallee()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h42 bool IsShortVectorType(EVT ArgVT) { in IsShortVectorType() argument
43 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8; in IsShortVectorType()
60 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
74 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h202 EVT ArgVT; member
220 ArgVT = argvt; in InputArg()
240 EVT ArgVT; member
259 ArgVT = argvt; in OutputArg()
H A DBasicTTIImpl.h2465 EVT ArgVT = getTLI()->getValueType(DL, ArgTy, true); in getTypeBasedIntrinsicInstrCost() local
2469 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgVT)) in getTypeBasedIntrinsicInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp17 if (I.ArgVT == llvm::MVT::ppcf128) in PreAnalyzeCallOperands()
27 if (I.ArgVT == llvm::MVT::ppcf128) { in PreAnalyzeFormalArguments()
H A DPPCFastISel.cpp1381 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs() local
1385 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64 || ArgVT == MVT::i1 || in processCallArgs()
1419 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs() local
1432 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false)) in processCallArgs()
1434 ArgVT = DestVT; in processCallArgs()
1444 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/true)) in processCallArgs()
1446 ArgVT = DestVT; in processCallArgs()
1459 if (ArgVT == MVT::f32 || ArgVT == MVT::f64) { in processCallArgs()
1608 MVT ArgVT; in fastLowerCall() local
1609 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
[all …]
H A DPPCISelLowering.cpp4117 static unsigned CalculateStackSlotSize(EVT ArgVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotSize() argument
4119 unsigned ArgSize = ArgVT.getStoreSize(); in CalculateStackSlotSize()
4133 static Align CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
4139 if (ArgVT == MVT::v4f32 || ArgVT == MVT::v4i32 || in CalculateStackSlotAlignment()
4140 ArgVT == MVT::v8i16 || ArgVT == MVT::v16i8 || in CalculateStackSlotAlignment()
4141 ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64 || in CalculateStackSlotAlignment()
4142 ArgVT == MVT::v1i128 || ArgVT == MVT::f128) in CalculateStackSlotAlignment()
4165 Alignment = Align(ArgVT.getStoreSize()); in CalculateStackSlotAlignment()
4175 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, ISD::ArgFlagsTy Flags, in CalculateStackSlotUsed() argument
4184 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.cpp123 originalEVTTypeIsVectorFloat(Out.ArgVT)); in PreAnalyzeReturnForVectorFloat()
127 void MipsCCState::PreAnalyzeReturnValue(EVT ArgVT) { in PreAnalyzeReturnValue() argument
128 OriginalRetWasFloatVector.push_back(originalEVTTypeIsVectorFloat(ArgVT)); in PreAnalyzeReturnValue()
H A DMipsFastISel.cpp1161 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs() local
1164 firstMVT = ArgVT; in processCallArgs()
1165 if (ArgVT == MVT::f32) { in processCallArgs()
1167 } else if (ArgVT == MVT::f64) { in processCallArgs()
1175 if (ArgVT == MVT::f32) { in processCallArgs()
1177 } else if (ArgVT == MVT::f64) { in processCallArgs()
1185 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) || in processCallArgs()
1186 (ArgVT == MVT::i8)) && in processCallArgs()
1216 MVT SrcVT = ArgVT; in processCallArgs()
1224 MVT SrcVT = ArgVT; in processCallArgs()
[all …]
H A DMipsCCState.h42 void PreAnalyzeReturnValue(EVT ArgVT);
H A DMipsISelLowering.cpp3519 unsigned ValSizeInBits = Outs[OutIdx].ArgVT.getSizeInBits(); in LowerCall()
3703 unsigned ValSizeInBits = Ins[i].ArgVT.getSizeInBits(); in LowerCallResult()
3745 EVT ArgVT, const SDLoc &DL, in UnpackFromArgumentSlot() argument
3757 unsigned ValSizeInBits = ArgVT.getSizeInBits(); in UnpackFromArgumentSlot()
3873 UnpackFromArgumentSlot(ArgValue, VA, Ins[InsIdx].ArgVT, DL, DAG); in LowerFormalArguments()
3915 UnpackFromArgumentSlot(ArgValue, VA, Ins[InsIdx].ArgVT, DL, DAG); in LowerFormalArguments()
4047 unsigned ValSizeInBits = Outs[i].ArgVT.getSizeInBits(); in LowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1954 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs() local
1957 if (ArgVT.isVector() || ArgVT.getSizeInBits() > 64) in ProcessCallArgs()
1970 switch (ArgVT.SimpleTy) { in ProcessCallArgs()
2006 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs() local
2008 assert((!ArgVT.isVector() && ArgVT.getSizeInBits() <= 64) && in ProcessCallArgs()
2016 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false); in ProcessCallArgs()
2018 ArgVT = DestVT; in ProcessCallArgs()
2025 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true); in ProcessCallArgs()
2027 ArgVT = DestVT; in ProcessCallArgs()
2031 Register BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
[all …]
H A DARMISelLowering.cpp166 assert(Arg.ArgVT.isScalarInteger()); in handleCMSEValue()
167 assert(Arg.ArgVT.bitsLT(MVT::i32)); in handleCMSEValue()
168 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, Arg.ArgVT, Value); in handleCMSEValue()
2284 if (isCmseNSCall && Arg.ArgVT.isScalarInteger() && in LowerCallResult()
2285 VA.getLocVT().isScalarInteger() && Arg.ArgVT.bitsLT(MVT::i32)) in LowerCallResult()
2654 auto ArgVT = Outs[realArgIdx].ArgVT; in LowerCall() local
2655 if (isCmseNSCall && (ArgVT == MVT::f16)) { in LowerCall()
2657 auto MaskValue = APInt::getLowBitsSet(LocBits, ArgVT.getSizeInBits()); in LowerCall()
3341 auto RetVT = Outs[realRVLocIdx].ArgVT; in LowerReturn()
4709 if (AFI->isCmseNSEntryFunction() && Arg.ArgVT.isScalarInteger() && in LowerFormalArguments()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3163 EVT ArgVT = TLI.getValueType(DL, ArgTy); in fastLowerArguments() local
3164 if (!ArgVT.isSimple()) return false; in fastLowerArguments()
3165 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
3396 MVT ArgVT = OutVTs[VA.getValNo()]; in fastLowerCall() local
3398 if (ArgVT == MVT::x86mmx) in fastLowerCall()
3410 if (ArgVT == MVT::i1) in fastLowerCall()
3414 ArgVT, ArgReg); in fastLowerCall()
3416 ArgVT = VA.getLocVT(); in fastLowerCall()
3424 if (ArgVT == MVT::i1) { in fastLowerCall()
3427 ArgVT = MVT::i8; in fastLowerCall()
[all …]
H A DX86ISelLoweringCall.cpp1364 EVT ArgVT = Ins[i].ArgVT; in LowerMemArgument() local
1369 bool ScalarizedVector = ArgVT.isVector() && !VA.getLocVT().isVector(); in LowerMemArgument()
1384 int FI = MFI.CreateFixedObject(ArgVT.getStoreSize(), VA.getLocMemOffset(), in LowerMemArgument()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp378 MVT ArgVT = Args[ValNo].VT; in AnalyzeArguments() local
380 MVT LocVT = ArgVT; in AnalyzeArguments()
396 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, Align(2), ArgFlags); in AnalyzeArguments()
410 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo)); in AnalyzeArguments()
414 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
418 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo)); in AnalyzeArguments()
424 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp448 MVT ArgVT = MVT::getVT(ArgIdx.value().Ty); in canLowerReturn() local
449 if (ArgVT.isVector() && ArgVT.getVectorElementType() == MVT::i1) in canLowerReturn()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2932 EVT ArgVT = TLI.getValueType(DL, ArgTy); in fastLowerArguments() local
2933 if (!ArgVT.isSimple()) in fastLowerArguments()
2936 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments()
3031 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs() local
3043 MVT SrcVT = ArgVT; in processCallArgs()
3053 MVT SrcVT = ArgVT; in processCallArgs()
3079 unsigned ArgSize = (ArgVT.getSizeInBits() + 7) / 8; in processCallArgs()
3093 MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment); in processCallArgs()
3095 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
H A DAArch64ISelLowering.cpp5074 EVT ArgVT = Arg.getValueType(); in LowerFSINCOS() local
5075 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in LowerFSINCOS()
5086 RTLIB::Libcall LC = ArgVT == MVT::f64 ? RTLIB::SINCOS_STRET_F64 in LowerFSINCOS()
5108 EVT ArgVT = Op.getOperand(0).getValueType(); in LowerBITCAST() local
5117 if (!isTypeLegal(ArgVT)) { in LowerBITCAST()
5118 assert(OpVT.isFloatingPoint() && !ArgVT.isFloatingPoint() && in LowerBITCAST()
5126 if (OpVT.getVectorElementCount() != ArgVT.getVectorElementCount()) in LowerBITCAST()
5130 DAG.getNode(ISD::ANY_EXTEND, SDLoc(Op), getSVEContainerType(ArgVT), in LowerBITCAST()
5136 if (OpVT.getVectorElementCount() == ArgVT.getVectorElementCount()) in LowerBITCAST()
5150 if (ArgVT == MVT::f16 || ArgVT == MVT::bf16) in LowerBITCAST()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp2186 EVT ArgVT = Op.getValueType(); in ExpandLibCall() local
2187 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in ExpandLibCall()
2329 EVT ArgVT = Op.getValueType(); in ExpandBitCountingLibCall() local
2330 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in ExpandBitCountingLibCall()
2375 EVT ArgVT = Op.getValueType(); in ExpandDivRemLibCall() local
2376 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); in ExpandDivRemLibCall()
3503 EVT ArgVT = Arg.getValueType(); in ExpandNode() local
3506 SDValue RoundNode = DAG.getNode(ISD::FROUND, dl, ArgVT, Arg); in ExpandNode()
4471 EVT ArgVT = Arg.getValueType(); in ExpandNode() local
4474 SDValue RoundNode = DAG.getNode(ISD::FRINT, dl, ArgVT, Arg); in ExpandNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp6875 MVT ArgVT = Ins[i].VT; in analyzeInputArgs() local
6883 if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Ins[i].Flags, in analyzeInputArgs()
6885 LLVM_DEBUG(dbgs() << "InputArg #" << i << " has unhandled type " << ArgVT in analyzeInputArgs()
6897 MVT ArgVT = Outs[i].VT; in analyzeOutputArgs() local
6901 if (Fn(MF.getDataLayout(), ABI, i, ArgVT, CCValAssign::Full, Outs[i].Flags, in analyzeOutputArgs()
6903 LLVM_DEBUG(dbgs() << "OutputArg #" << i << " has unhandled type " << ArgVT in analyzeOutputArgs()
7420 std::max(getPrefTypeAlign(Outs[OutIdx].ArgVT, DAG), in LowerCall()

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