/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/DIA/ |
H A D | DIASession.cpp | 162 DWORD ArgSection, ArgOffset = 0; in addressForVA() local 163 if (S_OK == Session->addressForVA(VA, &ArgSection, &ArgOffset)) { in addressForVA() 165 Offset = static_cast<uint32_t>(ArgOffset); in addressForVA() 173 DWORD ArgSection, ArgOffset = 0; in addressForRVA() local 174 if (S_OK == Session->addressForRVA(RVA, &ArgSection, &ArgOffset)) { in addressForRVA() 176 Offset = static_cast<uint32_t>(ArgOffset); in addressForRVA()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULowerKernelArguments.cpp | 50 bool tryAllocPreloadSGPRs(unsigned AllocSize, uint64_t ArgOffset, in tryAllocPreloadSGPRs() argument 54 if (!isAligned(Align(4), ArgOffset) && AllocSize < 4) in tryAllocPreloadSGPRs() 58 unsigned Padding = ArgOffset - LastExplicitArgOffset; in tryAllocPreloadSGPRs()
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H A D | AMDGPUCallLowering.cpp | 542 uint64_t ArgOffset = alignTo(ExplicitArgOffset, ABIAlign) + BaseOffset; in lowerFormalArgumentsKernel() local 550 Align Alignment = commonAlignment(KernArgBaseAlign, ArgOffset); in lowerFormalArgumentsKernel() 558 lowerParameterPtr(VRegs[i][0], B, ArgOffset); in lowerFormalArgumentsKernel() 562 lowerParameterPtr(PtrReg, B, ArgOffset); in lowerFormalArgumentsKernel() 570 lowerParameter(B, OrigArg, ArgOffset, Alignment); in lowerFormalArgumentsKernel()
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H A D | AMDGPUInstructionSelector.cpp | 1814 const unsigned ArgOffset = MI.getNumExplicitDefs() + 1; in selectImageIntrinsic() local 1826 Unorm = MI.getOperand(ArgOffset + Intr->UnormIndex).getImm() != 0; in selectImageIntrinsic() 1831 if (!parseTexFail(MI.getOperand(ArgOffset + Intr->TexFailCtrlIndex).getImm(), in selectImageIntrinsic() 1835 const int Flags = MI.getOperand(ArgOffset + Intr->NumArgs).getImm(); in selectImageIntrinsic() 1866 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in selectImageIntrinsic() 1896 unsigned CPol = MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm(); in selectImageIntrinsic() 1907 MachineOperand &AddrOp = MI.getOperand(ArgOffset + I); in selectImageIntrinsic() 1996 MachineOperand &SrcOp = MI.getOperand(ArgOffset + Intr->VAddrStart + I); in selectImageIntrinsic() 2003 MIB.addReg(MI.getOperand(ArgOffset + Intr->RsrcIndex).getReg()); in selectImageIntrinsic() 2005 MIB.addReg(MI.getOperand(ArgOffset + Intr->SampIndex).getReg()); in selectImageIntrinsic()
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H A D | AMDGPULegalizerInfo.cpp | 6217 unsigned ArgOffset, in packImage16bitOpsToDwords() argument 6225 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() 6259 !MI.getOperand(ArgOffset + I + 1).isReg()) { in packImage16bitOpsToDwords() 6266 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords() 6322 const unsigned ArgOffset = NumDefs + 1; in legalizeImageIntrinsic() local 6351 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic() 6353 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic() 6361 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in legalizeImageIntrinsic() 6395 MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask); in legalizeImageIntrinsic() 6438 packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, IsG16); in legalizeImageIntrinsic() [all …]
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H A D | SIISelLowering.cpp | 2095 unsigned ArgOffset = VA.getLocMemOffset(); in lowerStackParameter() local 2098 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, true); in lowerStackParameter() 2529 unsigned ArgOffset = ArgLoc.getLocMemOffset(); in allocatePreloadKernArgSGPRs() local 2530 Align Alignment = commonAlignment(KernelArgBaseAlign, ArgOffset); in allocatePreloadKernArgSGPRs() 2541 unsigned Padding = ArgOffset - LastExplicitArgOffset; in allocatePreloadKernArgSGPRs() 2564 LastExplicitArgOffset = NumAllocSGPRs * 4 + ArgOffset; in allocatePreloadKernArgSGPRs() 7921 const unsigned ArgOffset = WithChain ? 2 : 1; in lowerImage() local 7949 DMask = Op->getConstantOperandVal(ArgOffset + Intr->DMaskIndex); in lowerImage() 7994 unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd; in lowerImage() 7999 Op.getOperand(ArgOffset + Intr->GradientStart).getSimpleValueType(); in lowerImage() [all …]
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H A D | AMDGPUISelLowering.cpp | 1171 uint64_t ArgOffset = alignTo(ExplicitArgOffset, Alignment) + ExplicitOffset; in analyzeFormalArgumentsCompute() local 1183 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset); in analyzeFormalArgumentsCompute() 5387 uint64_t ArgOffset = in getImplicitParameterOffset() local 5391 return ArgOffset; in getImplicitParameterOffset() 5393 return ArgOffset + AMDGPU::ImplicitArg::PRIVATE_BASE_OFFSET; in getImplicitParameterOffset() 5395 return ArgOffset + AMDGPU::ImplicitArg::SHARED_BASE_OFFSET; in getImplicitParameterOffset() 5397 return ArgOffset + AMDGPU::ImplicitArg::QUEUE_PTR_OFFSET; in getImplicitParameterOffset()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
H A D | MemorySanitizer.cpp | 1852 Value *getShadowPtrForArgument(IRBuilder<> &IRB, int ArgOffset) { in getShadowPtrForArgument() 1854 if (ArgOffset) in getShadowPtrForArgument() 1855 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getShadowPtrForArgument() 1860 Value *getOriginPtrForArgument(IRBuilder<> &IRB, int ArgOffset) { in getOriginPtrForArgument() 1864 if (ArgOffset) in getOriginPtrForArgument() 1865 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getOriginPtrForArgument() 1969 unsigned ArgOffset = 0; in getShadow() local 1989 bool Overflow = ArgOffset + Size > kParamTLSSize; in getShadow() 2006 Value *Base = getShadowPtrForArgument(EntryIRB, ArgOffset); in getShadow() 2015 getOriginPtrForArgument(EntryIRB, ArgOffset); in getShadow() [all …]
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H A D | DataFlowSanitizer.cpp | 628 Value *getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB); 1791 Value *DFSanFunction::getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB) { in getArgTLS() argument 1793 if (ArgOffset) in getArgTLS() 1794 Base = IRB.CreateAdd(Base, ConstantInt::get(DFS.IntptrTy, ArgOffset)); in getArgTLS() 1845 unsigned ArgOffset = 0; in getShadowForTLSArgument() local 1856 ArgOffset += alignTo(Size, ShadowTLSAlignment); in getShadowForTLSArgument() 1857 if (ArgOffset > ArgTLSSize) in getShadowForTLSArgument() 1862 if (ArgOffset + Size > ArgTLSSize) in getShadowForTLSArgument() 1867 Value *ArgShadowPtr = getArgTLS(FArg.getType(), ArgOffset, IRB); in getShadowForTLSArgument() 3381 unsigned ArgOffset = 0; in visitCallBase() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 4162 unsigned ParamAreaSize, unsigned &ArgOffset, in CalculateStackSlotUsed() argument 4170 ArgOffset = alignTo(ArgOffset, Alignment); in CalculateStackSlotUsed() 4173 if (ArgOffset >= LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 4177 ArgOffset += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); in CalculateStackSlotUsed() 4179 ArgOffset = ((ArgOffset + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; in CalculateStackSlotUsed() 4182 if (ArgOffset > LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 4362 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments_32SVR4() local 4364 ArgOffset += ArgSize - ObjSize; in LowerFormalArguments_32SVR4() 4365 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, isImmutable); in LowerFormalArguments_32SVR4() 4553 unsigned ArgOffset = LinkageSize; in LowerFormalArguments_64SVR4() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 589 unsigned ArgOffset = CCInfo.getStackSize(); in LowerFormalArguments_32() local 591 ArgOffset += StackOffset; in LowerFormalArguments_32() 593 assert(!ArgOffset); in LowerFormalArguments_32() 594 ArgOffset = 68+4*NumAllocated; in LowerFormalArguments_32() 598 FuncInfo->setVarArgsFrameOffset(ArgOffset); in LowerFormalArguments_32() 607 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, ArgOffset, in LowerFormalArguments_32() 613 ArgOffset += 4; in LowerFormalArguments_32() 707 unsigned ArgOffset = CCInfo.getStackSize(); in LowerFormalArguments_64() local 710 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgArea + in LowerFormalArguments_64() 717 for (; ArgOffset < 6*8; ArgOffset += 8) { in LowerFormalArguments_64() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 927 unsigned InRegsParamRecordIdx, int ArgOffset, 932 unsigned ArgOffset, unsigned TotalArgRegsSaveSize,
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H A D | ARMISelLowering.cpp | 4392 int ArgOffset, unsigned ArgSize) const { in StoreByValRegs() argument 4417 ArgOffset = -4 * (ARM::R4 - RBegin); in StoreByValRegs() 4420 int FrameIndex = MFI.CreateFixedObject(ArgSize, ArgOffset, false); in StoreByValRegs() 4444 unsigned ArgOffset, in VarArgStyleRegisters() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 449 int64_t ArgOffset = MFFrame.getObjectOffset(I) + in processFunctionBeforeFrameFinalized() local 451 MaxArgOffset = std::max(MaxArgOffset, ArgOffset); in processFunctionBeforeFrameFinalized()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 546 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments() local 549 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgsBaseOffset); in LowerFormalArguments()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 21846 int ArgOffset; in mergeEltWithShuffle() local 21848 std::tie(ArgOffset, ArgVal) = ArgWorkList.pop_back_val(); in mergeEltWithShuffle() 21851 ElementOffset = ArgOffset; in mergeEltWithShuffle() 21858 ArgOffset + ArgVal.getValueType().getVectorNumElements(); in mergeEltWithShuffle() 21867 assert(CurrentArgOffset == ArgOffset); in mergeEltWithShuffle()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7431 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments() local 7448 unsigned ObjOffset = ArgOffset + BEAlign; in LowerFormalArguments() 7457 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset + BEAlign, true); in LowerFormalArguments()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 36898 size_t ArgOffset = MFI->getPreallocatedArgOffsets(PreallocatedId)[ArgIdx]; in EmitInstrWithCustomInserter() local 36900 << ", arg offset " << ArgOffset << "\n"); in EmitInstrWithCustomInserter() 36904 X86::ESP, false, ArgOffset); in EmitInstrWithCustomInserter()
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