| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/DIA/ |
| H A D | DIASession.cpp | 162 DWORD ArgSection, ArgOffset = 0; in addressForVA() local 163 if (S_OK == Session->addressForVA(VA, &ArgSection, &ArgOffset)) { in addressForVA() 165 Offset = static_cast<uint32_t>(ArgOffset); in addressForVA() 173 DWORD ArgSection, ArgOffset = 0; in addressForRVA() local 174 if (S_OK == Session->addressForRVA(RVA, &ArgSection, &ArgOffset)) { in addressForRVA() 176 Offset = static_cast<uint32_t>(ArgOffset); in addressForRVA()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Sparc.cpp | 332 unsigned ArgOffset = RetType.isIndirect() ? RetOffset : 0; in computeInfo() local 334 I.info = classifyType(I.type, 16 * 8, ArgOffset); in computeInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 1927 Value *getShadowPtrForArgument(IRBuilder<> &IRB, int ArgOffset) { in getShadowPtrForArgument() 1929 if (ArgOffset) in getShadowPtrForArgument() 1930 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getShadowPtrForArgument() 1935 Value *getOriginPtrForArgument(IRBuilder<> &IRB, int ArgOffset) { in getOriginPtrForArgument() 1939 if (ArgOffset) in getOriginPtrForArgument() 1940 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getOriginPtrForArgument() 2044 unsigned ArgOffset = 0; in getShadow() local 2064 bool Overflow = ArgOffset + Size > kParamTLSSize; in getShadow() 2081 Value *Base = getShadowPtrForArgument(EntryIRB, ArgOffset); in getShadow() 2088 Value *OriginPtr = getOriginPtrForArgument(EntryIRB, ArgOffset); in getShadow() [all …]
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| H A D | DataFlowSanitizer.cpp | 628 Value *getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB); 1786 Value *DFSanFunction::getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB) { in getArgTLS() argument 1788 if (ArgOffset) in getArgTLS() 1789 Base = IRB.CreateAdd(Base, ConstantInt::get(DFS.IntptrTy, ArgOffset)); in getArgTLS() 1839 unsigned ArgOffset = 0; in getShadowForTLSArgument() local 1850 ArgOffset += alignTo(Size, ShadowTLSAlignment); in getShadowForTLSArgument() 1851 if (ArgOffset > ArgTLSSize) in getShadowForTLSArgument() 1856 if (ArgOffset + Size > ArgTLSSize) in getShadowForTLSArgument() 1861 Value *ArgShadowPtr = getArgTLS(FArg.getType(), ArgOffset, IRB); in getShadowForTLSArgument() 3371 unsigned ArgOffset = 0; in visitCallBase() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 544 uint64_t ArgOffset = alignTo(ExplicitArgOffset, ABIAlign) + BaseOffset; in lowerFormalArgumentsKernel() local 552 Align Alignment = commonAlignment(KernArgBaseAlign, ArgOffset); in lowerFormalArgumentsKernel() 560 lowerParameterPtr(VRegs[i][0], B, ArgOffset); in lowerFormalArgumentsKernel() 564 lowerParameterPtr(PtrReg, B, ArgOffset); in lowerFormalArgumentsKernel() 572 lowerParameter(B, OrigArg, ArgOffset, Alignment); in lowerFormalArgumentsKernel()
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| H A D | AMDGPULegalizerInfo.cpp | 6347 unsigned ArgOffset, in packImage16bitOpsToDwords() argument 6355 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() 6389 !MI.getOperand(ArgOffset + I + 1).isReg()) { in packImage16bitOpsToDwords() 6396 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords() 6452 const unsigned ArgOffset = NumDefs + 1; in legalizeImageIntrinsic() local 6481 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic() 6483 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic() 6491 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in legalizeImageIntrinsic() 6525 MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask); in legalizeImageIntrinsic() 6568 packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16, IsG16); in legalizeImageIntrinsic() [all …]
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| H A D | AMDGPUInstructionSelector.cpp | 2043 const unsigned ArgOffset = MI.getNumExplicitDefs() + 1; in selectImageIntrinsic() local 2055 Unorm = MI.getOperand(ArgOffset + Intr->UnormIndex).getImm() != 0; in selectImageIntrinsic() 2060 if (!parseTexFail(MI.getOperand(ArgOffset + Intr->TexFailCtrlIndex).getImm(), in selectImageIntrinsic() 2064 const int Flags = MI.getOperand(ArgOffset + Intr->NumArgs).getImm(); in selectImageIntrinsic() 2095 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in selectImageIntrinsic() 2125 unsigned CPol = MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm(); in selectImageIntrinsic() 2136 MachineOperand &AddrOp = MI.getOperand(ArgOffset + I); in selectImageIntrinsic() 2225 MachineOperand &SrcOp = MI.getOperand(ArgOffset + Intr->VAddrStart + I); in selectImageIntrinsic() 2232 MIB.addReg(MI.getOperand(ArgOffset + Intr->RsrcIndex).getReg()); in selectImageIntrinsic() 2234 MIB.addReg(MI.getOperand(ArgOffset + Intr->SampIndex).getReg()); in selectImageIntrinsic()
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| H A D | SIISelLowering.cpp | 2202 unsigned ArgOffset = VA.getLocMemOffset(); in lowerStackParameter() local 2205 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, true); in lowerStackParameter() 2627 unsigned ArgOffset = ArgLoc.getLocMemOffset(); in allocatePreloadKernArgSGPRs() local 2628 Align Alignment = commonAlignment(KernelArgBaseAlign, ArgOffset); in allocatePreloadKernArgSGPRs() 2641 ArgOffset += ImplicitArgOffset; in allocatePreloadKernArgSGPRs() 2652 unsigned Padding = ArgOffset - LastExplicitArgOffset; in allocatePreloadKernArgSGPRs() 2674 LastExplicitArgOffset = NumAllocSGPRs * 4 + ArgOffset; in allocatePreloadKernArgSGPRs() 8484 const unsigned ArgOffset = WithChain ? 2 : 1; in lowerImage() local 8512 DMask = Op->getConstantOperandVal(ArgOffset + Intr->DMaskIndex); in lowerImage() 8557 unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd; in lowerImage() [all …]
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| H A D | AMDGPUISelLowering.cpp | 1234 uint64_t ArgOffset = alignTo(ExplicitArgOffset, Alignment) + ExplicitOffset; in analyzeFormalArgumentsCompute() local 1246 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset); in analyzeFormalArgumentsCompute() 5620 uint64_t ArgOffset = in getImplicitParameterOffset() local 5624 return ArgOffset; in getImplicitParameterOffset() 5626 return ArgOffset + AMDGPU::ImplicitArg::PRIVATE_BASE_OFFSET; in getImplicitParameterOffset() 5628 return ArgOffset + AMDGPU::ImplicitArg::SHARED_BASE_OFFSET; in getImplicitParameterOffset() 5630 return ArgOffset + AMDGPU::ImplicitArg::QUEUE_PTR_OFFSET; in getImplicitParameterOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 593 unsigned ArgOffset = CCInfo.getStackSize(); in LowerFormalArguments_32() local 595 ArgOffset += StackOffset; in LowerFormalArguments_32() 597 assert(!ArgOffset); in LowerFormalArguments_32() 598 ArgOffset = 68+4*NumAllocated; in LowerFormalArguments_32() 602 FuncInfo->setVarArgsFrameOffset(ArgOffset); in LowerFormalArguments_32() 611 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, ArgOffset, in LowerFormalArguments_32() 617 ArgOffset += 4; in LowerFormalArguments_32() 711 unsigned ArgOffset = CCInfo.getStackSize(); in LowerFormalArguments_64() local 714 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgArea + in LowerFormalArguments_64() 721 for (; ArgOffset < 6*8; ArgOffset += 8) { in LowerFormalArguments_64() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4177 unsigned ParamAreaSize, unsigned &ArgOffset, in CalculateStackSlotUsed() argument 4185 ArgOffset = alignTo(ArgOffset, Alignment); in CalculateStackSlotUsed() 4188 if (ArgOffset >= LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 4192 ArgOffset += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); in CalculateStackSlotUsed() 4194 ArgOffset = ((ArgOffset + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; in CalculateStackSlotUsed() 4197 if (ArgOffset > LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 4377 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments_32SVR4() local 4379 ArgOffset += ArgSize - ObjSize; in LowerFormalArguments_32SVR4() 4380 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, isImmutable); in LowerFormalArguments_32SVR4() 4568 unsigned ArgOffset = LinkageSize; in LowerFormalArguments_64SVR4() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 953 unsigned InRegsParamRecordIdx, int ArgOffset, 958 unsigned ArgOffset, unsigned TotalArgRegsSaveSize,
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| H A D | ARMISelLowering.cpp | 4462 int ArgOffset, unsigned ArgSize) const { in StoreByValRegs() argument 4487 ArgOffset = -4 * (ARM::R4 - RBegin); in StoreByValRegs() 4490 int FrameIndex = MFI.CreateFixedObject(ArgSize, ArgOffset, false); in StoreByValRegs() 4514 unsigned ArgOffset, in VarArgStyleRegisters() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 451 int64_t ArgOffset = MFFrame.getObjectOffset(I) + in processFunctionBeforeFrameFinalized() local 453 MaxArgOffset = std::max(MaxArgOffset, ArgOffset); in processFunctionBeforeFrameFinalized()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 544 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments() local 547 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgsBaseOffset); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 22903 int ArgOffset; in mergeEltWithShuffle() local 22905 std::tie(ArgOffset, ArgVal) = ArgWorkList.pop_back_val(); in mergeEltWithShuffle() 22908 ElementOffset = ArgOffset; in mergeEltWithShuffle() 22915 ArgOffset + ArgVal.getValueType().getVectorNumElements(); in mergeEltWithShuffle() 22924 assert(CurrentArgOffset == ArgOffset); in mergeEltWithShuffle()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7910 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments() local 7927 unsigned ObjOffset = ArgOffset + BEAlign; in LowerFormalArguments() 7936 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset + BEAlign, true); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 38113 size_t ArgOffset = MFI->getPreallocatedArgOffsets(PreallocatedId)[ArgIdx]; in EmitInstrWithCustomInserter() local 38115 << ", arg offset " << ArgOffset << "\n"); in EmitInstrWithCustomInserter() 38119 X86::ESP, false, ArgOffset); in EmitInstrWithCustomInserter()
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