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Searched refs:ArgIndex (Results 1 – 25 of 53) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsXCore.td41 [NoCapture<ArgIndex<0>>]>;
42 def int_xcore_in : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],[NoCapture<ArgIndex<0>>]>;
44 [NoCapture<ArgIndex<0>>]>;
46 [NoCapture<ArgIndex<0>>]>;
48 [NoCapture<ArgIndex<0>>]>;
50 [NoCapture<ArgIndex<0>>]>;
52 [NoCapture<ArgIndex<0>>]>;
54 [NoCapture<ArgIndex<0>>]>;
56 [NoCapture<ArgIndex<0>>]>;
58 [NoCapture<ArgIndex<0>>]>;
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H A DIntrinsicsX86.td16 def int_x86_int : Intrinsic<[], [llvm_i8_ty], [ImmArg<ArgIndex<0>>]>;
68 [ImmArg<ArgIndex<1>>]>;
70 [ImmArg<ArgIndex<1>>]>;
72 [ImmArg<ArgIndex<1>>]>;
86 [ImmArg<ArgIndex<2>>]>;
88 [ImmArg<ArgIndex<2>>]>;
90 [ImmArg<ArgIndex<2>>]>;
92 [ImmArg<ArgIndex<2>>]>;
94 [ImmArg<ArgIndex<2>>]>;
168 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsLoongArch.td21 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>]>;
59 def int_loongarch_break : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
61 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
63 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
64 def int_loongarch_dbar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
66 def int_loongarch_ibar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
68 [ImmArg<ArgIndex<
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H A DIntrinsicsBPF.td25 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
52 NoCapture <ArgIndex<0>>,
53 ImmArg <ArgIndex<1>>, // volatile
54 ImmArg <ArgIndex<2>>, // atomic order
55 ImmArg <ArgIndex<3>>, // synscope id
56 ImmArg <ArgIndex<4>>, // alignment
57 ImmArg <ArgIndex<5>>, // inbounds
72 NoCapture <ArgIndex<1>>,
73 ImmArg <ArgIndex<2>>, // volatile
74 ImmArg <ArgIndex<3>>, // atomic order
[all …]
H A DIntrinsicsRISCVXsf.td26 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>], // bit<27-26> and bit<24-20>
27 … !if(ImmScalar, [ImmArg<ArgIndex<2>>], []), // ScalarOperand
40 !listconcat([IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>,
41 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>,
42 … ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>], // bit<27-26>, bit<24-20>, bit<11-7>, sew, log2lmul
43 !if(ImmScalar, [ImmArg<ArgIndex<3>>], []))>, // ScalarOperand
57 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>], // bit<27-26>
58 … !if(HasDst, [], [ImmArg<ArgIndex<1>>]), // Vd or bit<11-7>
59 !if(ImmScalar, !if(HasDst, [ImmArg<ArgIndex<2>>],
60 … [ImmArg<ArgIndex<3>>]), []), // ScalarOperand
[all …]
H A DIntrinsicsHexagonDep.td1112 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_addi", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1130 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_andir", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1154 …64_i32i32_Intrinsic<"HEXAGON_A2_combineii", [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
1202 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_orir", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1268 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_subri", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1316 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_tfrih", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1319 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_tfril", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1325 Hexagon_i64_i32_Intrinsic<"HEXAGON_A2_tfrpi", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1328 Hexagon_i32_i32_Intrinsic<"HEXAGON_A2_tfrsi", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1541 Hexagon_i64_i32i32_Intrinsic<"HEXAGON_A4_bitspliti", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
[all …]
H A DIntrinsicsAMDGPU.td198 IntrNoFree, IntrWillReturn, ImmArg<ArgIndex<0>>]>;
209 IntrNoFree, IntrWillReturn, ImmArg<ArgIndex<1>>]>;
229 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
232 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
238 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
244 …Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent, …
252 …Intrinsic<[llvm_i1_ty], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrCo…
272 Intrinsic<[], [llvm_i16_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent,
300 Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent,
313 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, IntrNoMem, IntrHasSideEffects,
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H A DIntrinsicsWebAssembly.td129 [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
145 [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
152 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
166 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
167 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
172 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
173 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
177 [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
197 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
198 ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
[all …]
H A DIntrinsicsSPIRV.td15 …sign_ptr_type : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
23 …ep : Intrinsic<[llvm_anyptr_ty], [llvm_i1_ty, llvm_any_ty, llvm_vararg_ty], [ImmArg<ArgIndex<0>>]>;
24 …vm_i32_ty], [llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
25 …llvm_any_ty, llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
32 …st : Intrinsic<[llvm_any_ty], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
49 NoCapture<ArgIndex<1>>,
50 ImmArg<ArgIndex<0>>]>;
54 NoCapture<ArgIndex<1>>,
55 ImmArg<ArgIndex<0>>]>;
H A DIntrinsicsMips.td237 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<1>>]>;
239 Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem, ImmArg<ArgIndex<0>>]>;
305 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
308 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
358 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
361 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
365 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
466 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
469 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
472 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
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H A DIntrinsics.td69 class ArgIndex<int argNo> : AttrIndex<!add(argNo, 1)>;
723 [IntrArgMemOnly, NoCapture<ArgIndex<1>>,
724 NoCapture<ArgIndex<2>>]>;
733 [Returned<ArgIndex<0>>]>;
738 [Returned<ArgIndex<0>>]>;
756 [Returned<ArgIndex<0>>]>;
759 [Returned<ArgIndex<0>>]>;
762 [Returned<ArgIndex<0>>]>;
788 [Returned<ArgIndex<0>>]>;
815 [IntrNoMem, ImmArg<ArgIndex<0>>]>;
[all …]
H A DIntrinsicsHexagon.td54 [IntrArgMemOnly, ImmArg<ArgIndex<3>>]>;
60 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
66 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
135 [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
139 [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
144 [llvm_ptr_ty, llvm_i32_ty], [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
148 [llvm_ptr_ty, llvm_i64_ty], [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
153 …[IntrArgMemOnly, NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>, WriteOnly<ArgIndex<0>>, ReadOnly<…
157 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, WriteOnly<ArgIndex<0>>]>;
163 [IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
[all …]
H A DIntrinsicsRISCV.td31 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>]>;
35 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<4>>]>;
120 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
124 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<2>>]>;
152 ImmArg<ArgIndex<1>>,
153 ImmArg<ArgIndex<2>>]>;
158 ImmArg<ArgIndex<0>>,
159 ImmArg<ArgIndex<1>>]>;
166 [NoCapture<ArgIndex<0>>, IntrReadMem, IntrArgMemOnly]>,
175 [NoCapture<ArgIndex<1>>, IntrReadMem, IntrArgMemOnly]>,
[all …]
H A DIntrinsicsARM.td22 def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
327 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
329 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
331 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
333 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
336 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
338 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
340 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
342 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
347 …i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIn…
[all …]
H A DIntrinsicsSystemZ.td38 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
55 Intrinsic<[type], [type, type, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<2>>]>;
59 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
64 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
68 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
230 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
234 [IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
243 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
307 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
366 [IntrNoMem, ImmArg<ArgIndex<
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H A DIntrinsicsAArch64.td67 [IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
70 [IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
74 [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn, ReadOnly<ArgIndex<0>>,
75 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>
584 [IntrArgMemOnly, NoCapture<ArgIndex<2>>]>;
598 [IntrArgMemOnly, NoCapture<ArgIndex<2>>]>;
602 [IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
616 [IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
621 [IntrArgMemOnly, NoCapture<ArgIndex<4>>]>;
639 [IntrArgMemOnly, NoCapture<ArgIndex<4>>]>;
[all …]
H A DIntrinsicsPowerPC.td27 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
29 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
151 Intrinsic <[], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
154 Intrinsic <[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
188 [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
192 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
195 [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
236 [IntrInaccessibleMemOnly, ImmArg<ArgIndex<0>>]>;
638 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
642 [IntrNoMem, ImmArg<ArgIndex<0>>]>;
[all …]
H A DIntrinsicsRISCVXCV.td39 [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg<ArgIndex<2>>]>;
43 [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg<ArgIndex<3>>]>;
60 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
H A DIntrinsicsRISCVXTHead.td20 [ImmArg<ArgIndex<5>>, IntrNoMem]>, RISCVVIntrinsic {
H A DIntrinsicsNVVM.td1322 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1325 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1330 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1335 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1437 [IntrArgMemOnly, IntrNoCallback, NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
1438 WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>],
1441 [IntrArgMemOnly, IntrNoCallback, NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
1442 WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>],
1457 Intrinsic<[],[llvm_i32_ty],[ImmArg<ArgIndex<0>>]>;
1468 Intrinsic<[],[llvm_i32_ty],[ImmArg<ArgIndex<0>>]>;
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/freebsd/contrib/llvm-project/lldb/source/Plugins/ExpressionParser/Clang/
H A DNameSearchContext.cpp93 unsigned ArgIndex; in AddFunDecl() local
97 for (ArgIndex = 0; ArgIndex < NumArgs; ++ArgIndex) { in AddFunDecl()
98 QualType arg_qual_type(func_proto_type->getParamType(ArgIndex)); in AddFunDecl()
/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaWasm.cpp29 static bool CheckWasmBuiltinArgIsTable(Sema &S, CallExpr *E, unsigned ArgIndex, in CheckWasmBuiltinArgIsTable() argument
31 Expr *ArgExpr = E->getArg(ArgIndex); in CheckWasmBuiltinArgIsTable()
36 << ArgIndex + 1 << ArgExpr->getSourceRange(); in CheckWasmBuiltinArgIsTable()
44 unsigned ArgIndex) { in CheckWasmBuiltinArgIsInteger() argument
45 Expr *ArgExpr = E->getArg(ArgIndex); in CheckWasmBuiltinArgIsInteger()
49 << ArgIndex + 1 << ArgExpr->getSourceRange(); in CheckWasmBuiltinArgIsInteger()
/freebsd/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyCommon.cpp740 unsigned ArgIndex = CurrentBlockInfo->ProcessedPredecessors; in makePhiNodeVar() local
741 assert(ArgIndex > 0 && ArgIndex < NPreds); in makePhiNodeVar()
750 Ph->values()[ArgIndex] = E; in makePhiNodeVar()
758 for (unsigned PIdx = 0; PIdx < ArgIndex; ++PIdx) in makePhiNodeVar()
761 Ph->values()[ArgIndex] = E; in makePhiNodeVar()
841 unsigned ArgIndex = BBInfo[Blk->getBlockID()].ProcessedPredecessors; in mergePhiNodesBackEdge() local
842 assert(ArgIndex > 0 && ArgIndex < BB->numPredecessors()); in mergePhiNodesBackEdge()
847 assert(Ph->values()[ArgIndex] == nullptr && "Wrong index for back edge."); in mergePhiNodesBackEdge()
851 Ph->values()[ArgIndex] = E; in mergePhiNodesBackEdge()
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DOSLog.cpp68 unsigned ArgIndex = FS.getArgIndex(); in HandlePrintfSpecifier() local
69 if (ArgIndex < Args.size()) in HandlePrintfSpecifier()
70 ArgsData.back().E = Args[ArgIndex]; in HandlePrintfSpecifier()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DLowerTypeTests.cpp1261 unsigned ArgIndex = AsmArgs.size(); in createJumpTableEntry() local
1270 AsmOS << "jmp ${" << ArgIndex << ":c}@plt\n"; in createJumpTableEntry()
1276 AsmOS << "b $" << ArgIndex << "\n"; in createJumpTableEntry()
1280 AsmOS << "b $" << ArgIndex << "\n"; in createJumpTableEntry()
1304 << "1: .word $" << ArgIndex << " - (0b + 4)\n"; in createJumpTableEntry()
1308 AsmOS << "b.w $" << ArgIndex << "\n"; in createJumpTableEntry()
1312 AsmOS << "tail $" << ArgIndex << "@plt\n"; in createJumpTableEntry()
1314 AsmOS << "pcalau12i $$t0, %pc_hi20($" << ArgIndex << ")\n" in createJumpTableEntry()
1315 << "jirl $$r0, $$t0, %pc_lo12($" << ArgIndex << ")\n"; in createJumpTableEntry()
1320 ConstraintOS << (ArgIndex > 0 ? ",s" : "s"); in createJumpTableEntry()

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