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Searched refs:ArgIndex (Results 1 – 25 of 60) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsXCore.td41 [NoCapture<ArgIndex<0>>]>;
42 def int_xcore_in : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],[NoCapture<ArgIndex<0>>]>;
44 [NoCapture<ArgIndex<0>>]>;
46 [NoCapture<ArgIndex<0>>]>;
48 [NoCapture<ArgIndex<0>>]>;
50 [NoCapture<ArgIndex<0>>]>;
52 [NoCapture<ArgIndex<0>>]>;
54 [NoCapture<ArgIndex<0>>]>;
56 [NoCapture<ArgIndex<0>>]>;
58 [NoCapture<ArgIndex<0>>]>;
[all …]
H A DIntrinsicsX86.td16 def int_x86_int : Intrinsic<[], [llvm_i8_ty], [ImmArg<ArgIndex<0>>]>;
68 [ImmArg<ArgIndex<1>>]>;
70 [ImmArg<ArgIndex<1>>]>;
72 [ImmArg<ArgIndex<1>>]>;
86 [ImmArg<ArgIndex<2>>]>;
88 [ImmArg<ArgIndex<2>>]>;
90 [ImmArg<ArgIndex<2>>]>;
92 [ImmArg<ArgIndex<2>>]>;
94 [ImmArg<ArgIndex<2>>]>;
168 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsBPF.td25 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
52 NoCapture <ArgIndex<0>>,
53 ImmArg <ArgIndex<1>>, // volatile
54 ImmArg <ArgIndex<2>>, // atomic order
55 ImmArg <ArgIndex<3>>, // synscope id
56 ImmArg <ArgIndex<4>>, // alignment
57 ImmArg <ArgIndex<5>>, // inbounds
72 NoCapture <ArgIndex<1>>,
73 ImmArg <ArgIndex<2>>, // volatile
74 ImmArg <ArgIndex<3>>, // atomic order
[all …]
H A DIntrinsicsRISCVXsf.td19 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>], // bit<27-26> and bit<24-20>
20 … !if(ImmScalar, [ImmArg<ArgIndex<2>>], []), // ScalarOperand
33 !listconcat([IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>,
34 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>,
35 … ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>], // bit<27-26>, bit<24-20>, bit<11-7>, sew, log2lmul
36 !if(ImmScalar, [ImmArg<ArgIndex<3>>], []))>, // ScalarOperand
50 … !listconcat([IntrNoMem, ImmArg<ArgIndex<0>>], // bit<27-26>
51 … !if(HasDst, [], [ImmArg<ArgIndex<1>>]), // Vd or bit<11-7>
52 !if(ImmScalar, !if(HasDst, [ImmArg<ArgIndex<2>>],
53 … [ImmArg<ArgIndex<3>>]), []), // ScalarOperand
[all …]
H A DIntrinsicsLoongArch.td21 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>]>;
60 def int_loongarch_break : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
62 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
64 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<2>>]>;
65 def int_loongarch_dbar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
67 def int_loongarch_ibar : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
69 [ImmArg<ArgIndex<0>>]>;
71 [ImmArg<ArgIndex<0>>]>;
72 def int_loongarch_syscall : BaseInt<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
93 [ImmArg<ArgIndex<0>>]>;
[all …]
H A DIntrinsics.td68 class ArgIndex<int argNo> : AttrIndex<!add(argNo, 1)>;
71 // use AttrIndex. Properties applicable only to arguments use ArgIndex. Please
75 class NoCapture<ArgIndex idx> : IntrinsicProperty {
110 class Returned<ArgIndex idx> : IntrinsicProperty {
115 class ImmArg<ArgIndex idx> : IntrinsicProperty {
121 class ReadOnly<ArgIndex idx> : IntrinsicProperty {
127 class WriteOnly<ArgIndex idx> : IntrinsicProperty {
133 class ReadNone<ArgIndex idx> : IntrinsicProperty {
754 [IntrArgMemOnly, NoCapture<ArgIndex<1>>,
755 NoCapture<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsWebAssembly.td129 [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
145 [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
152 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
166 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
167 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
172 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
173 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
177 [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
197 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
198 ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
[all …]
H A DIntrinsicsRISCV.td31 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<3>>]>;
35 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<4>>]>;
120 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
124 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<2>>]>;
152 ImmArg<ArgIndex<1>>,
153 ImmArg<ArgIndex<2>>]>;
158 ImmArg<ArgIndex<0>>,
159 ImmArg<ArgIndex<1>>]>;
166 [NoCapture<ArgIndex<0>>, IntrReadMem, IntrArgMemOnly]>,
175 [NoCapture<ArgIndex<1>>, IntrReadMem, IntrArgMemOnly]>,
[all …]
H A DIntrinsicsHexagonDep.td1112 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_addi", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1130 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_andir", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1154 …64_i32i32_Intrinsic<"HEXAGON_A2_combineii", [IntrNoMem, ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
1202 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_orir", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1268 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_subri", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1316 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_tfrih", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1319 Hexagon_i32_i32i32_Intrinsic<"HEXAGON_A2_tfril", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
1325 Hexagon_i64_i32_Intrinsic<"HEXAGON_A2_tfrpi", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1328 Hexagon_i32_i32_Intrinsic<"HEXAGON_A2_tfrsi", [IntrNoMem, ImmArg<ArgIndex<0>>]>;
1541 Hexagon_i64_i32i32_Intrinsic<"HEXAGON_A4_bitspliti", [IntrNoMem, ImmArg<ArgIndex<1>>]>;
[all …]
H A DIntrinsicsMips.td237 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<1>>]>;
239 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem, ImmArg<ArgIndex<0>>]>;
305 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
308 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
358 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
361 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
365 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
466 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
469 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
472 [Commutative, IntrNoMem, ImmArg<ArgIndex<1>>]>;
[all …]
H A DIntrinsicsHexagon.td54 [IntrArgMemOnly, ImmArg<ArgIndex<3>>]>;
60 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
66 [IntrWriteMem, ImmArg<ArgIndex<3>>]>;
135 [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
139 [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
144 [llvm_ptr_ty, llvm_i32_ty], [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
148 [llvm_ptr_ty, llvm_i64_ty], [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
153 …[IntrArgMemOnly, NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>, WriteOnly<ArgIndex<0>>, ReadOnly<…
157 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, WriteOnly<ArgIndex<0>>]>;
163 [IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
[all …]
H A DIntrinsicsAMDGPU.td214 IntrNoFree, IntrWillReturn, ImmArg<ArgIndex<0>>]>;
225 IntrNoFree, IntrWillReturn, ImmArg<ArgIndex<1>>]>;
257 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrWillReturn, IntrNoCallback]>;
260 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrNoCallback]>;
266 [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrWillReturn, IntrNoCallback]>;
277 …Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent, …
289 …Intrinsic<[llvm_i1_ty], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrCo…
294 Intrinsic<[], [llvm_i16_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent,
327 Intrinsic<[], [llvm_i32_ty], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects, IntrConvergent,
340 [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, IntrNoMem, IntrHasSideEffects,
[all …]
H A DIntrinsicsARM.td22 def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>]>;
327 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
329 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
331 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
333 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
336 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
338 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
340 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
342 …Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
347 …i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIn…
[all …]
H A DIntrinsicsSPIRV.td17 …sign_ptr_type : Intrinsic<[], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
26 …ep : Intrinsic<[llvm_anyptr_ty], [llvm_i1_ty, llvm_any_ty, llvm_vararg_ty], [ImmArg<ArgIndex<0>>]>;
27 …vm_i32_ty], [llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
28 …llvm_any_ty, llvm_anyptr_ty, llvm_i16_ty, llvm_i8_ty], [ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
35 …st : Intrinsic<[llvm_any_ty], [llvm_any_ty, llvm_metadata_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
38 def int_spv_selection_merge : Intrinsic<[], [llvm_any_ty, llvm_i32_ty], [ImmArg<ArgIndex<1>>]>;
41 def int_spv_alloca : Intrinsic<[llvm_any_ty], [llvm_i8_ty], [ImmArg<ArgIndex<0>>]>;
42 …t_spv_alloca_array : Intrinsic<[llvm_any_ty], [llvm_anyint_ty, llvm_i8_ty], [ImmArg<ArgIndex<1>>]>;
54 NoCapture<ArgIndex<1>>,
55 ImmArg<ArgIndex<0>>]>;
[all …]
H A DIntrinsicsSystemZ.td38 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
55 Intrinsic<[type], [type, type, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<2>>]>;
59 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
64 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
68 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
230 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
234 [IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
243 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
307 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
366 [IntrNoMem, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
[all …]
H A DIntrinsicsAArch64.td67 [IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
70 [IntrNoMem, IntrHasSideEffects, IntrNoReturn, IntrCold, ImmArg<ArgIndex<0>>]>;
74 [IntrInaccessibleMemOrArgMemOnly, IntrWillReturn, ReadOnly<ArgIndex<0>>,
75 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>
568 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
573 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
578 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
583 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
590 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
596 [IntrNoMem, ImmArg<ArgIndex<3>>]>;
[all …]
H A DIntrinsicsNVVM.td775 ImmArg<ArgIndex<0>>]>;
1083 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<2>>]>;
1103 [IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>]>;
1262 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1266 [IntrArgMemOnly, IntrNoCallback, NoCapture<ArgIndex<0>>]>;
1347 [IntrNoCallback, IntrArgMemOnly, ImmArg<ArgIndex<1>>,
1348 Range<ArgIndex<1>, 128, 129>],
1366 [IntrArgMemOnly, IntrNoCallback, NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
1367 WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>]>;
1369 [IntrArgMemOnly, IntrNoCallback, NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
[all …]
H A DIntrinsicsPowerPC.td27 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
29 [IntrArgMemOnly, NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<1>>]>;
151 Intrinsic <[], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
154 Intrinsic <[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
188 [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
192 [IntrNoMem, ImmArg<ArgIndex<2>>]>;
195 [IntrNoMem, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
236 [IntrInaccessibleMemOnly, ImmArg<ArgIndex<0>>]>;
659 …DefaultAttrsIntrinsic<[llvm_v16i8_ty],[llvm_v16i8_ty, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<1>…
663 …DefaultAttrsIntrinsic<[llvm_v16i8_ty],[llvm_v16i8_ty, llvm_i32_ty], [IntrNoMem, ImmArg<ArgIndex<1>…
[all …]
H A DIntrinsicsRISCVXCV.td39 [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg<ArgIndex<2>>]>;
43 [IntrNoMem, IntrWillReturn, IntrSpeculatable, ImmArg<ArgIndex<3>>]>;
60 ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
/freebsd/contrib/llvm-project/clang/lib/ASTMatchers/
H A DLowLevelHelpers.cpp36 unsigned ArgIndex = 0; in matchEachArgumentWithParamTypeImpl() local
44 ++ArgIndex; in matchEachArgumentWithParamTypeImpl()
76 for (; ArgIndex < NumArgs; ++ArgIndex, ++ParamIndex) { in matchEachArgumentWithParamTypeImpl()
86 OnParamAndArg(ParamType, Node.getArg(ArgIndex)->IgnoreParenCasts()); in matchEachArgumentWithParamTypeImpl()
/freebsd/contrib/llvm-project/lldb/source/Plugins/ExpressionParser/Clang/
H A DNameSearchContext.cpp93 unsigned ArgIndex; in AddFunDecl() local
97 for (ArgIndex = 0; ArgIndex < NumArgs; ++ArgIndex) { in AddFunDecl()
98 QualType arg_qual_type(func_proto_type->getParamType(ArgIndex)); in AddFunDecl()
/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaWasm.cpp29 static bool CheckWasmBuiltinArgIsTable(Sema &S, CallExpr *E, unsigned ArgIndex, in CheckWasmBuiltinArgIsTable() argument
31 Expr *ArgExpr = E->getArg(ArgIndex); in CheckWasmBuiltinArgIsTable()
36 << ArgIndex + 1 << ArgExpr->getSourceRange(); in CheckWasmBuiltinArgIsTable()
44 unsigned ArgIndex) { in CheckWasmBuiltinArgIsInteger() argument
45 Expr *ArgExpr = E->getArg(ArgIndex); in CheckWasmBuiltinArgIsInteger()
49 << ArgIndex + 1 << ArgExpr->getSourceRange(); in CheckWasmBuiltinArgIsInteger()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/WebKit/
H A DRawPtrRefLambdaCapturesChecker.cpp151 unsigned ArgIndex = 0; in checkASTDecl() local
153 if (ArgIndex >= CE->getNumArgs()) in checkASTDecl()
155 auto *Arg = CE->getArg(ArgIndex)->IgnoreParenCasts(); in checkASTDecl()
162 ++ArgIndex; in checkASTDecl()
171 unsigned ArgIndex = isa<CXXOperatorCallExpr>(CE); in checkASTDecl() local
174 if (ArgIndex >= CE->getNumArgs()) in checkASTDecl()
176 auto *Arg = CE->getArg(ArgIndex)->IgnoreParenCasts(); in checkASTDecl()
183 ++ArgIndex; in checkASTDecl()
H A DRetainPtrCtorAdoptChecker.cpp234 for (unsigned ArgIndex = 0; ArgIndex < ArgCount; ++ArgIndex) { in checkCreateOrCopyFunction() local
235 auto *Arg = CE->getArg(ArgIndex)->IgnoreParenCasts(); in checkCreateOrCopyFunction()
250 if (FnDecl && ArgIndex < FnDecl->getNumParams()) { in checkCreateOrCopyFunction()
253 auto *ParamDecl = FnDecl->getParamDecl(ArgIndex); in checkCreateOrCopyFunction()
/freebsd/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyCommon.cpp757 unsigned ArgIndex = CurrentBlockInfo->ProcessedPredecessors; in makePhiNodeVar() local
758 assert(ArgIndex > 0 && ArgIndex < NPreds); in makePhiNodeVar()
767 Ph->values()[ArgIndex] = E; in makePhiNodeVar()
775 for (unsigned PIdx = 0; PIdx < ArgIndex; ++PIdx) in makePhiNodeVar()
778 Ph->values()[ArgIndex] = E; in makePhiNodeVar()
858 unsigned ArgIndex = BBInfo[Blk->getBlockID()].ProcessedPredecessors; in mergePhiNodesBackEdge() local
859 assert(ArgIndex > 0 && ArgIndex < BB->numPredecessors()); in mergePhiNodesBackEdge()
864 assert(Ph->values()[ArgIndex] == nullptr && "Wrong index for back edge."); in mergePhiNodesBackEdge()
868 Ph->values()[ArgIndex] = E; in mergePhiNodesBackEdge()

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