Searched refs:ArgGPRs (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYCallingConv.h | 29 static const MCPhysReg ArgGPRs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3}; in CC_CSKY_ABIV2_SOFT_64() local
30 Register Reg = State.AllocateReg(ArgGPRs); in CC_CSKY_ABIV2_SOFT_64()
38 if (!State.AllocateReg(ArgGPRs)) in CC_CSKY_ABIV2_SOFT_64()
48 static const MCPhysReg ArgGPRs[] = {CSKY::R0, CSKY::R1}; in Ret_CSKY_ABIV2_SOFT_64() local
49 Register Reg = State.AllocateReg(ArgGPRs); in Ret_CSKY_ABIV2_SOFT_64()
54 if (!State.AllocateReg(ArgGPRs)) in Ret_CSKY_ABIV2_SOFT_64()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVCallingConv.cpp | 244 ArrayRef<MCPhysReg> ArgGPRs = RISCV::getArgGPRs(STI.getTargetABI()); in CC_RISCVAssign2XLen() local
246 if (MCRegister Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
267 if (MCRegister Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen()
426 ArrayRef<MCPhysReg> ArgGPRs = RISCV::getArgGPRs(ABI); in CC_RISCV() local
430 if (MCRegister Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCV()
439 if (MCRegister Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCV()
449 if (MCRegister Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCV()
471 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV()
473 if (RegIdx != std::size(ArgGPRs) && RegIdx % 2 == 1) in CC_RISCV()
474 State.AllocateReg(ArgGPRs); in CC_RISCV()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 1549 ArrayRef<MCPhysReg> ArgGPRs = get64BitArgumentGPRs(CallConv, Subtarget); in createVarArgAreaAndStoreRegisters() local
1552 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in createVarArgAreaAndStoreRegisters()
1572 FuncInfo->setVarArgsFPOffset(ArgGPRs.size() * 8 + NumXMMRegs * 16); in createVarArgAreaAndStoreRegisters()
1574 ArgGPRs.size() * 8 + ArgXMMs.size() * 16, Align(16), false)); in createVarArgAreaAndStoreRegisters()
1584 for (MCPhysReg Reg : ArgGPRs.slice(NumIntRegs)) { in createVarArgAreaAndStoreRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 6635 const MCPhysReg ArgGPRs[] = {LoongArch::R4, LoongArch::R5, LoongArch::R6, variable
6663 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_LoongArchAssign2GRLen()
6680 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_LoongArchAssign2GRLen()
6736 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_LoongArch()
6738 if (RegIdx != std::size(ArgGPRs) && RegIdx % 2 == 1) in CC_LoongArch()
6739 State.AllocateReg(ArgGPRs); in CC_LoongArch()
6767 MCRegister Reg = State.AllocateReg(ArgGPRs); in CC_LoongArch()
6776 MCRegister HiReg = State.AllocateReg(ArgGPRs); in CC_LoongArch()
6830 Reg = State.AllocateReg(ArgGPRs); in CC_LoongArch()
7153 ArrayRef<MCPhysReg> ArgRegs = ArrayRef(ArgGPRs); in LowerFormalArguments()
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