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Searched refs:ArgFlags (Results 1 – 25 of 35) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h20 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
24 ISD::ArgFlagsTy ArgFlags, CCState &State);
27 ISD::ArgFlagsTy ArgFlags, CCState &State);
30 ISD::ArgFlagsTy ArgFlags, CCState &State);
33 ISD::ArgFlagsTy ArgFlags, CCState &State);
36 ISD::ArgFlagsTy ArgFlags, CCState &State);
39 ISD::ArgFlagsTy ArgFlags, CCState &State);
41 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
45 ISD::ArgFlagsTy ArgFlags, CCState &State);
48 ISD::ArgFlagsTy ArgFlags, CCState &State);
[all …]
H A DAArch64CallingConvention.cpp44 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument
54 ArgFlags.setInConsecutiveRegs(false); in finishStackBlock()
55 ArgFlags.setInConsecutiveRegsLast(false); in finishStackBlock()
79 ArgFlags, State)) in finishStackBlock()
83 ArgFlags.setInConsecutiveRegs(true); in finishStackBlock()
84 ArgFlags.setInConsecutiveRegsLast(true); in finishStackBlock()
116 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument
124 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block()
127 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, Align(8)); in CC_AArch64_Custom_Stack_Block()
135 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.cpp29 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_RegCall_Assign2Regs() argument
93 ISD::ArgFlagsTy &ArgFlags, in CC_X86_VectorCallAssignRegister() argument
130 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_64_VectorCall() argument
132 if (ArgFlags.isSecArgPass()) { in CC_X86_64_VectorCall()
133 if (ArgFlags.isHva()) in CC_X86_64_VectorCall()
135 ArgFlags, State); in CC_X86_64_VectorCall()
155 if (!ArgFlags.isHva() || ArgFlags.isHvaStart()) { in CC_X86_64_VectorCall()
171 if (!ArgFlags.isHva()) { in CC_X86_64_VectorCall()
180 return ArgFlags.isHva(); in CC_X86_64_VectorCall()
190 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_32_VectorCall() argument
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H A DX86CallingConv.h24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.h21 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
24 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
27 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
30 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
33 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
37 ISD::ArgFlagsTy ArgFlags, CCState &State);
39 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
42 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
45 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
48 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
H A DARMCallingConv.cpp50 ISD::ArgFlagsTy ArgFlags, in CC_ARM_APCS_Custom_f64() argument
103 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
135 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
146 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
148 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
171 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument
184 ValNo, ValVT, LocVT, LocInfo, ArgFlags.getNonZeroOrigAlign().value())); in CC_ARM_AAPCS_Custom_Aggregate()
186 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate()
269 Alignment = ArgFlags.getNonZeroMemAlign() <= 4 ? Align(4) : Align(8); in CC_ARM_AAPCS_Custom_Aggregate()
300 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_ARM_AAPCS_Custom_f16() argument
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H A DARMFastISel.cpp244 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1940 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1947 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2290 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2294 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2310 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2316 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2401 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2406 ArgFlags.reserve(arg_size); in SelectCall()
2444 ArgFlags.push_back(Flags); in SelectCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.h23 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
26 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
29 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
32 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
35 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
38 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
41 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
45 ISD::ArgFlagsTy ArgFlags, CCState &State);
H A DPPCCallingConv.cpp29 ISD::ArgFlagsTy &ArgFlags, in CC_PPC64_ELF_Shadow_GPR_Regs() argument
61 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
69 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
95 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() argument
119 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
147 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_CustomSplitFP64() argument
176 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_RetF64() argument
H A DPPCFastISel.cpp176 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1366 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1377 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1591 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
1596 ArgFlags.reserve(NumArgs); in fastLowerCall()
1625 ArgFlags.push_back(Flags); in fastLowerCall()
1632 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp47 Align MinAlign, ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
48 Align Alignment = ArgFlags.getNonZeroByValAlign(); in HandleByVal()
49 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
91 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
92 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeFormalArguments()
104 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
105 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in AnalyzeReturn()
131 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVCallingConv.h23 ISD::ArgFlagsTy ArgFlags, CCState &State,
27 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
31 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
35 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
H A DRISCVCallingConv.cpp326 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_RISCV() argument
336 if (ArgFlags.isNest()) { in CC_RISCV()
468 if (!IsFixed && ArgFlags.getNonZeroOrigAlign() == TwoXLenInBytes && in CC_RISCV()
516 if (ValVT.isScalarInteger() && (ArgFlags.isSplit() || !PendingLocs.empty())) { in CC_RISCV()
521 PendingArgFlags.push_back(ArgFlags); in CC_RISCV()
522 if (!ArgFlags.isSplitEnd()) { in CC_RISCV()
529 if (ValVT.isScalarInteger() && ArgFlags.isSplitEnd() && in CC_RISCV()
539 XLen, State, VA, AF, ValNo, ValVT, LocVT, ArgFlags, in CC_RISCV()
590 assert(ArgFlags.isSplitEnd() && "Expected ArgFlags.isSplitEnd()"); in CC_RISCV()
623 ISD::ArgFlagsTy ArgFlags, CCState &State, in CC_RISCV_FastCC() argument
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetCallingConv.td41 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
46 class CCIfPreallocated<CCAction A> : CCIf<"ArgFlags.isPreallocated()", A> {
51 class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> {
56 class CCIfSwiftAsync<CCAction A> : CCIf<"ArgFlags.isSwiftAsync()", A> {
61 class CCIfSwiftError<CCAction A> : CCIf<"ArgFlags.isSwiftError()", A> {
66 class CCIfCFGuardTarget<CCAction A> : CCIf<"ArgFlags.isCFGuardTarget()", A> {
71 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
80 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
84 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
88 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h97 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect() argument
103 if (!ArgFlags.isSplit() && PendingMembers.empty()) in CC_SystemZ_I128Indirect()
111 if (!ArgFlags.isSplitEnd()) in CC_SystemZ_I128Indirect()
148 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_XPLINK64_Pointer() argument
158 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_XPLINK64_Shadow_Reg() argument
181 ISD::ArgFlagsTy &ArgFlags, in CC_XPLINK64_Allocate128BitVararg() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYCallingConv.h27 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_CSKY_ABIV2_SOFT_64() argument
46 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in Ret_CSKY_ABIV2_SOFT_64() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallingConv.td14 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
16 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h159 ISD::ArgFlagsTy ArgFlags, CCState &State);
166 ISD::ArgFlagsTy &ArgFlags, CCState &State);
437 Align MinAlign, ISD::ArgFlagsTy ArgFlags);
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kCallingConv.h40 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_M68k_Any_AssignToReg() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp379 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
386 if (ArgFlags.isSExt()) in AnalyzeArguments()
388 else if (ArgFlags.isZExt()) in AnalyzeArguments()
395 if (ArgFlags.isByVal()) { in AnalyzeArguments()
396 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, Align(2), ArgFlags); in AnalyzeArguments()
414 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
424 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp341 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Xtensa_Custom() argument
342 if (ArgFlags.isByVal()) { in CC_Xtensa_Custom()
343 Align ByValAlign = ArgFlags.getNonZeroByValAlign(); in CC_Xtensa_Custom()
344 unsigned ByValSize = ArgFlags.getByValSize(); in CC_Xtensa_Custom()
363 if (ArgFlags.isSExt()) in CC_Xtensa_Custom()
365 else if (ArgFlags.isZExt()) in CC_Xtensa_Custom()
373 Align OrigAlign = ArgFlags.getNonZeroOrigAlign(); in CC_Xtensa_Custom()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp48 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
50 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
61 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Split_64() argument
87 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Ret_Split_64() argument
111 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in Analyze_CC_Sparc64_Full() argument
119 (LocVT == MVT::f128 || ArgFlags.isSplit()) ? Align(16) : Align(8); in Analyze_CC_Sparc64_Full()
162 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in Analyze_CC_Sparc64_Half() argument
199 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() argument
200 return Analyze_CC_Sparc64_Full(false, ValNo, ValVT, LocVT, LocInfo, ArgFlags, in CC_Sparc64_Full()
206 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCallingConv.td94 // without any additional information (in ArgFlags) stating that
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3042 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() argument
3056 if (ArgFlags.isByVal()) in CC_MipsO32()
3060 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
3063 if (ArgFlags.isSExt()) in CC_MipsO32()
3065 else if (ArgFlags.isZExt()) in CC_MipsO32()
3075 if (ArgFlags.isSExt()) in CC_MipsO32()
3077 else if (ArgFlags.isZExt()) in CC_MipsO32()
3090 Align OrigAlign = ArgFlags.getNonZeroOrigAlign(); in CC_MipsO32()
3100 if (ArgFlags.isSplit()) { in CC_MipsO32()
3165 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp359 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Lanai32_VarArg() argument
364 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Lanai32_VarArg()
370 if (ArgFlags.isSExt()) in CC_Lanai32_VarArg()
372 else if (ArgFlags.isZExt()) in CC_Lanai32_VarArg()

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