Searched refs:And0 (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoopIdiomRecognition.cpp | 1607 Instruction *And0 = dyn_cast<Instruction>(I->getOperand(0)); in setupPreSimplifier() local
1609 if (!And0 || !And1) in setupPreSimplifier()
1611 if (And0->getOpcode() != Instruction::And || in setupPreSimplifier()
1614 if (And0->getOperand(1) != And1->getOperand(1)) in setupPreSimplifier()
1617 return B.CreateAnd(B.CreateXor(And0->getOperand(0), And1->getOperand(0)), in setupPreSimplifier()
1618 And0->getOperand(1)); in setupPreSimplifier()
1739 Instruction *And0 = dyn_cast<Instruction>(Xor->getOperand(0)); in setupPostSimplifier() local
1742 if (!And0 || And0->getOpcode() != Instruction::And) in setupPostSimplifier()
1743 std::swap(And0, And1); in setupPostSimplifier()
1744 ConstantInt *C1 = dyn_cast<ConstantInt>(And0->getOperand(1)); in setupPostSimplifier()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3727 SDValue And0 = N->getOperand(0); in tryBitfieldInsertOpFromOr() local
3729 if (And0.hasOneUse() && And1.hasOneUse() && in tryBitfieldInsertOpFromOr()
3730 isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) && in tryBitfieldInsertOpFromOr()
3739 std::swap(And0, And1); in tryBitfieldInsertOpFromOr()
3744 SDValue Dst = And0->getOperand(0); in tryBitfieldInsertOpFromOr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4838 SDValue And0 = And->getOperand(0); in shrinkAndImmediate() local
4857 KnownBits Known0 = CurDAG->computeKnownBits(And0); in shrinkAndImmediate()
4864 ReplaceNode(And, And0.getNode()); in shrinkAndImmediate()
4871 SDValue NewAnd = CurDAG->getNode(ISD::AND, SDLoc(And), VT, And0, NewMask); in shrinkAndImmediate()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7157 SDValue And0 = And->getOperand(0), And1 = And->getOperand(1); in combineShiftAnd1ToBitTest() local
7158 if (And0.getOpcode() == ISD::ANY_EXTEND && And0.hasOneUse()) in combineShiftAnd1ToBitTest()
7159 And0 = And0.getOperand(0); in combineShiftAnd1ToBitTest()
7160 if (!isOneConstant(And1) || !And0.hasOneUse()) in combineShiftAnd1ToBitTest()
7163 SDValue Src = And0; in combineShiftAnd1ToBitTest()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 8219 Register And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask).getReg(0); in lowerFCopySign() local
8243 MIRBuilder.buildOr(Dst, And0, And1, Flags); in lowerFCopySign()
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