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Searched refs:AllocationOrder (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegAllocGreedy.h43 class AllocationOrder; variable
321 const AllocationOrder &Order);
332 MCRegister tryAssign(const LiveInterval &, AllocationOrder &,
334 MCRegister tryEvict(const LiveInterval &, AllocationOrder &,
337 MCRegister tryRegionSplit(const LiveInterval &, AllocationOrder &,
341 AllocationOrder &Order,
347 AllocationOrder &Order,
357 AllocationOrder &Order);
361 AllocationOrder &Order, MCRegister PhysReg,
365 MCRegister tryBlockSplit(const LiveInterval &, AllocationOrder &,
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H A DAllocationOrder.h30 class LLVM_LIBRARY_VISIBILITY AllocationOrder {
45 const AllocationOrder &AO;
49 Iterator(const AllocationOrder &AO, int Pos) : AO(AO), Pos(Pos) {} in Iterator()
84 static AllocationOrder create(Register VirtReg, const VirtRegMap &VRM,
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() function
H A DAllocationOrder.cpp29 AllocationOrder AllocationOrder::create(Register VirtReg, const VirtRegMap &VRM, in create()
50 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
H A DRegisterScavenging.cpp129 const LiveRegUnits &LiveOut, ArrayRef<MCPhysReg> AllocationOrder, in findSurvivorBackwards() argument
151 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
176 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
304 ArrayRef<MCPhysReg> AllocationOrder = RC.getRawAllocationOrder(MF); in scavengeRegisterBackwards() local
306 *MRI, std::prev(MBBI), To, LiveUnits, AllocationOrder, RestoreAfter); in scavengeRegisterBackwards()
H A DRegAllocGreedy.cpp532 AllocationOrder &Order, in tryAssign()
598 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix)) { in canReassign()
666 const AllocationOrder &Order, in getOrderLimit()
712 AllocationOrder &Order, in tryEvict()
1003 const AllocationOrder &Order) { in calcGlobalSplitCost()
1196 AllocationOrder &Order, in tryRegionSplit()
1230 AllocationOrder &Order, in calculateRegionSplitCostAroundReg()
1307 AllocationOrder &Order, in calculateRegionSplitCost()
1369 AllocationOrder &Order) { in trySplitAroundHintReg()
1429 AllocationOrder &Order, in tryBlockSplit()
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H A DMLRegallocEvictAdvisor.cpp
H A DRegAllocFast.cpp957 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtReg() local
958 for (MCPhysReg PhysReg : AllocationOrder) { in allocVirtReg()
1008 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtRegUndef() local
1009 if (AllocationOrder.empty()) { in allocVirtRegUndef()
1019 PhysReg = AllocationOrder.front(); in allocVirtRegUndef()
1203 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in getErrorAssignment() local
1204 if (AllocationOrder.empty()) { in getErrorAssignment()
1231 return AllocationOrder.front(); in getErrorAssignment()
H A DMLRegAllocEvictAdvisor.cpp315 const AllocationOrder &Order,
331 const LiveInterval &VirtReg, const AllocationOrder &Order,
488 const LiveInterval &VirtReg, const AllocationOrder &Order,
658 const LiveInterval &, const AllocationOrder &, unsigned, uint8_t, in tryFindEvictionCandidatePosition() argument
744 const LiveInterval &VirtReg, const AllocationOrder &Order, in tryFindEvictionCandidate()
1178 const LiveInterval &VirtReg, const AllocationOrder &Order, in tryFindEvictionCandidatePosition()
H A DRegAllocBasic.cpp265 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in selectOrSplit()
H A DRegAllocEvictionAdvisor.cpp332 const LiveInterval &VirtReg, const AllocationOrder &Order, in tryFindEvictionCandidate()
H A DInlineSpiller.cpp160 AllocationOrder *Order = nullptr;
196 void spill(LiveRangeEdit &, AllocationOrder *Order = nullptr) override;
1307 void InlineSpiller::spill(LiveRangeEdit &edit, AllocationOrder *order) { in spill()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegAllocEvictionAdvisor.h26 class AllocationOrder; variable
109 const LiveInterval &VirtReg, const AllocationOrder &Order,
130 const AllocationOrder &Order,
287 const AllocationOrder &, uint8_t,
H A DSpiller.h27 class AllocationOrder; variable
40 virtual void spill(LiveRangeEdit &LRE, AllocationOrder *Order = nullptr) = 0;
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td500 // Make AllocationOrder as similar as G8RC's to avoid potential spilling.
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td89 // or AllocationOrder
/freebsd/lib/clang/libllvm/
H A DMakefile226 SRCS_MIN+= CodeGen/AllocationOrder.cpp