| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | DivisionByConstantInfo.cpp | 82 APInt AllOnes = in get() local
88 APInt NC = AllOnes - (AllOnes + 1 - D).urem(D); in get()
|
| H A D | APFloat.cpp | 92 AllOnes, enumerator
141 8, -6, 4, 8, fltNonfiniteBehavior::NanOnly, fltNanEncoding::AllOnes};
1111 semantics->nanEncoding == fltNanEncoding::AllOnes) { in isLargest()
1556 semantics->nanEncoding == fltNanEncoding::AllOnes) in handleOverflow()
1660 semantics->nanEncoding == fltNanEncoding::AllOnes && in normalize()
1708 semantics->nanEncoding == fltNanEncoding::AllOnes && in normalize()
3858 } else if constexpr (S.nanEncoding == fltNanEncoding::AllOnes) { in initFromIEEEAPInt()
4017 semantics->nanEncoding == fltNanEncoding::AllOnes) in makeLargest()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1326 static inline bool isZeroOrAllOnes(SDValue N, bool AllOnes) { in isZeroOrAllOnes() argument
1327 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
1348 static bool isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, in isConditionalZeroOrAllOnes() argument
1358 if (isZeroOrAllOnes(N1, AllOnes)) { in isConditionalZeroOrAllOnes()
1363 if (isZeroOrAllOnes(N2, AllOnes)) { in isConditionalZeroOrAllOnes()
1372 if (AllOnes) in isConditionalZeroOrAllOnes()
1389 Invert = !AllOnes; in isConditionalZeroOrAllOnes()
1390 if (AllOnes) in isConditionalZeroOrAllOnes()
1420 bool AllOnes) { in combineSelectAndUse() argument
1426 if (!isConditionalZeroOrAllOnes(Slct.getNode(), AllOnes, CCOp, SwapSelectOps, in combineSelectAndUse()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | Bitfields.h | 107 static constexpr Unsigned AllOnes = ~Unsigned(0); // 11111111 member
109 static constexpr Unsigned Umax = AllOnes >> (TypeBits - Bits); // 00111111
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 1212 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitShl() local
1213 Value *Mask = Builder.CreateShl(AllOnes, Op1); in visitShl()
1219 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitShl() local
1220 return BinaryOperator::CreateShl(AllOnes, Op1); in visitShl()
1581 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitLShr() local
1582 Value *Mask = Builder.CreateLShr(AllOnes, Op1); in visitLShr()
1588 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitLShr() local
1589 return BinaryOperator::CreateLShr(AllOnes, Op1); in visitLShr()
|
| H A D | InstCombineAddSub.cpp | 1666 Constant *AllOnes = ConstantInt::getAllOnesValue(RHS->getType()); in visitAdd() local
1667 Value *Dec = Builder.CreateAdd(A, AllOnes); in visitAdd()
1668 Value *Not = Builder.CreateXor(A, AllOnes); in visitAdd()
|
| H A D | InstCombineAndOrXor.cpp | 3851 Value *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitOr() local
3852 return SelectInst::Create(NewICmpInst, AllOnes, X); in visitOr()
|
| H A D | InstCombineCompares.cpp | 7397 Constant *AllOnes = Constant::getAllOnesValue(Op0->getType()); in visitICmpInst() local
7398 return new ICmpInst(ICmpInst::ICMP_SGT, Op0, AllOnes); in visitICmpInst()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ModuleSummaryIndexYAML.h | 25 io.enumCase(value, "AllOnes", TypeTestResolution::AllOnes);
|
| H A D | ModuleSummaryIndex.h | 1213 AllOnes, ///< All-ones bit vector ("Eliminating Bit Vector Checks for
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | LowerTypeTests.cpp | 780 if (TIL.TheKind == TypeTestResolution::AllOnes) in lowerTypeTestCall()
933 TIL.TheKind == TypeTestResolution::AllOnes) { in exportTypeId()
1013 TIL.TheKind == TypeTestResolution::AllOnes) { in importTypeId()
1139 : TypeTestResolution::AllOnes; in lowerTypeTestCalls()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 984 SDValue AllOnes = in PreprocessISelDAG() local
986 AllOnes = CurDAG->getBitcast(VT, AllOnes); in PreprocessISelDAG()
990 CurDAG->getNode(NewOpcode, DL, VT, N->getOperand(0), AllOnes); in PreprocessISelDAG()
4328 SDValue AllOnes = CurDAG->getAllOnesConstant(DL, OpVT); in tryShiftAmountMod() local
4330 Add0C == nullptr ? Add0 : Add1, AllOnes); in tryShiftAmountMod()
4331 insertDAGNode(*CurDAG, OrigShiftAmt, AllOnes); in tryShiftAmountMod()
|
| H A D | X86ISelLowering.cpp | 10489 SDValue Zero, AllOnes; in lowerShuffleAsBitMask() local
10501 AllOnes = DAG.getConstantFP(AllOnesValue, DL, EltVT); in lowerShuffleAsBitMask()
10506 AllOnes = DAG.getAllOnesConstant(DL, EltVT); in lowerShuffleAsBitMask()
10521 VMaskOps[i] = AllOnes; in lowerShuffleAsBitMask()
10544 SDValue AllOnes = DAG.getAllOnesConstant(DL, EltVT); in lowerShuffleAsBitBlend() local
10549 MaskOps.push_back(Mask[i] < Size ? AllOnes : Zero); in lowerShuffleAsBitBlend()
39067 APInt AllOnes = APInt::getAllOnes(MaskEltSizeInBits); in combineX86ShuffleChain() local
39078 EltBits[i] = AllOnes; in combineX86ShuffleChain()
49549 SDValue AllOnes = DAG.getAllOnesConstant(dl, VT); in combineAndLoadToBZHI() local
49550 SDValue LShr = DAG.getNode(ISD::SRL, dl, VT, AllOnes, Sub); in combineAndLoadToBZHI()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 249 Register buildOnesVal(bool AllOnes, const SPIRVType *ResType,
1647 Register SPIRVInstructionSelector::buildOnesVal(bool AllOnes, in buildOnesVal() argument
1652 AllOnes ? APInt::getAllOnes(BitWidth) : APInt::getOneBitSet(BitWidth, 0); in buildOnesVal()
|
| H A D | SPIRVBuiltins.cpp | 426 uint64_t AllOnes = APInt::getAllOnes(Bits).getZExtValue(); in buildSelectInst() local
427 TrueConst = GR->getOrCreateConsIntVector(AllOnes, MIRBuilder, ReturnType); in buildSelectInst()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6073 SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createVMOVModImm(0xe, 0xff), in LowerFCOPYSIGN() local
6075 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
6077 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
8594 SDValue AllOnes = in PromoteMVEPredVector() local
8596 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
8617 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
12502 static inline bool isZeroOrAllOnes(SDValue N, bool AllOnes) { in isZeroOrAllOnes() argument
12503 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
12518 static bool isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, in isConditionalZeroOrAllOnes() argument
12528 if (isZeroOrAllOnes(N1, AllOnes)) { in isConditionalZeroOrAllOnes()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 1956 Value *AllOnes = (PropagateShadow && PoisonUndef) ? getPoisonedShadow(V) in getShadow() local
1958 LLVM_DEBUG(dbgs() << "Undef: " << *U << " ==> " << *AllOnes << "\n"); in getShadow()
1960 return AllOnes; in getShadow()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/GlobalISel/ |
| H A D | GlobalISelMatchTable.h | 1606 enum SplatKind { AllZeros, AllOnes }; enumerator
|
| H A D | GlobalISelMatchTable.cpp | 1645 if (Kind == AllOnes) in emitPredicateOpcodes()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 1170 ImmAllOnesV ? VectorSplatImmPredicateMatcher::AllOnes in importChildMatcher()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4542 SDValue AllOnes = DAG.getAllOnesConstant(DL, LegalSVT); in visitMUL() local
4543 SmallVector<SDValue, 16> Mask(NumElts, AllOnes); in visitMUL()
4824 SDValue AllOnes = DAG.getAllOnesConstant(DL, VT); in visitSDIVLike() local
4826 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ); in visitSDIVLike()
8494 SDValue AllOnes = DAG.getAllOnesConstant(DL, VT); in MatchRotate() local
8495 SDValue Mask = AllOnes; in MatchRotate()
8498 SDValue RHSBits = DAG.getNode(ISD::SRL, DL, VT, AllOnes, RHSShiftAmt); in MatchRotate()
8503 SDValue LHSBits = DAG.getNode(ISD::SHL, DL, VT, AllOnes, LHSShiftAmt); in MatchRotate()
22246 SDValue AllOnes = DAG.getAllOnesConstant(DL, MaxEltVT); in visitINSERT_VECTOR_ELT() local
22249 Mask[I] = Ops[I] ? Zero : AllOnes; in visitINSERT_VECTOR_ELT()
|
| H A D | TargetLowering.cpp | 10378 SDValue AllOnes = DAG.getAllOnesConstant(dl, VT); in expandAddSubSat() local
10387 return DAG.getSelect(dl, VT, Overflow, AllOnes, SumDiff); in expandAddSubSat()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 13195 // -> (select cond, x, (and x, c)) [AllOnes=1]
13197 // -> (select cond, x, (or x, c)) [AllOnes=0]
13199 // -> (select cond, x, (xor x, c)) [AllOnes=0]
13201 // -> (select cond, x, (add x, c)) [AllOnes=0] in combineSelectAndUse()
13203 // -> (select cond, x, (sub x, c)) [AllOnes=0] in combineSelectAndUse()
13205 SelectionDAG &DAG, bool AllOnes, in combineSelectAndUse()
13234 auto isZeroOrAllOnes = [](SDValue N, bool AllOnes) { in combineSelectAndUse()
13235 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in combineSelectAndUse()
13243 if (isZeroOrAllOnes(TrueVal, AllOnes)) { in combineSelectAndUse()
13246 } else if (isZeroOrAllOnes(FalseVal, AllOnes)) { in combineSelectAndUse()
13202 combineSelectAndUse(SDNode * N,SDValue Slct,SDValue OtherOp,SelectionDAG & DAG,bool AllOnes,const RISCVSubtarget & Subtarget) combineSelectAndUse() argument
13231 __anon765c18b71102(SDValue N, bool AllOnes) combineSelectAndUse() argument
13267 combineSelectAndUseCommutative(SDNode * N,SelectionDAG & DAG,bool AllOnes,const RISCVSubtarget & Subtarget) combineSelectAndUseCommutative() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AsmWriter.cpp | 3141 case TypeTestResolution::AllOnes: in getTTResKindName()
|
| /freebsd/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 8938 TTRes.TheKind = TypeTestResolution::AllOnes; in parseTypeTestResolution()
|