Searched refs:AddrNumOperands (Results 1 – 14 of 14) sorted by relevance
1070 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1094 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1137 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1150 Prefix.set4VV2(MI, CurOp + X86::AddrNumOperands); in emitVEXOpcodePrefix()1182 CurOp += X86::AddrNumOperands + 1; // Skip first imm. in emitVEXOpcodePrefix()1399 CurOp += X86::AddrNumOperands; in emitREXPrefix()1408 CurOp += X86::AddrNumOperands; in emitREXPrefix()1670 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1679 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1698 CurOp = MemOp + X86::AddrNumOperands; in encodeInstruction()[all …]
36 AddrNumOperands = 5 enumerator
291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()509 const MachineOperand &PushOp = Store->getOperand(X86::AddrNumOperands); in adjustCallSequence()555 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
281 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in expandMI()347 for (unsigned i = 0; i != X86::AddrNumOperands; ++i) in expandMI()477 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandMI()501 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in expandMI()502 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in expandMI()511 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandMI()768 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandVastartSaveXmmRegs()
425 MachineOperand &StoreSrcVReg = StoreInst->getOperand(X86::AddrNumOperands); in buildCopy()427 NewStore->getOperand(X86::AddrNumOperands).setIsKill(StoreSrcVReg.isKill()); in buildCopy()
534 MemOpEnd = MemOpStart + X86::AddrNumOperands; in usedAsAddr()569 OpIdx += (X86::AddrNumOperands - 1); in buildClosure()
733 if (MI.getOperand(X86::AddrNumOperands).getSubReg() == 0 && in isStoreToStackSlot()735 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlot()752 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlotPostFE()3577 if (NumOps < X86::AddrNumOperands) { in getFirstAddrOperandIdx()3588 for (unsigned I = 0, E = NumOps - X86::AddrNumOperands; I != E; ++I) { in getFirstAddrOperandIdx()3592 Desc.operands().begin() + I + X86::AddrNumOperands, in getFirstAddrOperandIdx()3606 assert(MI.getNumOperands() >= (OpNo + X86::AddrNumOperands) && in getConstantFromPool()6048 Register SrcReg = MIB.getReg(X86::AddrNumOperands); in expandNOVLXStore()6058 MIB->getOperand(X86::AddrNumOperands).setReg(SrcReg); in expandNOVLXStore()7377 if (MOs.size() == X86::AddrNumOperands && in foldMemoryOperandImpl()[all …]
173 return Op + X86::AddrNumOperands <= MI.getNumOperands() && in isMem()
428 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()499 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()1862 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()
805 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()
359 assert(MI.getNumOperands() >= (OperandNo + X86::AddrNumOperands) && in processInstruction()
1181 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
34555 static_assert(X86::AddrNumOperands == 5, "VAARG assumes 5 address operands"); in EmitVAARGWithCustomInserter()35771 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitSetJmpShadowStackFix()35879 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjSetJmp()36040 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitLongJmpShadowStackFix()36173 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36185 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36199 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36711 .addReg(MI.getOperand(X86::AddrNumOperands).getReg()); in EmitInstrWithCustomInserter()36822 for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx) in EmitInstrWithCustomInserter()36824 MIB.add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()[all …]
3843 X86::AddrNumOperands - 1).getReg(); in validateInstruction()