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Searched refs:AddrIdx (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DSignals.cpp170 for (unsigned AddrIdx = 0; AddrIdx < AddressCount; AddrIdx++) { in collectAddressSymbols() local
171 if (Modules[AddrIdx]) in collectAddressSymbols()
172 Input << Modules[AddrIdx] << " " << (void *)Offsets[AddrIdx] << "\n"; in collectAddressSymbols()
208 for (unsigned AddrIdx = 0; AddrIdx < AddressCount; AddrIdx++) { in collectAddressSymbols() local
209 if (!Modules[AddrIdx]) { in collectAddressSymbols()
210 auto &SymbolizedFrame = Result.emplace_back(std::make_pair(AddrIdx, "")); in collectAddressSymbols()
212 OS << format_ptr(AddressList[AddrIdx]); in collectAddressSymbols()
223 auto &SymbolizedFrame = Result.emplace_back(std::make_pair(AddrIdx, "")); in collectAddressSymbols()
225 OS << format_ptr(AddressList[AddrIdx]) << ' '; in collectAddressSymbols()
234 OS << "(" << Modules[AddrIdx] << '+' << format_hex(Offsets[AddrIdx], 0) in collectAddressSymbols()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp123 void sandboxLoadStoreStackChange(const MCInst &MI, unsigned AddrIdx, in sandboxLoadStoreStackChange() argument
129 MCRegister BaseReg = MI.getOperand(AddrIdx).getReg(); in sandboxLoadStoreStackChange()
156 unsigned AddrIdx = 0; in emitInstruction() local
158 bool IsMemAccess = isBasePlusOffsetMemoryAccess(Inst.getOpcode(), &AddrIdx, in emitInstruction()
163 && baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx) in emitInstruction()
169 sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); in emitInstruction()
209 bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx, in isBasePlusOffsetMemoryAccess() argument
230 *AddrIdx = 1; in isBasePlusOffsetMemoryAccess()
241 *AddrIdx = 1; in isBasePlusOffsetMemoryAccess()
249 *AddrIdx = 2; in isBasePlusOffsetMemoryAccess()
H A DMipsMCNaCl.h20 bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx,
/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/GSYM/
H A DGsymReader.cpp267 for (uint64_t AddrIdx = FirstAddrIdx; AddrIdx < NumAddresses; ++AddrIdx) { in getFunctionInfoDataForAddress() local
268 auto ExpextedData = getFunctionInfoDataAtIndex(AddrIdx, FuncStartAddr); in getFunctionInfoDataForAddress()
299 GsymReader::getFunctionInfoDataAtIndex(uint64_t AddrIdx, in getFunctionInfoDataAtIndex() argument
301 if (AddrIdx >= getNumAddresses()) in getFunctionInfoDataAtIndex()
303 "invalid address index %" PRIu64, AddrIdx); in getFunctionInfoDataAtIndex()
304 const uint32_t AddrInfoOffset = AddrInfoOffsets[AddrIdx]; in getFunctionInfoDataAtIndex()
312 std::optional<uint64_t> OptFuncStartAddr = getAddress(AddrIdx); in getFunctionInfoDataAtIndex()
315 "failed to extract address[%" PRIu64 "]", AddrIdx); in getFunctionInfoDataAtIndex()
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/GSYM/
H A DGsymReader.h118 getFunctionInfoAtIndex(uint64_t AddrIdx) const;
422 getFunctionInfoDataAtIndex(uint64_t AddrIdx, uint64_t &FuncStartAddr) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp121 int AddrIdx[MaxAddressRegs]; member
132 const MachineOperand &AddrRegNext = MI.getOperand(AddrIdx[i]); in hasSameBaseAddress()
858 AddrIdx[NumAddresses++] = in setMI()
861 AddrIdx[NumAddresses++] = in setMI()
864 AddrIdx[NumAddresses++] = in setMI()
867 AddrIdx[NumAddresses++] = AMDGPU::getNamedOperandIdx( in setMI()
870 AddrIdx[NumAddresses++] = in setMI()
873 AddrIdx[NumAddresses++] = in setMI()
876 AddrIdx[NumAddresses++] = in setMI()
879 AddrIdx[NumAddresses++] = AMDGPU::getNamedOperandIdx( in setMI()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp735 unsigned AddrIdx; in searchRange() local
736 if ((isBasePlusOffsetMemoryAccess(CurrI->getOpcode(), &AddrIdx) && in searchRange()
737 baseRegNeedsLoadStoreMask(CurrI->getOperand(AddrIdx).getReg())) || in searchRange()