| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 111 AddSub, // ADD, SUB enumerator
237 return FirstMacroFusionInstKind::AddSub; in classifyFirstOpcodeInMacroFusion()
297 case X86::FirstMacroFusionInstKind::AddSub: in isMacroFused()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 737 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg() local
739 AddSub = ARM_AM::sub; in SelectLdStSOReg()
745 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
768 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg() local
831 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectLdStSOReg()
842 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg() local
867 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectAddrMode2OffsetReg()
878 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre() local
882 if (AddSub == ARM_AM::sub) Val *= -1; in SelectAddrMode2OffsetImmPre()
898 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm() local
[all …]
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| H A D | ARMLoadStoreOptimizer.cpp | 1522 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore() local
1556 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1586 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
2303 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord() local
2305 AddSub = ARM_AM::sub; in CanFormLdStDWord()
2311 Offset = ARM_AM::getAM3Opc(AddSub, OffImm); in CanFormLdStDWord()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 1128 BinaryOperator *AddSub; in matchSAddSubSat() local
1131 if (!match(MinMax2, m_SMax(m_BinOp(AddSub), m_APInt(MinValue)))) in matchSAddSubSat()
1135 if (!match(MinMax2, m_SMin(m_BinOp(AddSub), m_APInt(MaxValue)))) in matchSAddSubSat()
1152 if (!MinMax2->hasOneUse() || !AddSub->hasOneUse()) in matchSAddSubSat()
1159 if (AddSub->getOpcode() == Instruction::Add) in matchSAddSubSat()
1161 else if (AddSub->getOpcode() == Instruction::Sub) in matchSAddSubSat()
1168 if (ComputeMaxSignificantBits(AddSub->getOperand(0), 0, AddSub) > in matchSAddSubSat()
1170 ComputeMaxSignificantBits(AddSub->getOperand(1), 0, AddSub) > NewBitWidth) in matchSAddSubSat()
1175 Value *AT = Builder.CreateTrunc(AddSub->getOperand(0), NewTy); in matchSAddSubSat()
1176 Value *BT = Builder.CreateTrunc(AddSub->getOperand(1), NewTy); in matchSAddSubSat()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3010 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands() local
3016 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
3035 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands() local
3039 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
3063 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands() local
3069 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAddrMode3Operands()
3095 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands() local
3099 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAM3OffsetOperands()
3121 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands() local
3127 Val = ARM_AM::getAM5Opc(AddSub, Val); in addAddrMode5Operands()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 222 def SVEAddSubImmOperand8 : SVEShiftedImmOperand<8, "AddSub", "isSVEAddSubImm<int8_t>">;
223 def SVEAddSubImmOperand16 : SVEShiftedImmOperand<16, "AddSub", "isSVEAddSubImm<int16_t>">;
224 def SVEAddSubImmOperand32 : SVEShiftedImmOperand<32, "AddSub", "isSVEAddSubImm<int32_t>">;
225 def SVEAddSubImmOperand64 : SVEShiftedImmOperand<64, "AddSub", "isSVEAddSubImm<int64_t>">;
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| H A D | AArch64InstrInfo.td | 2291 defm ADD : AddSub<0, "add", "sub", add>;
2292 defm SUB : AddSub<1, "sub", "add">;
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| H A D | AArch64InstrFormats.td | 2903 multiclass AddSub<bit isSub, string mnemonic, string alias,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8885 if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, dl, Subtarget, DAG)) in LowerBUILD_VECTOR() local
8886 return AddSub; in LowerBUILD_VECTOR()
41765 if (SDValue AddSub = in combineShuffle() local
41767 return AddSub; in combineShuffle()
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