Searched refs:AddRHS (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 2410 Value *AddLHS, *AddRHS; in match() local
2411 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
2415 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
2416 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
2420 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
2421 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
2441 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
2442 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
2446 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
2447 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstructionCombining.cpp | 3747 ConstantInt *AddRHS; in visitSwitchInst() local
3748 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
3751 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2340 Register AddRHS = I.getOperand(2).getReg(); in earlySelect() local
2371 MachineInstr *Cmp = MatchCmp(AddRHS); in earlySelect()
2374 std::swap(AddLHS, AddRHS); in earlySelect()
2375 Cmp = MatchCmp(AddRHS); in earlySelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 4609 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
4610 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
4611 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
4614 return AddRHS->getOperand(1); in MatchNotExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 13711 SDValue AddRHS = RHS; in tryFoldToMad64_32() local
13732 AddRHS = DAG.getNode(ISD::ANY_EXTEND, SL, MVT::i64, AddRHS); in tryFoldToMad64_32()
13752 getMad64_32(DAG, SL, MVT::i64, MulLHSLo, MulRHSLo, AddRHS, MulSignedLo); in tryFoldToMad64_32()
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