Searched refs:AddRHS (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 2554 Value *AddLHS, *AddRHS; in match() local
2555 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
2559 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
2560 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
2564 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
2565 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
2585 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
2586 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
2590 (m_One().match(AddLHS) || m_One().match(AddRHS))) in match()
2591 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | Expr.cpp | 4800 const Expr *AddLHS = nullptr, *AddRHS = nullptr; in getOverflowPatternBinOp() local
4806 AddRHS = BO->getRHS(); in getOverflowPatternBinOp()
4809 if (!AddLHS || !AddRHS) in getOverflowPatternBinOp()
4815 RHSDecl = AddRHS->IgnoreParenImpCasts()->getReferencedDeclOfCallee(); in getOverflowPatternBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstructionCombining.cpp | 4137 ConstantInt *AddRHS; in visitSwitchInst() local
4138 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
4141 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2469 Register AddRHS = I.getOperand(2).getReg(); in earlySelect() local
2500 MachineInstr *Cmp = MatchCmp(AddRHS); in earlySelect()
2503 std::swap(AddLHS, AddRHS); in earlySelect()
2504 Cmp = MatchCmp(AddRHS); in earlySelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 14474 SDValue AddRHS) { in tryFoldMADwithSRL() argument
14483 MulLHS.getOperand(0) != AddRHS) in tryFoldMADwithSRL()
14494 DAG.getZeroExtendInReg(AddRHS, SL, MVT::i32), false); in tryFoldMADwithSRL()
14553 SDValue AddRHS = RHS; in tryFoldToMad64_32() local
14555 if (SDValue FoldedMAD = tryFoldMADwithSRL(DAG, SL, MulLHS, MulRHS, AddRHS)) in tryFoldToMad64_32()
14577 AddRHS = DAG.getNode(ISD::ANY_EXTEND, SL, MVT::i64, AddRHS); in tryFoldToMad64_32()
14597 getMad64_32(DAG, SL, MVT::i64, MulLHSLo, MulRHSLo, AddRHS, MulSignedLo); in tryFoldToMad64_32()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 4575 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
4576 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
4577 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
4580 return AddRHS->getOperand(1); in MatchNotExpr()
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