| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 577 SDValue AddOp; in isADDADDMUL() local
580 AddOp = N0; in isADDADDMUL()
583 AddOp = N1; in isADDADDMUL()
588 if (requireIntermediatesHaveOneUse && !AddOp.hasOneUse()) in isADDADDMUL()
596 Addend0 = AddOp.getOperand(0); in isADDADDMUL()
597 Addend1 = AddOp.getOperand(1); in isADDADDMUL()
600 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) { in isADDADDMUL()
602 if (requireIntermediatesHaveOneUse && !AddOp.getOperand(0).hasOneUse()) in isADDADDMUL()
604 Mul0 = AddOp.getOperand(0).getOperand(0); in isADDADDMUL()
605 Mul1 = AddOp.getOperand(0).getOperand(1); in isADDADDMUL()
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| /freebsd/contrib/llvm-project/llvm/lib/TableGen/ |
| H A D | SetTheory.cpp | 38 struct AddOp : public SetTheory::Operator { struct
257 addOperator("add", std::make_unique<AddOp>()); in SetTheory()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanRecipes.cpp | 1298 Instruction::BinaryOps AddOp; in execute() local
1301 AddOp = Instruction::Add; in execute()
1304 AddOp = ID.getInductionOpcode(); in execute()
1341 Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")); in execute()
1418 Instruction::BinaryOps AddOp; in execute() local
1421 AddOp = Instruction::Add; in execute()
1424 AddOp = InductionOpcode; in execute()
1463 auto *Add = Builder.CreateBinOp(AddOp, SplatIV, Mul); in execute()
1475 AddOp, StartIdx0, getSignedIntOrFpConstant(BaseIVTy, Lane)); in execute()
1482 auto *Add = Builder.CreateBinOp(AddOp, BaseIV, Mul); in execute()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 2033 Instruction *AddOp = nullptr, *SubOp = nullptr; in foldAddSubSelect() local
2038 AddOp = FI; in foldAddSubSelect()
2044 AddOp = TI; in foldAddSubSelect()
2048 if (AddOp) { in foldAddSubSelect()
2050 if (SubOp->getOperand(0) == AddOp->getOperand(0)) { in foldAddSubSelect()
2051 OtherAddOp = AddOp->getOperand(1); in foldAddSubSelect()
2052 } else if (SubOp->getOperand(0) == AddOp->getOperand(1)) { in foldAddSubSelect()
2053 OtherAddOp = AddOp->getOperand(0); in foldAddSubSelect()
2063 FastMathFlags Flags = AddOp->getFastMathFlags(); in foldAddSubSelect()
2073 if (AddOp != TI) in foldAddSubSelect()
[all …]
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| H A D | InstCombineAddSub.cpp | 1022 constexpr unsigned AddOp = FP ? Instruction::FAdd : Instruction::Add; in matchesSquareSum() local
1027 AddOp, m_OneUse(m_BinOp(MulOp, m_Value(A), m_Deferred(A))), in matchesSquareSum()
1030 m_c_BinOp(AddOp, m_BinOp(Mul2Op, m_Deferred(A), M2Rhs), in matchesSquareSum()
1040 AddOp, in matchesSquareSum()
1047 m_c_BinOp(AddOp, m_BinOp(MulOp, m_Deferred(A), m_Deferred(A)), in matchesSquareSum()
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| /freebsd/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | UnsafeBufferUsage.cpp | 1346 const BinaryOperator *AddOp = nullptr; member in DerefSimplePtrArithFixableGadget
1355 AddOp(Result.Nodes.getNodeAs<BinaryOperator>(AddOpTag)), in DerefSimplePtrArithFixableGadget()
1987 const Expr *LHS = AddOp->getLHS(), *RHS = AddOp->getRHS(); in getFixits()
2002 getPastLoc(AddOp, SM, LangOpts); in getFixits()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2798 for (unsigned AddOp = 0, e = Ops.size(); AddOp != e; ++AddOp) in getAddExpr() local
2799 if (MulOpSCEV == Ops[AddOp]) { in getAddExpr()
2815 if (AddOp < Idx) { in getAddExpr()
2816 Ops.erase(Ops.begin()+AddOp); in getAddExpr()
2820 Ops.erase(Ops.begin()+AddOp-1); in getAddExpr()
3193 for (const SCEV *AddOp : Add->operands()) { in getMulExpr() local
3194 const SCEV *Mul = getMulExpr(Ops[0], AddOp, SCEV::FlagAnyWrap, in getMulExpr()
4662 for (const SCEV *&AddOp : Ops) { in removePointerBase() local
4663 if (AddOp->getType()->isPointerTy()) { in removePointerBase()
4665 PtrOp = &AddOp; in removePointerBase()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1686 unsigned AddOp = AMDGPU::V_ADD_CO_U32_e32; in SelectFlatOffsetImpl() local
1688 AddOp = AMDGPU::V_ADD_U32_e64; in SelectFlatOffsetImpl()
1691 Addr = SDValue(CurDAG->getMachineNode(AddOp, DL, MVT::i32, Opnds), 0); in SelectFlatOffsetImpl()
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| H A D | AMDGPUISelLowering.cpp | 4286 SDValue AddOp = getAddOneOp(V.getNode()); in performMulCombine() local
4287 if (!AddOp) in performMulCombine()
4293 return AddOp; in performMulCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2056 const MachineOperand &AddOp = MI.getOperand(2); in getIncrementValue() local
2057 if (AddOp.isImm()) { in getIncrementValue()
2058 Value = AddOp.getImm(); in getIncrementValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 850 Register &MulOp2, Register &AddOp, in reassociateFMA()
855 GetOperandInfo(Instr.getOperand(AddOpIdx), AddOp, AddOpKillFlag); in reassociateFMA()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1111 unsigned AddOp = Opcode == ISD::SADDSAT ? ISD::ADD : ISD::SUB; in PromoteIntRes_ADDSUBSHLSAT() local
1117 matcher.getNode(AddOp, dl, PromotedType, Op1Promoted, Op2Promoted); in PromoteIntRes_ADDSUBSHLSAT()
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| H A D | DAGCombiner.cpp | 6321 SDValue AddOp = DAG.getNode(ISD::ADD, DL, OpVT, LHS0, in foldAndOrOfSETCC() local
6323 SDValue AndOp = DAG.getNode(ISD::AND, DL, OpVT, AddOp, in foldAndOrOfSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 39834 auto AddOp = [&Ops](SDValue Input, int InsertionPoint) -> int { in combineX86ShufflesRecursively() local
39853 AddOp(OpInput, OpInputIdx.empty() ? SrcOpIndex : -1)); in combineX86ShufflesRecursively()
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