Searched refs:AddC (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 457 const APInt *AC, *AddC; in commonShiftTransforms() local
463 if (match(Op0, m_APInt(AC)) && match(Op1, m_Add(m_Value(A), m_APInt(AddC))) && in commonShiftTransforms()
464 AddC->isNegative() && (-*AddC).ult(BitWidth)) { in commonShiftTransforms()
466 unsigned PosOffset = (-*AddC).getZExtValue(); in commonShiftTransforms()
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| H A D | InstCombineAndOrXor.cpp | 2170 Constant *ShiftedC1, *ShiftedC2, *AddC; in foldBinOpOfDisplacedShifts() local
2176 m_ImmConstant(AddC)))))) in foldBinOpOfDisplacedShifts()
2180 if (!match(AddC, in foldBinOpOfDisplacedShifts()
2201 I.getOpcode(), ShiftedC1, Builder.CreateBinOp(ShiftOp, ShiftedC2, AddC)); in foldBinOpOfDisplacedShifts()
2418 const APInt *AddC; in visitAnd() local
2419 if (match(Op0, m_Add(m_Value(X), m_APInt(AddC)))) { in visitAnd()
2424 if (Op0->hasOneUse() && C->isPowerOf2() && (*AddC & (*C - 1)) == 0) { in visitAnd()
2425 assert((*C & *AddC) != 0 && "Expected common bit"); in visitAnd()
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| H A D | InstCombineAddSub.cpp | 2585 const APInt *AddC, *AndC; in visitSub() local
2586 if (match(Op0, m_Add(m_Value(X), m_APInt(AddC))) && in visitSub()
2588 unsigned Cttz = AddC->countr_zero(); in visitSub()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 1736 const APInt *CmpC, *AddC; in combineToUSubWithOverflow() local
1737 if (match(U, m_Add(m_Specific(A), m_APInt(AddC))) && in combineToUSubWithOverflow()
1738 match(B, m_APInt(CmpC)) && *AddC == -(*CmpC)) { in combineToUSubWithOverflow()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 15646 ConstantSDNode *AddC = nullptr; in performSRACombine()
15652 AddC = dyn_cast<ConstantSDNode>(N0.getOperand(IsAdd ? 1 : 0)); in performSRACombine()
15653 if (!AddC) in performSRACombine()
15656 // AddC needs to have at least 32 trailing zeros. in performSRACombine()
15657 if (AddC->getAPIntValue().countr_zero() < 32) in performSRACombine()
15685 if (!AddC && !Shl.hasOneUse()) in performSRACombine()
15693 if (AddC) { in performSRACombine()
15695 DAG.getConstant(AddC->getAPIntValue().lshr(32), DL, MVT::i64); in performSRACombine()
15643 ConstantSDNode *AddC = nullptr; performSRACombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 53795 int64_t AddC = Sext ? AddOp1C->getSExtValue() : AddOp1C->getZExtValue(); in promoteExtBeforeAdd() local
53797 SDValue NewConstant = DAG.getConstant(AddC, SDLoc(Add), VT); in promoteExtBeforeAdd()
54433 SDValue AddC = LHS.getOperand(1); in combineSetCC() local
54435 DAG.isConstantIntBuildVectorOrConstantInt(AddC)) { in combineSetCC()
54444 if (ISD::isConstantSplatVectorAllOnes(AddC.getNode()) && in combineSetCC()
54452 C0 = DAG.getNegative(AddC, DL, OpVT); in combineSetCC()
54460 C0 = DAG.getNOT(DL, AddC, OpVT); in combineSetCC()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10431 if (ConstantSDNode *AddC = in visitSRA() local
10449 DAG.getConstant(AddC->getAPIntValue().lshr(ShiftAmt).trunc( in visitSRA()
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