Searched refs:Add0 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4305 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
4307 auto *Add0C = dyn_cast<ConstantSDNode>(Add0); in tryShiftAmountMod()
4312 NewShiftAmt = Add0; in tryShiftAmountMod()
4330 Add0C == nullptr ? Add0 : Add1, AllOnes); in tryShiftAmountMod()
4349 if (Add0.getValueType() != SubVT) { in tryShiftAmountMod()
4350 Add0 = CurDAG->getZExtOrTrunc(Add0, DL, SubVT); in tryShiftAmountMod()
4351 insertDAGNode(*CurDAG, OrigShiftAmt, Add0); in tryShiftAmountMod()
4354 X = CurDAG->getNode(ISD::ADD, DL, SubVT, Add1, Add0); in tryShiftAmountMod()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3771 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
3778 NewShiftAmt = Add0; in tryShiftAmountMod()
3780 isIntImmediate(Add0, Add0Imm) && Add0Imm != 0 && in tryShiftAmountMod()
3801 isIntImmediate(Add0, Add0Imm) && (Add0Imm % Size == Size - 1)) { in tryShiftAmountMod()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13591 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0)); in TryDistrubutionADDVecReduce() local
13592 return DAG.getNode(ISD::ADD, dl, VT, Add0, N1.getOperand(1)); in TryDistrubutionADDVecReduce()
13611 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0.getOperand(1 - N0RedOp), in TryDistrubutionADDVecReduce() local
13614 DAG.getNode(ISD::ADD, dl, VT, Add0, N0.getOperand(N0RedOp)); in TryDistrubutionADDVecReduce()
13701 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, X, N1); in TryDistrubutionADDVecReduce() local
13702 return DAG.getNode(ISD::ADD, dl, VT, Add0, N0); in TryDistrubutionADDVecReduce()
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