| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 78 unsigned AX = X86::AL; in emitRepstos() local 81 AX = X86::AL; in emitRepstos() 84 AX = X86::AX; in emitRepstos() 87 AX = X86::EAX; in emitRepstos() 90 AX = X86::RAX; in emitRepstos() 98 Chain = DAG.getCopyToReg(Chain, dl, AX, Val, InGlue); in emitRepstos()
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| H A D | X86InstrExtension.td | 14 let Defs = [AX], Uses = [AL] in // AX = signext(AL) 17 let Defs = [EAX], Uses = [AX] in // EAX = signext(AX) 26 let Defs = [AX,DX], Uses = [AX] in // DX:AX = signext(AX)
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| H A D | X86InstrArithmetic.td | 82 // AL is really implied by AX, but the registers in Defs must match the 88 let Defs = [AL, EFLAGS, AX], Uses = [AL] in 91 let Defs = [AX, DX, EFLAGS], Uses = [AX] in 97 let Defs = [AL, EFLAGS, AX], Uses = [AL] in 100 let Defs = [AX, DX, EFLAGS], Uses = [AX] in 108 let Defs = [AL, AX], Uses = [AL] in 110 let Defs = [AX, DX], Uses = [AX] in 116 let Defs = [AL, AX], Uses = [AL] in 118 let Defs = [AX, DX], Uses = [AX] in 125 let Defs = [AL, EFLAGS, AX], Uses = [AL] in [all …]
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| H A D | X86SchedSapphireRapids.td | 638 … "^VPM(AX|IN)(S|U)QZ128rm((b|k|bk|kz)?)$", 639 "^VPM(AX|IN)(S|U)QZ128rmbkz$", 688 "^VPM(AX|IN)(S|U)QZ(128|256)rr((k|kz)?)$", 1162 "^VM(AX|IN)CPHZ128rm((b|k|bk|kz)?)$", 1163 "^VM(AX|IN)CPHZ128rmbkz$", 1164 … "^VM(AX|IN|UL)PHZ128rm((b|k|bk|kz)?)$", 1165 "^VM(AX|IN|UL)PHZ128rmbkz$")>; 1171 "^VM(AX|IN)CSHZrm$", 1172 "^VM(AX|IN|UL)SHZrm$", 1173 "^VM(AX|IN|UL)SHZrm((k|kz)?)_Int$")>; [all …]
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| H A D | X86InstrMisc.td | 318 let Defs = [EDI], Uses = [AX,EDI,DF] in 332 let Defs = [EDI,EFLAGS], Uses = [AX,EDI,DF] in 440 let Defs = [AX] in 456 let Defs = [AX] in 469 let Uses = [AX] in 485 let Uses = [AX] in 502 let Defs = [AX] in 521 let Uses = [AX] in 873 let Uses = [AX], Defs = [AX] in 924 let Defs = [AX, EFLAGS], Uses = [AX] in [all …]
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| H A D | X86CallingConv.td | 54 let GPR_16 = [AX, CX, DX, DI, SI]; 88 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R10W, R11W, R12W, R14W, R15W]; 100 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R11W, R12W, R14W, R15W]; 107 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R12W, R13W, R14W, R15W]; 240 // Scalar values are returned in AX first, then DX. For i8, the ABI 244 // up in AX and AH, which overlap. Front-ends wishing to conform to the ABI 246 // values into an i16 (which uses AX, and thus AL:AH). 253 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>, 320 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>, 418 CCIfType<[i16], CCAssignToReg<[AX, DX, CX, R8W]>>,
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| H A D | X86RegisterInfo.td | 44 // AL aliases AX if we tell it that AX aliased AL (for example). 189 def AX : X86Reg<"ax", 0, [AL,AH]>; 237 def EAX : X86Reg<"eax", 0, [AX, HAX]>, DwarfRegNum<[-2, 0, 0]>; 569 (add AX, CX, DX, SI, DI, BX, BP, SP, R8W, R9W, R10W, 633 def GR16_ABCD : RegisterClass<"X86", [i16], 16, (add AX, CX, DX, BX)>; 653 (add AX, CX, DX, SI, DI, BX, BP, SP)>; 726 // A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
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| H A D | X86InstructionSelector.cpp | |
| H A D | X86FixupBWInsts.cpp | 354 MI->getOperand(0).getReg() == X86::AX && in tryReplaceExtend()
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| H A D | X86InstrAsmAlias.td | 764 def : InstAlias<"adc{w}\t{$imm, %ax|ax, $imm}", (ADC16ri8 AX, i16i8imm:$imm), 0>; 765 def : InstAlias<"add{w}\t{$imm, %ax|ax, $imm}", (ADD16ri8 AX, i16i8imm:$imm), 0>; 766 def : InstAlias<"and{w}\t{$imm, %ax|ax, $imm}", (AND16ri8 AX, i16i8imm:$imm), 0>; 767 def : InstAlias<"cmp{w}\t{$imm, %ax|ax, $imm}", (CMP16ri8 AX, i16i8imm:$imm), 0>; 768 def : InstAlias<"or{w}\t{$imm, %ax|ax, $imm}", (OR16ri8 AX, i16i8imm:$imm), 0>; 769 def : InstAlias<"sbb{w}\t{$imm, %ax|ax, $imm}", (SBB16ri8 AX, i16i8imm:$imm), 0>; 770 def : InstAlias<"sub{w}\t{$imm, %ax|ax, $imm}", (SUB16ri8 AX, i16i8imm:$imm), 0>; 771 def : InstAlias<"xor{w}\t{$imm, %ax|ax, $imm}", (XOR16ri8 AX, i16i8imm:$imm), 0>;
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/ |
| H A D | DirectX.cpp | 30 Value *AX = Builder.CreateExtractElement(A, Builder.getSize(0)); in EmitDirectXBuiltinExpr() local 38 ArrayRef<Value *>{Acc, AX, AY, BX, BY}, nullptr, "dx.dot2add"); in EmitDirectXBuiltinExpr()
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| /freebsd/contrib/libpcap/msdos/ |
| H A D | pkt_rx1.s | 71 ; 1st time (AX=0) it requests an address where to put the packet 73 ; 2nd time (AX=1) the packet has been copied to this location (DS:SI) 93 cmp ax, 0 ; first call? (AX=0) 94 jne @post ; AX=1: second call, do post process
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| H A D | pkt_rx0.asm | 115 ; 1st time (AX=0) it requests an address where to put the packet 117 ; 2nd time (AX=1) the packet has been copied to this location (DS:SI) 142 cmp ax, 0 ; first call? (AX=0) 143 jne @post ; AX=1: second call, do post process
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| /freebsd/contrib/ncurses/misc/ |
| H A D | run_tic.in | 151 You may see messages regarding extended capabilities, e.g., AX. 170 You may see messages regarding unknown capabilities, e.g., AX.
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| /freebsd/contrib/ncurses/ncurses/base/ |
| H A D | lib_dft_fgbg.c | 79 SP_PARM->_has_sgr_39_49 = (tigetflag(UserCap(AX)) == TRUE); in NCURSES_SP_NAME()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86EncodingOptimization.cpp | 302 FROM_TO(MOVSX16rr8, CBW, AX, AL) // movsbw %al, %ax --> cbtw in optimizeMOVSX() 303 FROM_TO(MOVSX32rr16, CWDE, EAX, AX) // movswl %ax, %eax --> cwtl in optimizeMOVSX() 334 return Reg == X86::AL || Reg == X86::AX || Reg == X86::EAX || Reg == X86::RAX; in isARegister()
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| H A D | X86MCTargetDesc.cpp | 188 {codeview::RegisterId::AX, X86::AX}, in initLLVMToSEHAndCVRegMapping() 773 SUB_SUPER(AL, AX, EAX, RAX, R) in getX86SubSuperRegister() 845 A_SUB_SUPER(AX) in getX86SubSuperRegister()
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| /freebsd/lib/libc/net/ |
| H A D | protocols | 100 ax.25 93 AX.25 # AX.25 Frames
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTContext.cpp | 13998 const auto *AX = cast<AutoType>(X), *AY = cast<AutoType>(Y); in getCommonNonSugarTypeNode() local 13999 assert(AX->getDeducedType().isNull()); in getCommonNonSugarTypeNode() 14001 assert(AX->getKeyword() == AY->getKeyword()); in getCommonNonSugarTypeNode() 14002 assert(AX->isInstantiationDependentType() == in getCommonNonSugarTypeNode() 14004 auto As = getCommonTemplateArguments(Ctx, AX->getTypeConstraintArguments(), in getCommonNonSugarTypeNode() 14006 return Ctx.getAutoType(QualType(), AX->getKeyword(), in getCommonNonSugarTypeNode() 14007 AX->isInstantiationDependentType(), in getCommonNonSugarTypeNode() 14008 AX->containsUnexpandedParameterPack(), in getCommonNonSugarTypeNode() 14009 getCommonDeclChecked(AX->getTypeConstraintConcept(), in getCommonNonSugarTypeNode() 14014 const auto *AX = cast<IncompleteArrayType>(X), in getCommonNonSugarTypeNode() local [all …]
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| /freebsd/sys/amd64/amd64/ |
| H A D | bpf_jit_machdep.c | 275 MOVobw(RCX, RSI, AX); in bpf_jit_compile() 347 MOVobw(RCX, RSI, AX); in bpf_jit_compile()
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| H A D | bpf_jit_machdep.h | 74 #define AX 0 macro
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| /freebsd/sys/i386/i386/ |
| H A D | bpf_jit_machdep.c | 288 MOVobw(EBX, ESI, AX); in bpf_jit_compile() 365 MOVobw(EBX, ESI, AX); in bpf_jit_compile()
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| H A D | bpf_jit_machdep.h | 49 #define AX 0 macro
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1700 X86::AX, in selectMulDivRem() 1712 X86::AX, in selectMulDivRem() 1715 {X86::IDIV16r, X86::CWD, Copy, X86::AX, S}, // SDiv in selectMulDivRem() 1717 {X86::DIV16r, X86::MOV32r0, Copy, X86::AX, U}, // UDiv in selectMulDivRem() 1719 {X86::IMUL16r, X86::MOV32r0, Copy, X86::AX, S}, // Mul in selectMulDivRem() 1847 .addReg(X86::AX); in selectMulDivRem()
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| /freebsd/share/misc/ |
| H A D | iso3166 | 23 AX ALA 248 Åland Islands 505 # ALAND ISLANDS (AX) added as a new entry. In the official newsletter,
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