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Searched refs:AVT (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp76 SDValue Val, SDValue Size, MVT AVT) { in emitRepstos() argument
79 switch (AVT.getSizeInBits()) { in emitRepstos()
106 SDValue Ops[] = {Chain, DAG.getValueType(AVT), InGlue}; in emitRepstos()
236 SDValue Src, SDValue Size, MVT AVT) { in emitRepmovs() argument
251 SDValue Ops[] = {Chain, DAG.getValueType(AVT), InGlue}; in emitRepmovs()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp752 for (MVT AVT : MVT::all_valuetypes()) { in initActions() local
754 setTruncStoreAction(AVT, VT, Expand); in initActions()
755 setLoadExtAction(ISD::EXTLOAD, AVT, VT, Expand); in initActions()
756 setLoadExtAction(ISD::ZEXTLOAD, AVT, VT, Expand); in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp17202 EVT AVT = A.getValueType(); in PerformVECREDUCE_ADDCombine() local
17204 return AVT.getVectorNumElements() == Ty.getVectorNumElements() && in PerformVECREDUCE_ADDCombine()
17205 AVT.bitsLE(Ty); in PerformVECREDUCE_ADDCombine()
17209 EVT AVT = A.getValueType(); in PerformVECREDUCE_ADDCombine() local
17210 if (!AVT.is128BitVector()) in PerformVECREDUCE_ADDCombine()
17212 AVT.changeVectorElementType(MVT::getIntegerVT( in PerformVECREDUCE_ADDCombine()
17213 128 / AVT.getVectorMinNumElements())), in PerformVECREDUCE_ADDCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp6171 EVT AVT = A.getValueType().getVectorElementType(); in PromoteIntRes_CONCAT_VECTORS() local
6173 return AVT.getScalarSizeInBits() < BVT.getScalarSizeInBits(); in PromoteIntRes_CONCAT_VECTORS()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp18711 EVT AVT = A.getValueType(); in getZeroPaddedAdd() local
18713 assert(AVT.getVectorElementType() == BVT.getVectorElementType()); in getZeroPaddedAdd()
18714 if (AVT.getVectorMinNumElements() > BVT.getVectorMinNumElements()) { in getZeroPaddedAdd()
18716 std::swap(AVT, BVT); in getZeroPaddedAdd()
18719 SDValue BPart = DAG.getExtractSubvector(DL, AVT, B, 0); in getZeroPaddedAdd()
18720 SDValue Res = DAG.getNode(ISD::ADD, DL, AVT, A, BPart); in getZeroPaddedAdd()
/freebsd/contrib/ncurses/misc/
H A Dterminfo.src16751 avt-ns|Concept AVT no status line,
16779 avt-rv-ns|Concept AVT in reverse video mode/no status line,
16782 avt-w-ns|Concept AVT in 132 column mode/no status line,
16785 avt-w-rv-ns|Concept AVT in 132 column mode/no status line/reverse video,
16789 # Concept AVT with status line. We get the status line using the
16795 # assumes an 8 page AVT but lm isn't currently used anywhere.)
16797 avt+s|Concept AVT status line changes,
16804 avt|avt-s|concept-avt|Concept AVT w/80 columns,
16806 avt-rv|avt-rv-s|Concept AVT reverse video w/sl,
16809 avt-w|avt-w-s|Concept AVT 132 cols+status,
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