1 #ifndef __AR9300_FREEBSD_INC_H__ 2 #define __AR9300_FREEBSD_INC_H__ 3 4 /* 5 * Define some configuration entries for the AR9300 HAL, so #if entries 6 * don't have to be removed. 7 */ 8 #define ATH_DRIVER_SIM 0 /* SIM */ 9 #define ATH_WOW 0 /* Wake on Wireless */ 10 #define ATH_SUPPORT_MCI 1 /* MCI btcoex */ 11 #define ATH_SUPPORT_AIC 0 /* XXX to do with btcoex? */ 12 #define AH_NEED_TX_DATA_SWAP 0 /* TX descriptor swap? */ 13 #define AH_NEED_RX_DATA_SWAP 0 /* TX descriptor swap? */ 14 #define ATH_SUPPORT_WIRESHARK 0 /* Radiotap HAL code */ 15 #define AH_SUPPORT_WRITE_EEPROM 0 /* EEPROM write support */ 16 #define ATH_SUPPORT_WAPI 0 /* China WAPI support */ 17 #define ATH_ANT_DIV_COMB 1 /* Antenna combining */ 18 #define ATH_SUPPORT_RAW_ADC_CAPTURE 0 /* Raw ADC capture support */ 19 #define ATH_TRAFFIC_FAST_RECOVER 0 /* XXX not sure yet */ 20 #define ATH_SUPPORT_SPECTRAL 1 /* Spectral scan support */ 21 #define ATH_BT_COEX 1 /* Enable BT Coex code */ 22 #define ATH_PCIE_ERROR_MONITOR 0 /* ??? */ 23 #define ATH_SUPPORT_CRDC 0 /* ??? */ 24 #define ATH_LOW_POWER_ENABLE 0 /* ??? */ 25 #define ATH_SUPPORT_VOW_DCS 0 /* Video over wireless dynamic channel select */ 26 #define REMOVE_PKT_LOG 1 27 #define ATH_VC_MODE_PROXY_STA 0 /* Azimuth + proxysta? */ 28 #define ATH_GEN_RANDOMNESS 0 29 #define __PKT_SERIOUS_ERRORS__ 0 30 #define HAL_INTR_REFCOUNT_DISABLE 1 /* XXX wha? And atomics in the HAL!? */ 31 #define UMAC_SUPPORT_SMARTANTENNA 0 /* sigh.. */ 32 #define ATH_SMARTANTENNA_DISABLE_JTAG 0 33 #define ATH_SUPPORT_WIRESHARK 0 34 #define ATH_SUPPORT_WIFIPOS 0 35 #define ATH_SUPPORT_PAPRD 1 36 #define ATH_SUPPORT_TxBF 0 37 #define AH_PRIVATE_DIAG 1 38 #define ATH_SUPPORT_KEYPLUMB_WAR 0 39 40 /* XXX need to reverify these; they came in with qcamain */ 41 #define ATH_SUPPORT_FAST_CC 0 42 #define ATH_SUPPORT_RADIO_RETENTION 0 43 #define ATH_SUPPORT_CAL_REUSE 0 44 45 #define ATH_WOW_OFFLOAD 0 46 47 #define HAL_NO_INTERSPERSED_READS 48 49 /* Required or things will probe/attach, but not work right */ 50 #define AH_SUPPORT_OSPREY 1 51 #define AH_SUPPORT_POSEIDON 1 52 #define AH_SUPPORT_AR9300 1 53 54 #define FIX_NOISE_FLOOR 1 55 56 /* XXX this needs to be removed! No atomics in the HAL! */ 57 typedef int os_atomic_t; /* XXX shouldn't do atomics here! */ 58 #define OS_ATOMIC_INC(a) (*a)++ 59 #define OS_ATOMIC_DEC(a) (*a)-- 60 61 /* 62 * HAL definitions which aren't necessarily for public consumption (yet). 63 */ 64 65 enum { 66 HAL_TRUE_CHIP = 1, 67 HAL_MAC_TO_MAC_EMU, 68 HAL_MAC_BB_EMU, 69 }; 70 71 /* HAL_KEY_TYPE */ 72 enum { 73 HAL_KEY_PROXY_STA_MASK = 0x10, 74 }; 75 76 typedef enum { 77 HAL_SMPS_DEFAULT = 0, 78 HAL_SMPS_SW_CTRL_LOW_PWR, /* Software control, low power setting */ 79 HAL_SMPS_SW_CTRL_HIGH_PWR, /* Software control, high power setting */ 80 HAL_SMPS_HW_CTRL /* Hardware Control */ 81 } HAL_SMPS_MODE; 82 83 /* 84 * Green Tx, Based on different RSSI of Received Beacon thresholds, 85 * using different tx power by modified register tx power related values. 86 * The thresholds are decided by system team. 87 */ 88 #define GreenTX_thres1 56 /* in dB */ 89 #define GreenTX_thres2 36 /* in dB */ 90 91 typedef enum { 92 HAL_RSSI_TX_POWER_NONE = 0, 93 HAL_RSSI_TX_POWER_SHORT = 1, /* short range, reduce OB/DB bias current and disable PAL */ 94 HAL_RSSI_TX_POWER_MIDDLE = 2, /* middle range, reduce OB/DB bias current and PAL is enabled */ 95 HAL_RSSI_TX_POWER_LONG = 3, /* long range, orig. OB/DB bias current and PAL is enabled */ 96 } HAL_RSSI_TX_POWER; 97 98 struct dfs_pulse { 99 u_int32_t rp_numpulses ; /* Num of pulses in radar burst */ 100 u_int32_t rp_pulsedur; /* Duration of each pulse in usecs */ 101 u_int32_t rp_pulsefreq; /* Frequency of pulses in burst */ 102 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 103 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ 104 u_int32_t rp_pulsevar; /* Time variation of pulse duration for 105 matched filter (single-sided) in usecs */ 106 u_int32_t rp_threshold; /* Threshold for MF output to indicate 107 radar match */ 108 u_int32_t rp_mindur; /* Min pulse duration to be considered for 109 this pulse type */ 110 u_int32_t rp_maxdur; /* Max pusle duration to be considered for 111 this pulse type */ 112 u_int32_t rp_rssithresh; /* Minimum rssi to be considered a radar pulse */ 113 u_int32_t rp_meanoffset; /* Offset for timing adjustment */ 114 int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dBm */ 115 /* lower than in non TURBO mode. 116 This will be used to offset that diff.*/ 117 u_int32_t rp_ignore_pri_window; 118 u_int32_t rp_pulseid; /* Unique ID for identifying filter */ 119 }; 120 121 struct dfs_staggered_pulse { 122 u_int32_t rp_numpulses; /* Num of pulses in radar burst */ 123 u_int32_t rp_pulsedur; /* Duration of each pulse in usecs */ 124 u_int32_t rp_min_pulsefreq; /* Frequency of pulses in burst */ 125 u_int32_t rp_max_pulsefreq; /* Frequency of pulses in burst */ 126 u_int32_t rp_patterntype; /* fixed or variable pattern type*/ 127 u_int32_t rp_pulsevar; /* Time variation of pulse duration for 128 matched filter (single-sided) in usecs */ 129 u_int32_t rp_threshold; /* Thershold for MF output to indicateC 130 radar match */ 131 u_int32_t rp_mindur; /* Min pulse duration to be considered for 132 this pulse type */ 133 u_int32_t rp_maxdur; /* Max pusle duration to be considered for 134 this pulse type */ 135 u_int32_t rp_rssithresh; /* Minimum rssi to be considered a radar pulse */ 136 u_int32_t rp_meanoffset; /* Offset for timing adjustment */ 137 int32_t rp_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dBm */ 138 /* lower than in non TURBO mode. This will be used to offset that diff.*/ 139 u_int32_t rp_pulseid; /* Unique ID for identifying filter */ 140 }; 141 142 struct dfs_bin5pulse { 143 u_int32_t b5_threshold; /* Number of bin5 pulses to indicate detection */ 144 u_int32_t b5_mindur; /* Min duration for a bin5 pulse */ 145 u_int32_t b5_maxdur; /* Max duration for a bin5 pulse */ 146 u_int32_t b5_timewindow; /* Window over which to count bin5 pulses */ 147 u_int32_t b5_rssithresh; /* Min rssi to be considered a pulse */ 148 u_int32_t b5_rssimargin; /* rssi threshold margin. In Turbo Mode HW reports rssi 3dB */ 149 }; 150 151 /* 152 * Noise power data definitions 153 * units are: 4 x dBm - NOISE_PWR_DATA_OFFSET (e.g. -25 = (-25/4 - 90) = -96.25 dBm) 154 * range (for 6 signed bits) is (-32 to 31) + offset => -122dBm to -59dBm 155 * resolution (2 bits) is 0.25dBm 156 */ 157 #define NOISE_PWR_DATA_OFFSET -90 /* dbm - all pwr report data is represented offset by this */ 158 #define INT_2_NOISE_PWR_DBM(_p) (((_p) - NOISE_PWR_DATA_OFFSET) << 2) 159 #define NOISE_PWR_DBM_2_INT(_p) ((((_p) + 3) >> 2) + NOISE_PWR_DATA_OFFSET) 160 #define NOISE_PWR_DBM_2_DEC(_p) (((-(_p)) & 3) * 25) 161 #define N2DBM(_x,_y) ((((_x) - NOISE_PWR_DATA_OFFSET) << 2) - (_y)/25) 162 /* SPECTRAL SCAN defines end */ 163 164 typedef struct halvowstats { 165 u_int32_t tx_frame_count; 166 u_int32_t rx_frame_count; 167 u_int32_t rx_clear_count; 168 u_int32_t cycle_count; 169 u_int32_t ext_cycle_count; 170 } HAL_VOWSTATS; 171 172 /* 173 * Weight table configurations. 174 */ 175 #define AR9300_BT_WGHT 0xcccc4444 176 #define AR9300_STOMP_ALL_WLAN_WGHT0 0xfffffff0 177 #define AR9300_STOMP_ALL_WLAN_WGHT1 0xfffffff0 178 #define AR9300_STOMP_LOW_WLAN_WGHT0 0x88888880 179 #define AR9300_STOMP_LOW_WLAN_WGHT1 0x88888880 180 #define AR9300_STOMP_NONE_WLAN_WGHT0 0x00000000 181 #define AR9300_STOMP_NONE_WLAN_WGHT1 0x00000000 182 #define AR9300_STOMP_ALL_FORCE_WLAN_WGHT0 0xffffffff // Stomp BT even when WLAN is idle 183 #define AR9300_STOMP_ALL_FORCE_WLAN_WGHT1 0xffffffff 184 #define AR9300_STOMP_LOW_FORCE_WLAN_WGHT0 0x88888888 // Stomp BT even when WLAN is idle 185 #define AR9300_STOMP_LOW_FORCE_WLAN_WGHT1 0x88888888 186 187 #define JUPITER_STOMP_ALL_WLAN_WGHT0 0x01017d01 188 #define JUPITER_STOMP_ALL_WLAN_WGHT1 0x41414101 189 #define JUPITER_STOMP_ALL_WLAN_WGHT2 0x41414101 190 #define JUPITER_STOMP_ALL_WLAN_WGHT3 0x41414141 191 #define JUPITER_STOMP_LOW_WLAN_WGHT0 0x01017d01 192 #define JUPITER_STOMP_LOW_WLAN_WGHT1 0x3b3b3b01 193 #define JUPITER_STOMP_LOW_WLAN_WGHT2 0x3b3b3b01 194 #define JUPITER_STOMP_LOW_WLAN_WGHT3 0x3b3b3b3b 195 #define JUPITER_STOMP_LOW_FTP_WLAN_WGHT0 0x01017d01 196 #define JUPITER_STOMP_LOW_FTP_WLAN_WGHT1 0x013b0101 197 #define JUPITER_STOMP_LOW_FTP_WLAN_WGHT2 0x3b3b0101 198 #define JUPITER_STOMP_LOW_FTP_WLAN_WGHT3 0x3b3b013b 199 #define JUPITER_STOMP_NONE_WLAN_WGHT0 0x01017d01 200 #define JUPITER_STOMP_NONE_WLAN_WGHT1 0x01010101 201 #define JUPITER_STOMP_NONE_WLAN_WGHT2 0x01010101 202 #define JUPITER_STOMP_NONE_WLAN_WGHT3 0x01010101 203 #define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT0 0x01017d7d 204 #define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT1 0x7d7d7d01 205 #define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT2 0x7d7d7d7d 206 #define JUPITER_STOMP_ALL_FORCE_WLAN_WGHT3 0x7d7d7d7d 207 #define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT0 0x01013b3b 208 #define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT1 0x3b3b3b01 209 #define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT2 0x3b3b3b3b 210 #define JUPITER_STOMP_LOW_FORCE_WLAN_WGHT3 0x3b3b3b3b 211 212 #define MCI_CONCUR_TX_WLAN_WGHT1_MASK 0xff000000 213 #define MCI_CONCUR_TX_WLAN_WGHT1_MASK_S 24 214 #define MCI_CONCUR_TX_WLAN_WGHT2_MASK 0x00ff0000 215 #define MCI_CONCUR_TX_WLAN_WGHT2_MASK_S 16 216 #define MCI_CONCUR_TX_WLAN_WGHT3_MASK 0x000000ff 217 #define MCI_CONCUR_TX_WLAN_WGHT3_MASK_S 0 218 #define MCI_CONCUR_TX_WLAN_WGHT3_MASK2 0x00ff0000 219 #define MCI_CONCUR_TX_WLAN_WGHT3_MASK2_S 16 220 221 #define MCI_QUERY_BT_VERSION_VERBOSE 0 222 #define MCI_LINKID_INDEX_MGMT_PENDING 1 223 224 #define HAL_MCI_FLAG_DISABLE_TIMESTAMP 0x00000001 /* Disable time stamp */ 225 226 /* 227 * The values below come from the system team test result. 228 * For Jupiter, BT tx power level is from 0(-20dBm) to 6(4dBm). 229 * Lowest WLAN tx power would be in bit[23:16] of dword 1. 230 */ 231 static const u_int32_t mci_concur_tx_max_pwr[4][8] = 232 { /* No limit */ 233 {0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 234 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f}, 235 /* 11G */ 236 {0x16161616, 0x12121516, 0x12121212, 0x12121212, 237 0x12121212, 0x12121212, 0x12121212, 0x7f121212}, 238 /* HT20 */ 239 {0x15151515, 0x14141515, 0x14141414, 0x14141414, 240 0x14141414, 0x14141414, 0x14141414, 0x7f141414}, 241 /* HT40 */ 242 {0x10101010, 0x10101010, 0x10101010, 0x10101010, 243 0x10101010, 0x10101010, 0x10101010, 0x7f101010}}; 244 #define ATH_MCI_CONCUR_TX_LOWEST_PWR_MASK 0x00ff0000 245 #define ATH_MCI_CONCUR_TX_LOWEST_PWR_MASK_S 16 246 247 #endif /* __AR9300_FREEBSD_INC_H__ */ 248