| /freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | TruncInstCombine.cpp | 65 case Instruction::AShr: in getRelevantOperands()
143 case Instruction::AShr: in buildTruncExpressionGraph()
320 if (I->getOpcode() == Instruction::AShr) { in getBestTruncatedType()
433 case Instruction::AShr: in ReduceExpressionGraph()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptimizeSZextends.cpp | 97 if (!(Ashr && Ashr->getOpcode() == Instruction::AShr)) in runOnFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRShiftExpand.cpp | 127 case Instruction::AShr: in expand()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Operator.h | 180 OpC == Instruction::AShr ||
413 : public ConcreteOperator<PossiblyExactOperator, Instruction::AShr> {
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| H A D | Instruction.h | 352 return Opcode >= Shl && Opcode <= AShr;
362 return getOpcode() == AShr;
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| H A D | Instruction.def | 163 HANDLE_BINARY_INST(27, AShr , BinaryOperator) // Shift right (arithmetic)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 322 AShr, ///< Arithmetic shift right. enumerator
420 return create(AShr, LHS, RHS, Ctx); in createAShr()
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| /freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | Operations.cpp | 28 Ops.push_back(binOpDescriptor(1, Instruction::AShr)); in describeFuzzerIntOps()
131 case Instruction::AShr: in binOpDescriptor()
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| H A D | IRMutator.cpp | 291 case Instruction::AShr: in mutate()
355 case Instruction::AShr: in mutate()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 478 case Instruction::AShr: in commonShiftTransforms()
517 I.getOpcode() == Instruction::AShr) && in commonShiftTransforms()
816 auto ExtOpcode = (I.getOpcode() == Instruction::AShr) ? Instruction::SExt in FoldShiftByConstant()
830 if (I.getOpcode() != Instruction::AShr && in FoldShiftByConstant()
1467 Value *AShr = Builder.CreateAShr(X, NewShAmt); in visitLShr() local
1468 return new ZExtInst(AShr, Ty); in visitLShr()
1644 assert(OldAShr.getOpcode() == Instruction::AShr && in foldVariableSignZeroExtensionOfVariableHighBitExtract()
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| H A D | InstCombineNegator.cpp | 177 case Instruction::AShr: in visitImpl()
182 Value *BO = I->getOpcode() == Instruction::AShr in visitImpl()
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| H A D | InstCombineCasts.cpp | 46 case Instruction::AShr: in EvaluateInDifferentType()
54 if (Opc == Instruction::LShr || Opc == Instruction::AShr) in EvaluateInDifferentType()
342 case Instruction::AShr: { in canEvaluateTruncated()
669 case Instruction::AShr: { in narrowBinOp()
685 OldShift->getOpcode() == Instruction::AShr in narrowBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SpeculativeExecution.cpp | 225 case Instruction::AShr: in ComputeSpeculationCost()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/ |
| H A D | Values.def | 107 OP(AShr) \
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCExpr.cpp | 149 case MCBinaryExpr::AShr: OS << ">>"; break; in print()
639 case MCBinaryExpr::AShr: Result = LHS >> RHS; break; in evaluateAsRelocatableImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Operator.cpp | 37 case Instruction::AShr: in hasPoisonGeneratingFlags()
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| H A D | ConstantFold.cpp | 686 case Instruction::AShr: in ConstantFoldBinaryInstruction()
839 case Instruction::AShr: in ConstantFoldBinaryInstruction()
939 case Instruction::AShr: in ConstantFoldBinaryInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/ |
| H A D | Legality.cpp | 141 case Instruction::Opcode::AShr: in notVectorizableBasedOnOpcodesAndTypes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCExpr.cpp | 439 case MCBinaryExpr::Opcode::AShr: in binaryOpKnownBitsMapHelper()
648 case MCBinaryExpr::Opcode::AShr: in tryFoldHelper()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetTransformInfo.cpp | 65 case Instruction::AShr: in getArithmeticInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVELaneInterleavingPass.cpp | 231 case Instruction::AShr: in tryInterleave()
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| /freebsd/contrib/llvm-project/lldb/source/Expression/ |
| H A D | IRInterpreter.cpp | 611 case Instruction::AShr: in CanInterpret()
774 case Instruction::AShr: in Interpret()
855 case Instruction::AShr: in Interpret()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1985 if (Opcode == Instruction::AShr || Opcode == Instruction::LShr) { in selectShift()
2007 case Instruction::AShr: in selectShift()
2030 case Instruction::AShr: in selectShift()
2069 case Instruction::AShr: in fastSelectInstruction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/InstCombine/ |
| H A D | InstCombiner.h | 306 case Instruction::AShr: // 0 >> X = 0 in getSafeVectorConstantForBinop()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | DemandedBits.cpp | 203 case Instruction::AShr: in determineLiveOperandBits()
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