| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| H A D | fastmath2_ldlib_asm.S | 89 lmanta = ASR(lmanta, expa)
90 lmantb = ASR(lmantb, expb)
188 lmanta = ASR(lmanta, expa)
189 lmantb = ASR(lmantb, expb)
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| H A D | fastmath2_dlib_asm.S | 96 lmanta = ASR(lmanta, expa)
97 lmantb = ASR(lmantb, expb)
197 lmanta = ASR(lmanta, expa)
198 lmantb = ASR(lmantb, expb)
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| H A D | fastmath_dlib_asm.S | 104 lmanta = ASR(lmanta, expa)
105 lmantb = ASR(lmantb, expb)
239 lmanta = ASR(lmanta, expa)
240 lmantb = ASR(lmantb, expb)
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| H A D | dfdiv.S | 169 DIV_ITER1B(ASR,1,15,)
170 DIV_ITER1B(ASR,16,15,)
171 DIV_ITER1B(ASR,31,15,PROD=# ( 0 );)
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| H A D | dfaddsub.S | 117 BTMP = ASR(BTMP,EXPDIFF)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 15 /// SHL [~] ASR [~] LSR [~] SWAP [ ]
95 defm ASR : MxSROp<"asr", sra, MxRODI_R, MxROOP_AS>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 36 ASR, enumerator
57 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
78 case 2: return AArch64_AM::ASR; in getShiftType()
106 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 157 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, in ASR() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA510.td | 683 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
684 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
685 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
686 "^(ASR|LSL|LSR)_ZPZI_[BHSD]",
687 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
688 "^(ASR|LSL|LSR)_ZPZZ_[BHSD]",
689 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
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| H A D | AArch64SchedA320.td | 705 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
706 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
707 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
708 "^(ASR|LSL|LSR)_ZPZI_[BHSD]",
709 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
710 "^(ASR|LSL|LSR)_ZPZZ_[BHSD]",
711 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
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| H A D | AArch64SchedNeoverseN2.td | 689 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
1666 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
1667 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
1668 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
1669 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
1670 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
1671 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
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| H A D | AArch64SchedNeoverseN3.td | 594 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
1636 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
1637 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
1638 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
1639 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
1640 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
1641 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
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| H A D | AArch64SchedPredicates.td | 56 def CheckShiftASR : CheckImmOperand_s<3, "AArch64_AM::ASR">;
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| H A D | AArch64SchedNeoverseV1.td | 609 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
616 // Arithmetic, flagset, LSR/ASR/ROR shift or LSL shift > 4
1503 (instregex "^(ASR|LSL|LSR)_WIDE_Z(Pm|Z)Z_[BHS]",
1504 "^(ASR|LSL|LSR)_ZPm[IZ]_[BHSD]",
1505 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
1506 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
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| H A D | AArch64SchedNeoverseV2.td | 1130 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
2152 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
2153 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
2154 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
2155 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
2156 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
2157 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
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| H A D | AArch64FastISel.cpp | 1268 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
3735 emitSubs_rs(VT, SMULHReg, MulReg, AArch64_AM::ASR, 63, in fastLowerIntrinsicCall()
4945 AArch64_AM::ASR, Lg2); in selectSDiv()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | FunctionComparator.cpp | 815 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
817 if (int Res = cmpNumbers(ASL, ASR)) in cmpGEPs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 694 ASR, enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 380 // from the ASR (as ASR4) or the privileged register set.
383 (add Y, TICK, (sequence "ASR%u", 1, 31))>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)r", "tROR")>;
|
| H A D | ARMInstrThumb.td | 1076 // ASR immediate
1087 // ASR register
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| H A D | ARMScheduleSwift.td | 154 // ASR,LSL,ROR,RRX
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| H A D | ARMScheduleM85.td | 439 (instregex "(t|t2)(LSL|LSR|ASR|ROR|SBFX|UBFX)")>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1521 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1623 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1634 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
3657 .Case("asr", AArch64_AM::ASR) in tryParseOptionalShiftExtend()
3680 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 303 defm ASR : ArcBinaryEXT5Inst<0b000010, "asr">;
|