Searched refs:AR_PHY_PLL_CTL_40_5312 (Results 1 – 2 of 2) sorted by relevance
27 #define AR_PHY_PLL_CTL_40_5312 0x14d4 /* 40 MHz for 11a, turbos */ macro
665 phyPLL = AR_PHY_PLL_CTL_40_5312; in ar5312ChipReset()