Searched refs:AR_IMR_S5 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_timer.c | 147 OS_REG_SET_BIT(ah, AR_IMR_S5, in ar9300_start_generic_timer()
167 OS_REG_CLR_BIT(ah, AR_IMR_S5, in ar9300_stop_generic_timer()
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| H A D | ar9300_interrupts.c | 652 OS_REG_SET_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);
655 OS_REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);
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| H A D | ar9300_power.c | 1362 OS_REG_WRITE(ah, AR_IMR_S5, OS_REG_READ(ah, AR_IMR_S5) | 0x80); in ar9300_wow_enable()
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| H A D | ar9300reg.h | 392 #define AR_IMR_S5 AR_MAC_DMA_OFFSET(MAC_DMA_IMR_S5) macro
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