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Searched refs:AL_BIT (Results 1 – 19 of 19) sorted by relevance

/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_iofic.h95 #define AL_INT_GROUP_A_GROUP_B_SUM AL_BIT(0)
96 #define AL_INT_GROUP_A_GROUP_C_SUM AL_BIT(1)
97 #define AL_INT_GROUP_A_GROUP_D_SUM AL_BIT(2)
111 (AL_BIT(0) | AL_BIT(1) | AL_BIT(2) | AL_BIT(3))
113 #define AL_INT_GROUP_D_M2S AL_BIT(8)
115 #define AL_INT_GROUP_D_S2M AL_BIT(9)
116 #define AL_INT_GROUP_D_SW_TIMER_INT AL_BIT(10)
117 #define AL_INT_GROUP_D_APP_EXT_INT AL_BIT(11)
144 #define AL_INT_2ND_GROUP_A_M2S_MSIX_RESP AL_BIT(27)
149 #define AL_INT_2ND_GROUP_A_M2S_MSIX_TO AL_BIT(26)
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H A Dal_hal_pcie_interrupts.h78 AL_PCIE_APP_INT_DEASSERT_INTD = AL_BIT(0),
80 AL_PCIE_APP_INT_DEASSERT_INTC = AL_BIT(1),
82 AL_PCIE_APP_INT_DEASSERT_INTB = AL_BIT(2),
87 AL_PCIE_APP_INT_DEASSERT_INTA = AL_BIT(3),
89 AL_PCIE_APP_INT_ASSERT_INTD = AL_BIT(4),
91 AL_PCIE_APP_INT_ASSERT_INTC = AL_BIT(5),
93 AL_PCIE_APP_INT_ASSERT_INTB = AL_BIT(6),
98 AL_PCIE_APP_INT_ASSERT_INTA = AL_BIT(7),
100 AL_PCIE_APP_INT_MSI_CNTR_RCV_INT = AL_BIT(8),
102 AL_PCIE_APP_INT_MSI_TRNS_GNT = AL_BIT(9),
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H A Dal_hal_unit_adapter_regs.h177 #define AL_ADAPTER_INT_CAUSE_WR_ERR AL_BIT(1)
178 #define AL_ADAPTER_INT_CAUSE_RD_ERR AL_BIT(0)
189 #define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_ADDR_TO AL_BIT(8)
190 #define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_ERR AL_BIT(9)
191 #define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_TO AL_BIT(10)
192 #define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_ERR_BLK AL_BIT(11)
193 #define AL_ADAPTER_AXI_MSTR_RD_ERR_ATTR_RD_PARITY_ERR AL_BIT(12)
197 #define AL_ADAPTER_INT_CAUSE_MASK_WR_ERR AL_BIT(1)
198 #define AL_ADAPTER_INT_CAUSE_MASK_RD_ERR AL_BIT(0)
256 #define AL_ADAPTER_GENERIC_CONTROL_0_ETH_RESET_1GMAC AL_BIT(18)
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H A Dal_hal_pcie_regs.h402 #define PCIE_PORT_GEN2_CTRL_DIRECT_SPEED_CHANGE AL_BIT(17)
442 #define CX_FLT_MASK_UR_FUNC_MISMATCH AL_BIT(16)
448 #define CX_FLT_MASK_CFG_TYPE1_RE_AS_UR AL_BIT(19)
456 #define CX_FLT_MASK_CPL_REQID_MATCH AL_BIT(22)
464 #define CX_FLT_MASK_CPL_FUNC_MATCH AL_BIT(23)
496 #define PCIE_IATU_CR2_FUNC_NUM_TRANS_BYPASS_FUNC_MATCH_ENABLE_MASK AL_BIT(19)
500 #define PCIE_PORT_DEV_CTRL_STATUS_CORR_ERR_REPORT_EN AL_BIT(0)
501 #define PCIE_PORT_DEV_CTRL_STATUS_NON_FTL_ERR_REPORT_EN AL_BIT(1)
502 #define PCIE_PORT_DEV_CTRL_STATUS_FTL_ERR_REPORT_EN AL_BIT(2)
503 #define PCIE_PORT_DEV_CTRL_STATUS_UNSUP_REQ_REPORT_EN AL_BIT(3)
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H A Dal_hal_udma_debug.h77 #define AL_UDMA_DEBUG_QUEUE(n) AL_BIT(n)
78 #define AL_UDMA_DEBUG_AXI AL_BIT(DMA_MAX_Q)
79 #define AL_UDMA_DEBUG_GENERAL AL_BIT(DMA_MAX_Q + 1)
80 #define AL_UDMA_DEBUG_READ AL_BIT(DMA_MAX_Q + 2)
81 #define AL_UDMA_DEBUG_WRITE AL_BIT(DMA_MAX_Q + 3)
82 #define AL_UDMA_DEBUG_DWRR AL_BIT(DMA_MAX_Q + 4)
83 #define AL_UDMA_DEBUG_RATE_LIMITER AL_BIT(DMA_MAX_Q + 5)
84 #define AL_UDMA_DEBUG_STREAM_RATE_LIMITER AL_BIT(DMA_MAX_Q + 6)
85 #define AL_UDMA_DEBUG_COMP AL_BIT(DMA_MAX_Q + 7)
86 #define AL_UDMA_DEBUG_STAT AL_BIT(DMA_MAX_Q + 8)
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H A Dal_hal_pcie.h193 #define AL_PCIE_AER_UNCORR_DLP_ERR AL_BIT(4)
195 #define AL_PCIE_AER_UNCORR_POISIONED_TLP AL_BIT(12)
197 #define AL_PCIE_AER_UNCORR_FLOW_CTRL_ERR AL_BIT(13)
199 #define AL_PCIE_AER_UNCORR_COMPL_TO AL_BIT(14)
201 #define AL_PCIE_AER_UNCORR_COMPL_ABT AL_BIT(15)
203 #define AL_PCIE_AER_UNCORR_UNEXPCTED_COMPL AL_BIT(16)
205 #define AL_PCIE_AER_UNCORR_RCV_OVRFLW AL_BIT(17)
207 #define AL_PCIE_AER_UNCORR_MLFRM_TLP AL_BIT(18)
209 #define AL_PCIE_AER_UNCORR_ECRC_ERR AL_BIT(19)
211 #define AL_PCIE_AER_UNCORR_UNSUPRT_REQ_ERR AL_BIT(20)
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H A Dal_hal_udma.h105 #define AL_M2S_DESC_CONCAT AL_BIT(31) /* concatenate */
106 #define AL_M2S_DESC_DMB AL_BIT(30)
108 #define AL_M2S_DESC_NO_SNOOP_H AL_BIT(29)
109 #define AL_M2S_DESC_INT_EN AL_BIT(28) /** enable interrupt */
110 #define AL_M2S_DESC_LAST AL_BIT(27)
111 #define AL_M2S_DESC_FIRST AL_BIT(26)
114 #define AL_M2S_DESC_META_DATA AL_BIT(23)
115 #define AL_M2S_DESC_DUMMY AL_BIT(22) /* for Metdata only */
121 #define AL_S2M_DESC_DUAL_BUF AL_BIT(31)
122 #define AL_S2M_DESC_NO_SNOOP_H AL_BIT(29)
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H A Dal_hal_reg_utils.h59 #define AL_BIT(b) (1UL << (b)) macro
82 AL_REG_FIELD_GET(reg, AL_BIT(shift), shift)
89 AL_REG_FIELD_SET(reg, AL_BIT(shift), shift, val)
101 (AL_BIT(n) - 1)
104 (AL_BIT(msb) + AL_BIT_MASK(msb) - AL_BIT_MASK(lsb))
H A Dal_hal_pcie_axi_reg.h981 #define PCIE_AXI_STATUS_LANE_IS_RESET AL_BIT(13)
995 #define PCIE_AXI_PARITY_EN_AXI_U4_RAM2P AL_BIT(1)
1028 #define PCIE_AXI_POS_ORDER_SEGMENT_BUFFER_DONT_WAIT_FOR_P_WRITES AL_BIT(10)
1030 #define PCIE_AXI_POS_ORDER_11 AL_BIT(11)
1035 #define PCIE_AXI_POS_ORDER_SEND_READY_ON_READ_DATA_BURST AL_BIT(12)
1037 #define PCIE_AXI_CORE_SETUP_ATS_CAP_DIS AL_BIT(13)
1039 #define PCIE_AXI_POS_ORDER_DISABLE_DX_PME AL_BIT(14)
1041 #define PCIE_AXI_POS_ORDER_ENABLE_NONSTICKY_RESET_ON_HOT_RESET AL_BIT(15)
1043 #define PCIE_AXI_TERMINATE_DATA_MSG_AS_UR_REQ AL_BIT(16)
1059 #define PCIE_AXI_REV1_2_CORE_SETUP_SRIOV_ENABLE AL_BIT(16)
H A Dal_hal_serdes_hssp_internal_regs.h519 #define SERDES_IREG_FLD_RXLOSDET_ENABLE AL_BIT(4)
686 #define SERDES_IREG_FLD_PCS_VPCSIF_OVR_RATE_ENA AL_BIT(2)
H A Dal_hal_serdes_internal_regs.h520 #define SERDES_IREG_FLD_RXLOSDET_ENABLE AL_BIT(4)
687 #define SERDES_IREG_FLD_PCS_VPCSIF_OVR_RATE_ENA AL_BIT(2)
H A Dal_hal_udma_main.c66 #define AL_UDMA_Q_FLAGS_IGNORE_RING_ID AL_BIT(0)
67 #define AL_UDMA_Q_FLAGS_NO_COMP_UPDATE AL_BIT(1)
68 #define AL_UDMA_Q_FLAGS_EN_COMP_COAL AL_BIT(2)
H A Dal_hal_serdes_25g.c1478 tap_sign = (value & AL_BIT(AL_SERDES_25G_RX_ADV_PARAMS_DFE_TAP_SIGN_SHIFT)) >> in al_serdes_25g_rx_advanced_params_get()
1524 sign = (val16 & AL_BIT(AL_SERDES_25G_TX_DIAG_GCFSM2_DCD_TRIM_SIGN_SHIFT)) >> in al_serdes_25g_tx_diag_info_get()
1618 sign = (packed_val & AL_BIT(AL_SERDES_25G_RX_DIAG_SIGNED_5BIT_SIGN_SHIFT)) >> in al_serdes_25g_rx_diag_5bit_signed_set()
H A Dal_hal_pcie_w_reg.h810 #define PCIE_W_CTRL_GEN_FEATURES_SATA_EP_MSI_FIX AL_BIT(16)
H A Dal_hal_pcie.c1665 return (AL_REG_FIELD_GET(ports_enabled, AL_BIT(pcie_port->port_id), in al_pcie_port_is_enabled()
2522 (AL_BIT(15)) << limit_ext_reg_shift); in al_pcie_atu_region_set()
/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth.h295 #define AL_ETH_TX_FLAGS_TSO AL_BIT(7) /**< Enable TCP/UDP segmentation offloading */
296 #define AL_ETH_TX_FLAGS_IPV4_L3_CSUM AL_BIT(13) /**< Enable IPv4 header checksum calculation */
297 #define AL_ETH_TX_FLAGS_L4_CSUM AL_BIT(14) /**< Enable TCP/UDP checksum calculation */
298 #define AL_ETH_TX_FLAGS_L4_PARTIAL_CSUM AL_BIT(17) /**< L4 partial checksum calculation */
299 #define AL_ETH_TX_FLAGS_L2_MACSEC_PKT AL_BIT(16) /**< L2 Packet type 802_3 or 802_3_MACSEC, V2 */
300 #define AL_ETH_TX_FLAGS_ENCRYPT AL_BIT(16) /**< Enable TX packet encryption, V3 */
301 #define AL_ETH_TX_FLAGS_L2_DIS_FCS AL_BIT(15) /**< Disable CRC calculation*/
302 #define AL_ETH_TX_FLAGS_TS AL_BIT(21) /**< Timestamp the packet */
349 #define AL_ETH_RX_FLAGS_DUAL_BUF AL_BIT(31)
352 #define AL_ETH_RX_ERROR AL_BIT(16) /**< layer 2 errors (FCS, bad len, etc) */
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H A Dal_hal_eth_kr.h81 #define AL_ETH_AN_TECH_1000BASE_KX AL_BIT(0)
82 #define AL_ETH_AN_TECH_10GBASE_KX4 AL_BIT(1)
83 #define AL_ETH_AN_TECH_10GBASE_KR AL_BIT(2)
84 #define AL_ETH_AN_TECH_40GBASE_KR4 AL_BIT(3)
85 #define AL_ETH_AN_TECH_40GBASE_CR4 AL_BIT(4)
86 #define AL_ETH_AN_TECH_100GBASE_CR AL_BIT(5)
H A Dal_hal_eth_kr.c107 #define AL_ETH_KR_AN_CONTROL_RESTART AL_BIT(9)
108 #define AL_ETH_KR_AN_CONTROL_ENABLE AL_BIT(12)
109 #define AL_ETH_KR_AN_CONTROL_NP_ENABLE AL_BIT(13)
111 #define AL_ETH_KR_AN_STATUS_COMPLETED AL_BIT(5)
112 #define AL_ETH_KR_AN_STATUS_BASE_PAGE_RECEIVED AL_BIT(6)
667 if (an_adv->capability & AL_BIT(2)) { in al_eth_kr_an_validate_adv()
908 lane, AL_BIT(AL_ETH_KR_PMD_CONTROL_RESTART)); in al_eth_kr_an_start()
966 lane, (AL_BIT(AL_ETH_KR_PMD_CONTROL_ENABLE) | in al_eth_kr_lt_restart()
967 AL_BIT(AL_ETH_KR_PMD_CONTROL_RESTART))); in al_eth_kr_lt_restart()
976 lane, AL_BIT(AL_ETH_KR_PMD_CONTROL_RESTART)); in al_eth_kr_lt_stop()
H A Dal_hal_eth_main.c751 al_iofic_unmask(adapter->mac_ints_base, AL_INT_GROUP_B, AL_BIT(14)); in al_eth_ec_mac_ints_config()
753 al_iofic_unmask(adapter->unit_regs, AL_INT_GROUP_D, AL_BIT(11)); in al_eth_ec_mac_ints_config()
1879 reg |= AL_BIT(15); in al_eth_mac_loopback_config()
1881 reg &= ~AL_BIT(15); in al_eth_mac_loopback_config()
1891 reg |= AL_BIT(14); in al_eth_mac_loopback_config()
1893 reg &= ~AL_BIT(14); in al_eth_mac_loopback_config()
1903 reg |= AL_BIT(14); in al_eth_mac_loopback_config()
1905 reg &= ~AL_BIT(14); in al_eth_mac_loopback_config()
1939 val &= ~AL_BIT(10); in al_eth_mdio_config()
1942 val |= AL_BIT(10); in al_eth_mdio_config()
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