| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcFrameLowering.cpp | 44 unsigned ADDrr, in emitSPAdjustment() argument
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
116 SAVErr = SP::ADDrr; in emitPrologue()
208 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); in eliminateCallFramePseudoInstr()
233 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); in emitEpilogue()
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| H A D | SparcFrameLowering.h | 62 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
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| H A D | SparcRegisterInfo.cpp | 147 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1) in replaceFI()
165 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1) in eliminateFrameIndex()
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| H A D | DelaySlotFiller.cpp | 393 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
505 case SP::ADDrr: in tryCombineRestoreWithPrevInst()
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| H A D | SparcAsmPrinter.cpp | 156 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI); in EmitADD()
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| H A D | SparcInstr64Bit.td | 160 def : Pat<(add i64:$lhs, i64:$rhs), (ADDrr $lhs, $rhs)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 106 unsigned ADDrr; member
321 STORE_OPCODE(ADDrr, ADDrr); in OpcodeCache()
737 MIB->setDesc(TII.get(Opcodes.ADDrr)); in selectGlobal()
1078 I.setDesc(TII.get(Opcodes.ADDrr)); in select()
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| H A D | ARMBaseInstrInfo.cpp | 248 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
268 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
2424 {ARM::ADDSrr, ARM::ADDrr},
2900 (OI->getOpcode() == ARM::ADDrr || OI->getOpcode() == ARM::t2ADDrr || in isRedundantFlagInstr()
2952 case ARM::ADDrr: in isOptimizeCompareCandidate()
3354 case ARM::ADDrr: in foldImmediate()
3364 case ARM::ADDrr: in foldImmediate()
3372 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::ADDri : ARM::SUBri; in foldImmediate()
3375 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::SUBri : ARM::ADDri; in foldImmediate()
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| H A D | ARMAsmPrinter.cpp | 1739 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr) in emitInstruction()
1985 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr) in emitInstruction()
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| H A D | ARMFastISel.cpp | 1748 Opc = isThumb2 ? ARM::t2ADDrr : ARM::ADDrr; in SelectBinaryIntOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupLEAs.cpp | 716 const MCInstrDesc &ADDrr = TII->get(getADDrrFromLEA(Opcode)); in processInstructionForSlowLEA()
719 BuildMI(MBB, I, MI.getDebugLoc(), ADDrr, DstR).addReg(DstR).add(Src); in processInstructionForSlowLEA()
715 const MCInstrDesc &ADDrr = TII->get(getADDrrFromLEA(Opcode)); processInstructionForSlowLEA() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 10959 case ARM::ADDrsi: newOpc = ARM::ADDrr; break; in processInstruction()
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