| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcFrameLowering.cpp | 45 unsigned ADDri) const { in emitSPAdjustment() 52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment() 102 SAVEri = SP::ADDri; in emitPrologue() 156 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); in eliminateCallFramePseudoInstr() 181 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); in emitEpilogue()
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| H A D | SparcFrameLowering.h | 64 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
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| H A D | SparcInstr64Bit.td | 165 def : Pat<(add i64:$lhs, (i64 simm13:$rhs)), (ADDri $lhs, imm:$rhs)>; 479 (ADDri (SETHIi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; 488 def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDri $r, tglobaladdr:$in)>; 489 def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDri $r, tconstpool:$in)>; 491 (ADDri $r, tblockaddress:$in)>;
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| H A D | SparcInstrVIS.td | 327 def : Pat<(i32 (ctlz i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>; 328 def : Pat<(i32 (ctlz_zero_undef i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>;
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| H A D | DelaySlotFiller.cpp | 523 case SP::ADDri: return combineRestoreADD(MBBI, PrevInst, TII); break; in tryCombineRestoreWithPrevInst()
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| H A D | SparcInstrInfo.td | 1908 def : Pat<(i32 (frameindex:$ptr)), (ADDri (i32 (to_tframeindex $ptr)), (i32 0))>; 1909 def : Pat<(i64 (frameindex:$ptr)), (ADDri (i64 (to_tframeindex $ptr)), (i64 0))>; 1923 (ADDri (SETHIi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; 1932 def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDri $r, tglobaladdr:$in)>; 1933 def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDri $r, tconstpool:$in)>; 1935 (ADDri $r, tblockaddress:$in)>;
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| H A D | SparcInstrAliases.td | 552 def : InstAlias<"inc $rd", (ADDri IntRegs:$rd, IntRegs:$rd, 1), 0>; 555 def : InstAlias<"inc $simm13, $rd", (ADDri IntRegs:$rd, IntRegs:$rd, simm13Op:$simm13), 0>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 152 case ARM::ADDri: in LowerARMMachineInstrToMCInst()
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| H A D | ARMInstructionSelector.cpp | 107 unsigned ADDri; member 322 STORE_OPCODE(ADDri, ADDri); in OpcodeCache() 1084 I.setDesc(TII.get(Opcodes.ADDri)); in select()
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| H A D | ARMBaseInstrInfo.cpp | 2266 {ARM::ADDSri, ARM::ADDri}, 2341 unsigned Opc = isSub ? ARM::SUBri : ARM::ADDri; in emitARMRegPlusImmediate() 2486 if (Opcode == ARM::ADDri) { in rewriteARMFrameIndex() 2744 OI->getOpcode() == ARM::ADDri || OI->getOpcode() == ARM::t2ADDri) && in isRedundantFlagInstr() 2796 case ARM::ADDri: in isOptimizeCompareCandidate() 3215 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::ADDri : ARM::SUBri; in foldImmediate() 3218 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::SUBri : ARM::ADDri; in foldImmediate() 4786 unsigned AddOpc = (LoadImmOpc == ARM::MRC) ? ARM::ADDri : ARM::t2ADDri; in expandLoadStackGuardBase() 5423 else if (Opcode != ARM::ADDri) in isAddImmediate()
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| H A D | ARMAsmPrinter.cpp | 1337 case ARM::ADDri: in EmitUnwindingInstruction() 2142 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDri) in emitInstruction() 2169 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDri) in emitInstruction()
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| H A D | ARMBaseRegisterInfo.cpp | 698 unsigned ADDriOpc = !AFI->isThumbFunction() ? ARM::ADDri : in materializeFrameBaseRegister()
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| H A D | ARMScheduleM55.td | 55 // NOPs, ITs, Brs, ADDri/SUBri, UXTB/H, SXTB/H and MOVri's. NOPs and IT's are
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| H A D | ARMLoadStoreOptimizer.cpp | 707 : isThumb1 ? ARM::tADDi8 : ARM::ADDri; in CreateLoadStoreMulti() 1200 case ARM::ADDri: Scale = 1; CheckCPSRDef = true; break; in isIncrementOrDecrement()
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| H A D | ARMFastISel.cpp | 688 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in fastMaterializeAlloca() 867 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in ARMSimplifyAddress()
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| H A D | ARMFrameLowering.cpp | 2140 unsigned Opc = isThumb ? ARM::t2ADDri : ARM::ADDri; in emitAlignedDPRCS2Restores() 2359 if (MI.getOpcode() == ARM::ADDri) { in estimateRSStackSizeLimit()
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| H A D | ARMInstrInfo.td | 6406 (ADDri GPR:$Rd, GPR:$Rn, mod_imm_neg:$imm, pred:$p, cc_out:$s)>; 6408 (ADDri GPR:$Rd, GPR:$Rd, mod_imm_neg:$imm, pred:$p, cc_out:$s)>;
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| H A D | ARMISelDAGToDAG.cpp | 3757 ARM::t2ADDri : ARM::ADDri); in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupLEAs.cpp | 723 const MCInstrDesc &ADDri = in processInstructionForSlowLEA() local 726 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), ADDri, DstR) in processInstructionForSlowLEA()
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| H A D | X86FrameLowering.cpp | 4000 unsigned ADDri = getADDriOpcode(false); in restoreWin32EHStackPointers() local 4001 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr) in restoreWin32EHStackPointers()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 9050 case ARM::ADDri: { in processInstruction()
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