| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 127 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() 128 AArch64CC::CondCode &CondCode2) { in changeFCMPPredToAArch64CC() 129 CondCode2 = AArch64CC::AL; in changeFCMPPredToAArch64CC() 134 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC() 137 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC() 140 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC() 143 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC() 146 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC() 149 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC() 150 CondCode2 = AArch64CC::GT; in changeFCMPPredToAArch64CC() [all …]
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| H A D | AArch64GlobalISelUtils.h | 69 AArch64CC::CondCode &CondCode, 70 AArch64CC::CondCode &CondCode2); 80 AArch64CC::CondCode &CondCode, 81 AArch64CC::CondCode &CondCode2,
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| H A D | AArch64InstructionSelector.cpp | 318 AArch64CC::CondCode CC, 325 AArch64CC::CondCode Pred, 342 std::pair<MachineInstr *, AArch64CC::CondCode> 350 MachineInstr *emitConjunction(Register Val, AArch64CC::CondCode &OutCC, 354 AArch64CC::CondCode Predicate, 355 AArch64CC::CondCode OutCC, 357 MachineInstr *emitConjunctionRec(Register Val, AArch64CC::CondCode &OutCC, 359 AArch64CC::CondCode Predicate, 1183 Register False, AArch64CC::CondCode CC, in emitSelect() 1224 CC = AArch64CC::getInvertedCondCode(CC); in emitSelect() [all …]
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| H A D | AArch64PostLegalizerLowering.cpp | 935 getVectorFCMP(AArch64CC::CondCode CC, Register LHS, Register RHS, bool NoNans, in getVectorFCMP() 943 case AArch64CC::NE: in getVectorFCMP() 948 case AArch64CC::EQ: in getVectorFCMP() 952 case AArch64CC::GE: in getVectorFCMP() 956 case AArch64CC::GT: in getVectorFCMP() 960 case AArch64CC::LS: in getVectorFCMP() 964 case AArch64CC::MI: in getVectorFCMP() 1007 AArch64CC::CondCode CC, CC2 = AArch64CC::AL; in applyLowerVectorFCMP() 1017 CC = Pred == CmpInst::Predicate::FCMP_ORD ? AArch64CC::EQ : AArch64CC::NE; in applyLowerVectorFCMP() 1029 if (CC2 == AArch64CC::AL) in applyLowerVectorFCMP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>; 110 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp); 112 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To, 228 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp() 230 case AArch64CC::GT: return AArch64CC::GE; in getAdjustedCmp() 231 case AArch64CC::GE: return AArch64CC::GT; in getAdjustedCmp() 232 case AArch64CC::LT: return AArch64CC::LE; in getAdjustedCmp() 233 case AArch64CC::LE: return AArch64CC::LT; in getAdjustedCmp() 242 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp() 249 int Correction = (Cmp == AArch64CC::GT) ? 1 : -1; in adjustCmp() [all …]
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| H A D | AArch64ConditionalCompares.cpp | 162 AArch64CC::CondCode HeadCmpBBCC; 168 AArch64CC::CondCode CmpBBTailCC; 271 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond() 275 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond() 287 CC = AArch64CC::EQ; in parseCond() 292 CC = AArch64CC::NE; in parseCond() 524 HeadCmpBBCC = AArch64CC::getInvertedCondCode(HeadCmpBBCC); in canConvert() 549 CmpBBTailCC = AArch64CC::getInvertedCondCode(CmpBBTailCC); in canConvert() 552 << AArch64CC::getCondCodeName(HeadCmpBBCC) in canConvert() 554 << AArch64CC::getCondCodeName(CmpBBTailCC) << '\n'); in canConvert() [all …]
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| H A D | AArch64SpeculationHardening.cpp | 149 AArch64CC::CondCode &CondCode) const; 151 AArch64CC::CondCode &CondCode, DebugLoc DL) const; 183 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow() 208 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow() 221 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() 242 AArch64CC::CondCode CondCode; in instrumentControlFlow() 251 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow() 376 .addImm(AArch64CC::EQ); in insertSPToRegTaintPropagation()
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| H A D | AArch64CondBrTuning.cpp | 116 AArch64CC::CondCode CC; in convertToCondBr() 124 CC = AArch64CC::EQ; in convertToCondBr() 128 CC = AArch64CC::NE; in convertToCondBr() 132 CC = AArch64CC::PL; in convertToCondBr() 136 CC = AArch64CC::MI; in convertToCondBr()
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| H A D | AArch64RedundantCopyElimination.cpp | 140 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm(); in knownRegValInBlock() 141 if (CC != AArch64CC::EQ && CC != AArch64CC::NE) in knownRegValInBlock() 145 if ((CC == AArch64CC::EQ && BrTarget != MBB) || in knownRegValInBlock() 146 (CC == AArch64CC::NE && BrTarget == MBB)) in knownRegValInBlock()
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| H A D | AArch64FastISel.cpp | 192 bool foldXALUIntrinsic(AArch64CC::CondCode &CC, const Instruction *I, 2210 static AArch64CC::CondCode getCompareCC(CmpInst::Predicate Pred) { in getCompareCC() 2216 return AArch64CC::AL; in getCompareCC() 2219 return AArch64CC::EQ; in getCompareCC() 2222 return AArch64CC::GT; in getCompareCC() 2225 return AArch64CC::GE; in getCompareCC() 2228 return AArch64CC::HI; in getCompareCC() 2230 return AArch64CC::MI; in getCompareCC() 2233 return AArch64CC::LS; in getCompareCC() 2235 return AArch64CC::VC; in getCompareCC() [all …]
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| H A D | AArch64ISelLowering.cpp | 3228 static AArch64CC::CondCode changeIntCCToAArch64CC(ISD::CondCode CC) { in changeIntCCToAArch64CC() 3233 return AArch64CC::NE; in changeIntCCToAArch64CC() 3235 return AArch64CC::EQ; in changeIntCCToAArch64CC() 3237 return AArch64CC::GT; in changeIntCCToAArch64CC() 3239 return AArch64CC::GE; in changeIntCCToAArch64CC() 3241 return AArch64CC::LT; in changeIntCCToAArch64CC() 3243 return AArch64CC::LE; in changeIntCCToAArch64CC() 3245 return AArch64CC::HI; in changeIntCCToAArch64CC() 3247 return AArch64CC::HS; in changeIntCCToAArch64CC() 3249 return AArch64CC::LO; in changeIntCCToAArch64CC() [all …]
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| H A D | AArch64AsmPrinter.cpp | 655 .addImm(AArch64CC::EQ) in LowerKCFI_CHECK() 811 .addImm(AArch64CC::NE) in emitHwasanMemaccessSymbols() 832 .addImm(AArch64CC::EQ) in emitHwasanMemaccessSymbols() 845 .addImm(AArch64CC::HI) in emitHwasanMemaccessSymbols() 865 .addImm(AArch64CC::LS) in emitHwasanMemaccessSymbols() 884 .addImm(AArch64CC::EQ) in emitHwasanMemaccessSymbols() 1576 .addImm(AArch64CC::LS)); in LowerHardenedBRJumpTable() 1985 .addImm(AArch64CC::EQ) in emitPtrauthCheckAuthenticatedValue() 2633 AArch64CC::CondCode CC = in emitCBPseudoExpansion() 2634 static_cast<AArch64CC::CondCode>(MI->getOperand(0).getImm()); in emitCBPseudoExpansion() [all …]
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| H A D | AArch64InstrInfo.cpp | 543 AArch64CC::CondCode CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in reverseBranchCondition() 544 Cond[0].setImm(AArch64CC::getInvertedCondCode(CC)); in reverseBranchCondition() 581 AArch64CC::CondCode CC = in reverseBranchCondition() 582 static_cast<AArch64CC::CondCode>(Cond[2].getImm()); in reverseBranchCondition() 583 Cond[2].setImm(AArch64CC::getInvertedCondCode(CC)); in reverseBranchCondition() 819 AArch64CC::CondCode CC; in insertSelect() 824 CC = AArch64CC::CondCode(Cond[0].getImm()); in insertSelect() 834 CC = AArch64CC::EQ; in insertSelect() 838 CC = AArch64CC::EQ; in insertSelect() 842 CC = AArch64CC::NE; in insertSelect() [all …]
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| H A D | AArch64ExpandPseudoInsts.cpp | 275 .addImm(AArch64CC::NE) in expandCMP_SWAP() 383 .addImm(AArch64CC::EQ); in expandCMP_SWAP_128() 391 .addImm(AArch64CC::EQ); in expandCMP_SWAP_128() 732 .addImm(AArch64CC::NE) in expandSetTagLoop()
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| H A D | AArch64ISelDAGToDAG.cpp | 7639 AArch64CC::CondCode CC = in SelectCmpBranchUImm6Operand() 7640 static_cast<AArch64CC::CondCode>(P->getConstantOperandVal(1)); in SelectCmpBranchUImm6Operand() 7659 case AArch64CC::GE: in SelectCmpBranchUImm6Operand() 7660 case AArch64CC::HS: in SelectCmpBranchUImm6Operand() 7661 case AArch64CC::LT: in SelectCmpBranchUImm6Operand() 7662 case AArch64CC::LO: in SelectCmpBranchUImm6Operand() 7665 case AArch64CC::LE: in SelectCmpBranchUImm6Operand() 7666 case AArch64CC::LS: in SelectCmpBranchUImm6Operand() 7667 case AArch64CC::GT: in SelectCmpBranchUImm6Operand() 7668 case AArch64CC::HI: in SelectCmpBranchUImm6Operand()
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| H A D | AArch64InstrFormats.td | 2231 MCOp.getImm() != AArch64CC::AL && 2232 MCOp.getImm() != AArch64CC::NV; 3637 AArch64CC::CondCode CC = static_cast<AArch64CC::CondCode>(N->getZExtValue()); 3638 return CurDAG->getTargetConstant(AArch64CC::getInvertedCondCode(CC), SDLoc(N),
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| H A D | AArch64FrameLowering.cpp | 5584 .addImm(AArch64CC::NE) in inlineStackProbeLoopExactMultiple()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 250 namespace AArch64CC { 367 inline static bool isValidCBCond(AArch64CC::CondCode Code) { in isValidCBCond() 371 case AArch64CC::EQ: in isValidCBCond() 372 case AArch64CC::NE: in isValidCBCond() 373 case AArch64CC::HS: in isValidCBCond() 374 case AArch64CC::LO: in isValidCBCond() 375 case AArch64CC::HI: in isValidCBCond() 376 case AArch64CC::LS: in isValidCBCond() 377 case AArch64CC::GE: in isValidCBCond() 378 case AArch64CC::LT: in isValidCBCond() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 164 AArch64CC::CondCode parseCondCodeString(StringRef Cond, 454 AArch64CC::CondCode Code; 647 AArch64CC::CondCode getCondCode() const { in getCondCode() 2441 CreateCondCode(AArch64CC::CondCode Code, SMLoc S, SMLoc E, MCContext &Ctx) { in CreateCondCode() 3490 AArch64CC::CondCode 3492 AArch64CC::CondCode CC = StringSwitch<AArch64CC::CondCode>(Cond.lower()) in parseCondCodeString() 3493 .Case("eq", AArch64CC::EQ) in parseCondCodeString() 3494 .Case("ne", AArch64CC::NE) in parseCondCodeString() 3495 .Case("cs", AArch64CC::HS) in parseCondCodeString() 3496 .Case("hs", AArch64CC::HS) in parseCondCodeString() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1391 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printCondCode() 1392 O << AArch64CC::getCondCodeName(CC); in printCondCode() 1398 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printInverseCondCode() 1399 O << AArch64CC::getCondCodeName(AArch64CC::getInvertedCondCode(CC)); in printInverseCondCode()
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