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Searched refs:AArch64CC (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64GlobalISelUtils.cpp129 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC()
130 AArch64CC::CondCode &CondCode2) { in changeFCMPPredToAArch64CC()
131 CondCode2 = AArch64CC::AL; in changeFCMPPredToAArch64CC()
136 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
139 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
142 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
145 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
148 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
151 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
152 CondCode2 = AArch64CC::GT; in changeFCMPPredToAArch64CC()
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H A DAArch64GlobalISelUtils.h69 AArch64CC::CondCode &CondCode,
70 AArch64CC::CondCode &CondCode2);
80 AArch64CC::CondCode &CondCode,
81 AArch64CC::CondCode &CondCode2,
H A DAArch64InstructionSelector.cpp318 AArch64CC::CondCode CC,
325 AArch64CC::CondCode Pred,
342 std::pair<MachineInstr *, AArch64CC::CondCode>
350 MachineInstr *emitConjunction(Register Val, AArch64CC::CondCode &OutCC,
354 AArch64CC::CondCode Predicate,
355 AArch64CC::CondCode OutCC,
357 MachineInstr *emitConjunctionRec(Register Val, AArch64CC::CondCode &OutCC,
359 AArch64CC::CondCode Predicate,
1175 Register False, AArch64CC::CondCode CC, in emitSelect()
1216 CC = AArch64CC::getInvertedCondCode(CC); in emitSelect()
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H A DAArch64PostLegalizerLowering.cpp920 getVectorFCMP(AArch64CC::CondCode CC, Register LHS, Register RHS, bool IsZero, in getVectorFCMP()
928 case AArch64CC::NE: in getVectorFCMP()
935 case AArch64CC::EQ: in getVectorFCMP()
942 case AArch64CC::GE: in getVectorFCMP()
949 case AArch64CC::GT: in getVectorFCMP()
956 case AArch64CC::LS: in getVectorFCMP()
963 case AArch64CC::MI: in getVectorFCMP()
1014 AArch64CC::CondCode CC, CC2 = AArch64CC::AL; in applyLowerVectorFCMP()
1025 CC = Pred == CmpInst::Predicate::FCMP_ORD ? AArch64CC::EQ : AArch64CC::NE; in applyLowerVectorFCMP()
1037 if (CC2 == AArch64CC::AL) in applyLowerVectorFCMP()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ConditionOptimizer.cpp102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
232 case AArch64CC::GT: return AArch64CC::GE; in getAdjustedCmp()
233 case AArch64CC::GE: return AArch64CC::GT; in getAdjustedCmp()
234 case AArch64CC::LT: return AArch64CC::LE; in getAdjustedCmp()
235 case AArch64CC::LE: return AArch64CC::LT; in getAdjustedCmp()
244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
251 int Correction = (Cmp == AArch64CC::GT) ? 1 : -1; in adjustCmp()
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H A DAArch64ConditionalCompares.cpp162 AArch64CC::CondCode HeadCmpBBCC;
168 AArch64CC::CondCode CmpBBTailCC;
271 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
275 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
287 CC = AArch64CC::EQ; in parseCond()
292 CC = AArch64CC::NE; in parseCond()
524 HeadCmpBBCC = AArch64CC::getInvertedCondCode(HeadCmpBBCC); in canConvert()
549 CmpBBTailCC = AArch64CC::getInvertedCondCode(CmpBBTailCC); in canConvert()
552 << AArch64CC::getCondCodeName(HeadCmpBBCC) in canConvert()
554 << AArch64CC::getCondCodeName(CmpBBTailCC) << '\n'); in canConvert()
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H A DAArch64SpeculationHardening.cpp154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
381 .addImm(AArch64CC::EQ); in insertSPToRegTaintPropagation()
H A DAArch64CondBrTuning.cpp112 AArch64CC::CondCode CC; in convertToCondBr()
120 CC = AArch64CC::EQ; in convertToCondBr()
124 CC = AArch64CC::NE; in convertToCondBr()
128 CC = AArch64CC::PL; in convertToCondBr()
132 CC = AArch64CC::MI; in convertToCondBr()
H A DAArch64RedundantCopyElimination.cpp144 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm(); in knownRegValInBlock()
145 if (CC != AArch64CC::EQ && CC != AArch64CC::NE) in knownRegValInBlock()
149 if ((CC == AArch64CC::EQ && BrTarget != MBB) || in knownRegValInBlock()
150 (CC == AArch64CC::NE && BrTarget == MBB)) in knownRegValInBlock()
H A DAArch64FastISel.cpp197 bool foldXALUIntrinsic(AArch64CC::CondCode &CC, const Instruction *I,
2212 static AArch64CC::CondCode getCompareCC(CmpInst::Predicate Pred) { in getCompareCC()
2218 return AArch64CC::AL; in getCompareCC()
2221 return AArch64CC::EQ; in getCompareCC()
2224 return AArch64CC::GT; in getCompareCC()
2227 return AArch64CC::GE; in getCompareCC()
2230 return AArch64CC::HI; in getCompareCC()
2232 return AArch64CC::MI; in getCompareCC()
2235 return AArch64CC::LS; in getCompareCC()
2237 return AArch64CC::VC; in getCompareCC()
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H A DAArch64ISelLowering.cpp3252 static AArch64CC::CondCode changeIntCCToAArch64CC(ISD::CondCode CC) { in changeIntCCToAArch64CC()
3257 return AArch64CC::NE; in changeIntCCToAArch64CC()
3259 return AArch64CC::EQ; in changeIntCCToAArch64CC()
3261 return AArch64CC::GT; in changeIntCCToAArch64CC()
3263 return AArch64CC::GE; in changeIntCCToAArch64CC()
3265 return AArch64CC::LT; in changeIntCCToAArch64CC()
3267 return AArch64CC::LE; in changeIntCCToAArch64CC()
3269 return AArch64CC::HI; in changeIntCCToAArch64CC()
3271 return AArch64CC::HS; in changeIntCCToAArch64CC()
3273 return AArch64CC::LO; in changeIntCCToAArch64CC()
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H A DAArch64InstrInfo.cpp503 AArch64CC::CondCode CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in reverseBranchCondition()
504 Cond[0].setImm(AArch64CC::getInvertedCondCode(CC)); in reverseBranchCondition()
759 AArch64CC::CondCode CC; in insertSelect()
764 CC = AArch64CC::CondCode(Cond[0].getImm()); in insertSelect()
774 CC = AArch64CC::EQ; in insertSelect()
778 CC = AArch64CC::EQ; in insertSelect()
782 CC = AArch64CC::NE; in insertSelect()
786 CC = AArch64CC::NE; in insertSelect()
813 CC = AArch64CC::EQ; in insertSelect()
817 CC = AArch64CC::NE; in insertSelect()
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H A DAArch64AsmPrinter.cpp557 .addImm(AArch64CC::EQ) in LowerKCFI_CHECK()
714 .addImm(AArch64CC::NE) in emitHwasanMemaccessSymbols()
739 .addImm(AArch64CC::EQ) in emitHwasanMemaccessSymbols()
754 .addImm(AArch64CC::HI) in emitHwasanMemaccessSymbols()
779 .addImm(AArch64CC::LS) in emitHwasanMemaccessSymbols()
803 .addImm(AArch64CC::EQ) in emitHwasanMemaccessSymbols()
1457 .addImm(AArch64CC::LS)); in LowerHardenedBRJumpTable()
1922 .addImm(AArch64CC::EQ) in emitPtrauthAuthResign()
H A DAArch64ExpandPseudoInsts.cpp275 .addImm(AArch64CC::NE) in expandCMP_SWAP()
383 .addImm(AArch64CC::EQ); in expandCMP_SWAP_128()
391 .addImm(AArch64CC::EQ); in expandCMP_SWAP_128()
732 .addImm(AArch64CC::NE) in expandSetTagLoop()
H A DAArch64PointerAuth.cpp317 .addImm(AArch64CC::NE) in checkAuthenticatedRegister()
H A DAArch64InstrFormats.td2110 MCOp.getImm() != AArch64CC::AL &&
2111 MCOp.getImm() != AArch64CC::NV;
3504 AArch64CC::CondCode CC = static_cast<AArch64CC::CondCode>(N->getZExtValue());
3505 return CurDAG->getTargetConstant(AArch64CC::getInvertedCondCode(CC), SDLoc(N),
H A DAArch64FrameLowering.cpp4899 .addImm(AArch64CC::NE) in inlineStackProbeLoopExactMultiple()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp163 AArch64CC::CondCode parseCondCodeString(StringRef Cond,
446 AArch64CC::CondCode Code;
631 AArch64CC::CondCode getCondCode() const { in getCondCode()
2394 CreateCondCode(AArch64CC::CondCode Code, SMLoc S, SMLoc E, MCContext &Ctx) { in CreateCondCode()
3423 AArch64CC::CondCode
3425 AArch64CC::CondCode CC = StringSwitch<AArch64CC::CondCode>(Cond.lower()) in parseCondCodeString()
3426 .Case("eq", AArch64CC::EQ) in parseCondCodeString()
3427 .Case("ne", AArch64CC::NE) in parseCondCodeString()
3428 .Case("cs", AArch64CC::HS) in parseCondCodeString()
3429 .Case("hs", AArch64CC::HS) in parseCondCodeString()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1378 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printAMNoIndex()
1379 O << AArch64CC::getCondCodeName(CC); in printAMNoIndex()
1385 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printImmScale()
1386 O << AArch64CC::getCondCodeName(AArch64CC::getInvertedCondCode(CC)); in printImmScale()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h251 namespace AArch64CC {