/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | sama5d3_lcd.dtsi | 60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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H A D | at91sam9x5_lcd.dtsi | 63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynosautov9-pinctrl.dtsi | 3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source 7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as 42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 60 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 66 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 106 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; [all …]
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H A D | exynos7885-pinctrl.dtsi | 3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as 84 samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 85 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 90 samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 96 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 97 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; 98 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 99 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; [all …]
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H A D | exynos5433-pinctrl.dtsi | 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \ 143 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 144 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 145 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>; 150 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; [all …]
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H A D | exynos7-pinctrl.dtsi | 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 191 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 198 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>; 203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos850-pinctrl.dtsi | 3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device 108 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 110 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 116 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 118 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 124 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 125 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | s5pv210-pinctrl.dtsi | 3 * Samsung's S5PV210 SoC device tree source - pin control-related 11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are 18 pin- ## _pin { \ 20 samsung,pin-con-pdn = <S5PV210_PIN_PDN_ ##_mode>; \ 21 samsung,pin-pud-pdn = <S5PV210_PIN_PULL_ ##_pull>; \ 279 samsung,pin-function = <S5PV210_PIN_FUNC_2>; 280 samsung,pin-pud = <S5PV210_PIN_PULL_NONE>; 281 samsung,pin [all...] |
H A D | exynos4x12-pinctrl.dtsi | 3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \ 18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \ 128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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H A D | exynos4210-pinctrl.dtsi | 3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device 147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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H A D | exynos5420-pinctrl.dtsi | 3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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H A D | exynos5250-pinctrl.dtsi | 3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device 202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>; 217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; [all …]
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H A D | exynos3250-pinctrl.dtsi | 3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source 8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device 15 pin- ## _pin { \ 17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ 23 pin- ## _pin { \ 25 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \ 26 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \ 88 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; [all …]
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H A D | s3c64xx-pinctrl.dtsi | 4 * - pin control-related definitions 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are 136 samsung,pin-function = <S3C64XX_PIN_FUNC_2>; 137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 142 samsung,pin-function = <S3C64XX_PIN_FUNC_2>; 143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 148 samsung,pin-function = <S3C64XX_PIN_FUNC_2>; 149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; 154 samsung,pin-function = <S3C64XX_PIN_FUNC_2>; 155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; [all …]
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H A D | exynos5260-pinctrl.dtsi | 3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device 201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; 208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; 215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; [all …]
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H A D | exynos5410-pinctrl.dtsi | 3 * Exynos5410 SoC pin-mux and pin-config device tree source 282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/ |
H A D | gs101-pinctrl.dtsi | 3 * GS101 SoC pin-mux and pin-config device tree source 120 samsung,pin-function = <GS101_PIN_FUNC_2>; 121 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 126 samsung,pin-function = <GS101_PIN_FUNC_2>; 127 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 132 samsung,pin-function = <GS101_PIN_FUNC_2>; 133 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 138 samsung,pin-function = <GS101_PIN_FUNC_2>; 139 samsung,pin-pud = <GS101_PIN_PULL_NONE>; 140 samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>; [all …]
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/freebsd/sys/dev/qcom_tlmm/ |
H A D | qcom_tlmm_ipq4018_hw.c | 69 int pin, int function) in qcom_tlmm_ipq4018_hw_pin_set_function() argument 75 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_function() 78 reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin, in qcom_tlmm_ipq4018_hw_pin_set_function() 84 GPIO_WRITE(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin, in qcom_tlmm_ipq4018_hw_pin_set_function() 97 int pin, int *function) in qcom_tlmm_ipq4018_hw_pin_get_function() argument 103 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_get_function() 107 reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin, in qcom_tlmm_ipq4018_hw_pin_get_function() 122 int pin) in qcom_tlmm_ipq4018_hw_pin_set_oe_output() argument 128 if (pin >= sc->gpio_npins) in qcom_tlmm_ipq4018_hw_pin_set_oe_output() 131 reg = GPIO_READ(sc, QCOM_TLMM_IPQ4018_REG_PIN(pin, in qcom_tlmm_ipq4018_hw_pin_set_oe_output() [all …]
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H A D | qcom_tlmm_pin.c | 60 qcom_tlmm_pin_lookup(struct qcom_tlmm_softc *sc, int pin) in qcom_tlmm_pin_lookup() argument 62 if (pin >= sc->gpio_npins) in qcom_tlmm_pin_lookup() 65 return &sc->gpio_pins[pin]; in qcom_tlmm_pin_lookup() 70 struct gpio_pin *pin, unsigned int flags) in qcom_tlmm_pin_configure() argument 79 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); in qcom_tlmm_pin_configure() 87 pin->gp_flags |= GPIO_PIN_OUTPUT; in qcom_tlmm_pin_configure() 89 pin->gp_pin); in qcom_tlmm_pin_configure() 91 pin->gp_flags |= GPIO_PIN_INPUT; in qcom_tlmm_pin_configure() 93 pin->gp_pin); in qcom_tlmm_pin_configure() 101 pin->gp_flags |= GPIO_PIN_PULLUP; in qcom_tlmm_pin_configure() [all …]
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/freebsd/sys/arm/mv/ |
H A D | gpio.c | 99 int pin; member 405 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep) in mv_gpio_setup_intrhandler() argument 414 if (pin < 0 || pin >= sc->pin_num) in mv_gpio_setup_intrhandler() 416 event = sc->gpio_events[pin]; in mv_gpio_setup_intrhandler() 419 if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_DEBOUNCE) { in mv_gpio_setup_intrhandler() 420 error = mv_gpio_debounce_init(dev, pin); in mv_gpio_setup_intrhandler() 425 } else if (sc->gpio_setup[pin].gp_flags & MV_GPIO_IN_IRQ_DOUBLE_EDGE) in mv_gpio_setup_intrhandler() 426 mv_gpio_double_edge_init(dev, pin); in mv_gpio_setup_intrhandler() 428 error = intr_event_create(&event, (void *)s, 0, pin, in mv_gpio_setup_intrhandler() 433 "gpio%d:", pin); in mv_gpio_setup_intrhandler() [all …]
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/freebsd/sys/dev/amdgpio/ |
H A D | amdgpio.c | 76 amdgpio_is_pin_output(struct amdgpio_softc *sc, uint32_t pin) in amdgpio_is_pin_output() argument 84 reg = AMDGPIO_PIN_REGISTER(pin); in amdgpio_is_pin_output() 122 amdgpio_valid_pin(struct amdgpio_softc *sc, int pin) in amdgpio_valid_pin() argument 124 dprintf("pin %d\n", pin); in amdgpio_valid_pin() 128 if ((sc->sc_gpio_pins[pin].gp_pin == pin) && in amdgpio_valid_pin() 129 (sc->sc_gpio_pins[pin].gp_caps != 0)) in amdgpio_valid_pin() 136 amdgpio_pin_getname(device_t dev, uint32_t pin, char *name) in amdgpio_pin_getname() argument 140 dprintf("pin %d\n", pin); in amdgpio_pin_getname() 143 if (!amdgpio_valid_pin(sc, pin)) in amdgpio_pin_getname() 147 snprintf(name, GPIOMAXNAME, "%s", sc->sc_gpio_pins[pin].gp_name); in amdgpio_pin_getname() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/actions/ |
H A D | s900-bubblegum-96.dts | 69 * NC = not connected (pin out but not routed from the chip to 71 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ 100 "GPIO-G", /* GPIO_6, LSEC pin 29 */ 101 "GPIO-H", /* GPIO_7, LSEC pin 30 */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/tesla/ |
H A D | fsd-pinctrl.dtsi | 56 samsung,pin-function = <FSD_PIN_FUNC_2>; 57 samsung,pin-pud = <FSD_PIN_PULL_DOWN>; 58 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 63 samsung,pin-function = <FSD_PIN_FUNC_2>; 64 samsung,pin-pud = <FSD_PIN_PULL_UP>; 65 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 240 samsung,pin-function = <FSD_PIN_FUNC_2>; 241 samsung,pin-pud = <FSD_PIN_PULL_UP>; 242 samsung,pin-drv = <FSD_PIN_DRV_LV4>; 247 samsung,pin-function = <FSD_PIN_FUNC_2>; [all …]
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/freebsd/usr.sbin/bhyve/amd64/ |
H A D | pci_irq.c | 91 pirq_read(int pin) in pirq_read() argument 94 assert(pin > 0 && pin <= NPIRQS); in pirq_read() 95 return (pirqs[pin - 1].reg); in pirq_read() 99 pirq_write(struct vmctx *ctx, int pin, uint8_t val) in pirq_write() argument 103 assert(pin > 0 && pin <= NPIRQS); in pirq_write() 104 pirq = &pirqs[pin - 1]; in pirq_write() 159 int pin; in pci_irq_assert() local 161 pin = pi->pi_lintr.irq.pirq_pin; in pci_irq_assert() 162 if (pin > 0) { in pci_irq_assert() 163 assert(pin <= NPIRQS); in pci_irq_assert() [all …]
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/freebsd/sys/arm/xilinx/ |
H A D | zy7_gpio.c | 107 #define ZYNQ_PIN_IS_MIO(type, pin) (pin >= ZYNQ##type##_PIN_MIO_MIN && \ argument 108 pin <= ZYNQ##type##_PIN_MIO_MAX) 109 #define ZYNQ_PIN_IS_EMIO(type, pin) (pin >= ZYNQ##type##_PIN_EMIO_MIN && \ argument 110 pin <= ZYNQ##type##_PIN_EMIO_MAX) 222 zy7_pin_valid(device_t dev, uint32_t pin) in zy7_pin_valid() argument 230 if (pin >= sc->conf->bank_min[i] && pin <= sc->conf->bank_max[i]) { in zy7_pin_valid() 241 zy7_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) in zy7_gpio_pin_getcaps() argument 244 if (!zy7_pin_valid(dev, pin)) in zy7_gpio_pin_getcaps() 254 zy7_gpio_pin_getname(device_t dev, uint32_t pin, char *name) in zy7_gpio_pin_getname() argument 261 if (!zy7_pin_valid(dev, pin)) in zy7_gpio_pin_getname() [all …]
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