1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2023 Intel Corporation
4 */
5
6 #ifndef _XE_GPU_SCHEDULER_H_
7 #define _XE_GPU_SCHEDULER_H_
8
9 #include "xe_gpu_scheduler_types.h"
10 #include "xe_sched_job_types.h"
11
12 int xe_sched_init(struct xe_gpu_scheduler *sched,
13 const struct drm_sched_backend_ops *ops,
14 const struct xe_sched_backend_ops *xe_ops,
15 struct workqueue_struct *submit_wq,
16 uint32_t hw_submission, unsigned hang_limit,
17 long timeout, struct workqueue_struct *timeout_wq,
18 atomic_t *score, const char *name,
19 struct device *dev);
20 void xe_sched_fini(struct xe_gpu_scheduler *sched);
21
22 void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
23 void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
24
25 void xe_sched_submission_resume_tdr(struct xe_gpu_scheduler *sched);
26
27 void xe_sched_add_msg(struct xe_gpu_scheduler *sched,
28 struct xe_sched_msg *msg);
29 void xe_sched_add_msg_locked(struct xe_gpu_scheduler *sched,
30 struct xe_sched_msg *msg);
31
xe_sched_msg_lock(struct xe_gpu_scheduler * sched)32 static inline void xe_sched_msg_lock(struct xe_gpu_scheduler *sched)
33 {
34 spin_lock(&sched->base.job_list_lock);
35 }
36
xe_sched_msg_unlock(struct xe_gpu_scheduler * sched)37 static inline void xe_sched_msg_unlock(struct xe_gpu_scheduler *sched)
38 {
39 spin_unlock(&sched->base.job_list_lock);
40 }
41
xe_sched_stop(struct xe_gpu_scheduler * sched)42 static inline void xe_sched_stop(struct xe_gpu_scheduler *sched)
43 {
44 drm_sched_stop(&sched->base, NULL);
45 }
46
xe_sched_tdr_queue_imm(struct xe_gpu_scheduler * sched)47 static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
48 {
49 drm_sched_tdr_queue_imm(&sched->base);
50 }
51
xe_sched_resubmit_jobs(struct xe_gpu_scheduler * sched)52 static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
53 {
54 struct drm_sched_job *s_job;
55
56 list_for_each_entry(s_job, &sched->base.pending_list, list) {
57 struct drm_sched_fence *s_fence = s_job->s_fence;
58 struct dma_fence *hw_fence = s_fence->parent;
59
60 if (hw_fence && !dma_fence_is_signaled(hw_fence))
61 sched->base.ops->run_job(s_job);
62 }
63 }
64
65 static inline bool
xe_sched_invalidate_job(struct xe_sched_job * job,int threshold)66 xe_sched_invalidate_job(struct xe_sched_job *job, int threshold)
67 {
68 return drm_sched_invalidate_job(&job->drm, threshold);
69 }
70
xe_sched_add_pending_job(struct xe_gpu_scheduler * sched,struct xe_sched_job * job)71 static inline void xe_sched_add_pending_job(struct xe_gpu_scheduler *sched,
72 struct xe_sched_job *job)
73 {
74 spin_lock(&sched->base.job_list_lock);
75 list_add(&job->drm.list, &sched->base.pending_list);
76 spin_unlock(&sched->base.job_list_lock);
77 }
78
79 static inline
xe_sched_first_pending_job(struct xe_gpu_scheduler * sched)80 struct xe_sched_job *xe_sched_first_pending_job(struct xe_gpu_scheduler *sched)
81 {
82 struct xe_sched_job *job;
83
84 spin_lock(&sched->base.job_list_lock);
85 job = list_first_entry_or_null(&sched->base.pending_list,
86 struct xe_sched_job, drm.list);
87 spin_unlock(&sched->base.job_list_lock);
88
89 return job;
90 }
91
92 static inline int
xe_sched_entity_init(struct xe_sched_entity * entity,struct xe_gpu_scheduler * sched)93 xe_sched_entity_init(struct xe_sched_entity *entity,
94 struct xe_gpu_scheduler *sched)
95 {
96 return drm_sched_entity_init(entity, 0,
97 (struct drm_gpu_scheduler **)&sched,
98 1, NULL);
99 }
100
101 #define xe_sched_entity_fini drm_sched_entity_fini
102
103 #endif
104