1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 /* This file is dual-licensed; see usr/src/contrib/bhyve/LICENSE */ 12 13 /* 14 * Copyright 2025 Oxide Computer Company 15 */ 16 17 #ifndef _VMM_GPT_IMPL_H 18 #define _VMM_GPT_IMPL_H 19 20 #include <sys/types.h> 21 #include <sys/mach_mmu.h> 22 #include <sys/mman.h> 23 #include <sys/x86_archext.h> 24 #include <vm/hat_pte.h> 25 26 /* 27 * Implementation specific functions and attributes for nested page tables on a 28 * given hardware platform (VMX or SVM). 29 */ 30 typedef struct vmm_pte_impl vmm_pte_impl_t; 31 struct vmm_pte_impl { 32 /* Create a PTE which maps the next level of paging table */ 33 uint64_t (*vpi_map_table)(pfn_t); 34 /* Create a PTE which maps a PFN with the provided protection/attrs */ 35 uint64_t (*vpi_map_page)(pfn_t, uint_t, uint8_t); 36 /* 37 * Parse PTE, returning PFN and protection if it is mapped. 38 * Returns false if PTE does not indicated a mapped page. 39 */ 40 bool (*vpi_pte_parse)(uint64_t, pfn_t *, uint_t *); 41 /* Bit in PTEs which indicates that they have been accessed */ 42 uint64_t vpi_bit_accessed; 43 /* Bit in PTEs which indicates that they have been dirtied */ 44 uint64_t vpi_bit_dirty; 45 /* 46 * Generate PML4 for page tables, given PFN of root and if 47 * accessed/dirty page tracking should be enabled 48 */ 49 uint64_t (*vpi_get_pmtp)(pfn_t, bool); 50 /* Does this platform support access/dirty page tracking */ 51 bool (*vpi_hw_ad_supported)(void); 52 53 }; 54 55 #endif /* _VMM_GPT_IMPL_H */ 56