1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 5 */ 6#include <dt-bindings/pinctrl/stm32-pinfunc.h> 7 8&pinctrl { 9 /omit-if-no-ref/ 10 adc1_ain_pins_a: adc1-ain-0 { 11 pins { 12 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */ 13 <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */ 14 <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */ 15 <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */ 16 <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */ 17 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */ 18 }; 19 }; 20 21 /omit-if-no-ref/ 22 adc1_in6_pins_a: adc1-in6-0 { 23 pins { 24 pinmux = <STM32_PINMUX('F', 12, ANALOG)>; 25 }; 26 }; 27 28 /omit-if-no-ref/ 29 adc1_in10_pins_a: adc1-in10-0 { 30 pins { 31 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; 32 }; 33 }; 34 35 /omit-if-no-ref/ 36 adc12_ain_pins_a: adc12-ain-0 { 37 pins { 38 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */ 39 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ 40 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */ 41 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */ 42 }; 43 }; 44 45 /omit-if-no-ref/ 46 adc12_ain_pins_b: adc12-ain-1 { 47 pins { 48 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ 49 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */ 50 }; 51 }; 52 53 /omit-if-no-ref/ 54 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 { 55 pins { 56 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */ 57 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */ 58 }; 59 }; 60 61 /omit-if-no-ref/ 62 cec_pins_a: cec-0 { 63 pins { 64 pinmux = <STM32_PINMUX('A', 15, AF4)>; 65 bias-disable; 66 drive-open-drain; 67 slew-rate = <0>; 68 }; 69 }; 70 71 /omit-if-no-ref/ 72 cec_sleep_pins_a: cec-sleep-0 { 73 pins { 74 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */ 75 }; 76 }; 77 78 /omit-if-no-ref/ 79 cec_pins_b: cec-1 { 80 pins { 81 pinmux = <STM32_PINMUX('B', 6, AF5)>; 82 bias-disable; 83 drive-open-drain; 84 slew-rate = <0>; 85 }; 86 }; 87 88 /omit-if-no-ref/ 89 cec_sleep_pins_b: cec-sleep-1 { 90 pins { 91 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */ 92 }; 93 }; 94 95 /omit-if-no-ref/ 96 dac_ch1_pins_a: dac-ch1-0 { 97 pins { 98 pinmux = <STM32_PINMUX('A', 4, ANALOG)>; 99 }; 100 }; 101 102 /omit-if-no-ref/ 103 dac_ch2_pins_a: dac-ch2-0 { 104 pins { 105 pinmux = <STM32_PINMUX('A', 5, ANALOG)>; 106 }; 107 }; 108 109 /omit-if-no-ref/ 110 dcmi_pins_a: dcmi-0 { 111 pins { 112 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */ 113 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 114 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 115 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */ 116 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 117 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 118 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */ 119 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 120 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ 121 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */ 122 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ 123 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ 124 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */ 125 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */ 126 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */ 127 bias-disable; 128 }; 129 }; 130 131 /omit-if-no-ref/ 132 dcmi_sleep_pins_a: dcmi-sleep-0 { 133 pins { 134 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */ 135 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 136 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 137 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */ 138 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 139 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ 140 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */ 141 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ 142 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ 143 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */ 144 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ 145 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ 146 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */ 147 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */ 148 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */ 149 }; 150 }; 151 152 /omit-if-no-ref/ 153 dcmi_pins_b: dcmi-1 { 154 pins { 155 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */ 156 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 157 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 158 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */ 159 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 160 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 161 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */ 162 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */ 163 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */ 164 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */ 165 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */ 166 bias-disable; 167 }; 168 }; 169 170 /omit-if-no-ref/ 171 dcmi_sleep_pins_b: dcmi-sleep-1 { 172 pins { 173 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */ 174 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 175 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 176 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */ 177 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 178 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ 179 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */ 180 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */ 181 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */ 182 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */ 183 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */ 184 }; 185 }; 186 187 /omit-if-no-ref/ 188 dcmi_pins_c: dcmi-2 { 189 pins { 190 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */ 191 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 192 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 193 <STM32_PINMUX('A', 9, AF13)>,/* DCMI_D0 */ 194 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 195 <STM32_PINMUX('E', 0, AF13)>,/* DCMI_D2 */ 196 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */ 197 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 198 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ 199 <STM32_PINMUX('I', 6, AF13)>,/* DCMI_D6 */ 200 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ 201 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ 202 <STM32_PINMUX('H', 7, AF13)>;/* DCMI_D9 */ 203 bias-pull-up; 204 }; 205 }; 206 207 /omit-if-no-ref/ 208 dcmi_sleep_pins_c: dcmi-sleep-2 { 209 pins { 210 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */ 211 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 212 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 213 <STM32_PINMUX('A', 9, ANALOG)>,/* DCMI_D0 */ 214 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 215 <STM32_PINMUX('E', 0, ANALOG)>,/* DCMI_D2 */ 216 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */ 217 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ 218 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ 219 <STM32_PINMUX('I', 6, ANALOG)>,/* DCMI_D6 */ 220 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ 221 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ 222 <STM32_PINMUX('H', 7, ANALOG)>;/* DCMI_D9 */ 223 }; 224 }; 225 226 /omit-if-no-ref/ 227 ethernet0_rgmii_pins_a: rgmii-0 { 228 pins1 { 229 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 230 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 231 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 232 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 233 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 234 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 235 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 236 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 237 bias-disable; 238 drive-push-pull; 239 slew-rate = <2>; 240 }; 241 pins2 { 242 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 243 bias-disable; 244 drive-push-pull; 245 slew-rate = <0>; 246 }; 247 pins3 { 248 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 249 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 250 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */ 251 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 252 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 253 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 254 bias-disable; 255 }; 256 }; 257 258 /omit-if-no-ref/ 259 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 { 260 pins1 { 261 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 262 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 263 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 264 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 265 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 266 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 267 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 268 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 269 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 270 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 271 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 272 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */ 273 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 274 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 275 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 276 }; 277 }; 278 279 /omit-if-no-ref/ 280 ethernet0_rgmii_pins_b: rgmii-1 { 281 pins1 { 282 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 283 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 284 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 285 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 286 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 287 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 288 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 289 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 290 bias-disable; 291 drive-push-pull; 292 slew-rate = <2>; 293 }; 294 pins2 { 295 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 296 bias-disable; 297 drive-push-pull; 298 slew-rate = <0>; 299 }; 300 pins3 { 301 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 302 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 303 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 304 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 305 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 306 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 307 bias-disable; 308 }; 309 }; 310 311 /omit-if-no-ref/ 312 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 { 313 pins1 { 314 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 315 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 316 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 317 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 318 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 319 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 320 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 321 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 322 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 323 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 324 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 325 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 326 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 327 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 328 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 329 }; 330 }; 331 332 /omit-if-no-ref/ 333 ethernet0_rgmii_pins_c: rgmii-2 { 334 pins1 { 335 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 336 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 337 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */ 338 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 339 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 340 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 341 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 342 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 343 bias-disable; 344 drive-push-pull; 345 slew-rate = <2>; 346 }; 347 pins2 { 348 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 349 bias-disable; 350 drive-push-pull; 351 slew-rate = <0>; 352 }; 353 pins3 { 354 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 355 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 356 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 357 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 358 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 359 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 360 bias-disable; 361 }; 362 }; 363 364 /omit-if-no-ref/ 365 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { 366 pins1 { 367 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 368 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 369 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */ 370 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 371 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 372 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 373 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 374 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 375 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 376 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 377 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 378 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 379 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 380 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 381 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 382 }; 383 }; 384 385 /omit-if-no-ref/ 386 ethernet0_rgmii_pins_d: rgmii-3 { 387 pins1 { 388 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 389 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 390 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 391 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 392 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 393 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 394 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 395 bias-disable; 396 drive-push-pull; 397 slew-rate = <2>; 398 }; 399 pins2 { 400 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 401 bias-disable; 402 drive-push-pull; 403 slew-rate = <0>; 404 }; 405 pins3 { 406 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 407 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 408 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 409 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */ 410 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 411 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 412 bias-disable; 413 }; 414 }; 415 416 /omit-if-no-ref/ 417 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 { 418 pins1 { 419 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 420 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 421 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 422 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 423 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 424 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 425 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 426 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 427 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 428 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 429 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 430 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 431 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */ 432 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 433 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 434 }; 435 }; 436 437 /omit-if-no-ref/ 438 ethernet0_rgmii_pins_e: rgmii-4 { 439 pins1 { 440 pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 441 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 442 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 443 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 444 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 445 <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */ 446 bias-disable; 447 drive-push-pull; 448 slew-rate = <2>; 449 }; 450 pins2 { 451 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 452 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 453 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 454 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 455 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 456 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 457 bias-disable; 458 }; 459 }; 460 461 /omit-if-no-ref/ 462 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { 463 pins1 { 464 pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 465 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 466 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 467 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 468 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 469 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 470 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 471 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 472 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 473 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 474 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 475 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 476 }; 477 }; 478 479 /omit-if-no-ref/ 480 ethernet0_rmii_pins_a: rmii-0 { 481 pins1 { 482 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ 483 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */ 484 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 485 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */ 486 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 487 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 488 bias-disable; 489 drive-push-pull; 490 slew-rate = <2>; 491 }; 492 pins2 { 493 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 494 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 495 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 496 bias-disable; 497 }; 498 }; 499 500 /omit-if-no-ref/ 501 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 { 502 pins1 { 503 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */ 504 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */ 505 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 506 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 507 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 508 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 509 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 510 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 511 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 512 }; 513 }; 514 515 /omit-if-no-ref/ 516 ethernet0_rmii_pins_b: rmii-1 { 517 pins1 { 518 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */ 519 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */ 520 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */ 521 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */ 522 bias-disable; 523 drive-push-pull; 524 slew-rate = <1>; 525 }; 526 pins2 { 527 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */ 528 bias-disable; 529 drive-push-pull; 530 slew-rate = <0>; 531 }; 532 pins3 { 533 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */ 534 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */ 535 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */ 536 bias-disable; 537 }; 538 pins4 { 539 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */ 540 }; 541 }; 542 543 /omit-if-no-ref/ 544 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 { 545 pins1 { 546 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 547 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */ 548 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */ 549 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */ 550 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 551 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */ 552 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */ 553 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */ 554 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */ 555 }; 556 }; 557 558 /omit-if-no-ref/ 559 ethernet0_rmii_pins_c: rmii-2 { 560 pins1 { 561 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ 562 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */ 563 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 564 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */ 565 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 566 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 567 bias-disable; 568 drive-push-pull; 569 slew-rate = <2>; 570 }; 571 pins2 { 572 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 573 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 574 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 575 bias-disable; 576 }; 577 }; 578 579 /omit-if-no-ref/ 580 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 { 581 pins1 { 582 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */ 583 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */ 584 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 585 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 586 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 587 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 588 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 589 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 590 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 591 }; 592 }; 593 594 /omit-if-no-ref/ 595 ethernet0_rmii_pins_d: rmii-3 { 596 pins1 { 597 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */ 598 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */ 599 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */ 600 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */ 601 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */ 602 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */ 603 bias-disable; 604 drive-push-pull; 605 slew-rate = <2>; 606 }; 607 608 pins2 { 609 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */ 610 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */ 611 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */ 612 bias-disable; 613 }; 614 }; 615 616 /omit-if-no-ref/ 617 ethernet0_rmii_sleep_pins_d: rmii-sleep-3 { 618 pins1 { 619 pinmux = <STM32_PINMUX('B', 12, ANALOG)>, /* ETH1_RMII_TXD0 */ 620 <STM32_PINMUX('B', 13, ANALOG)>, /* ETH1_RMII_TXD1 */ 621 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */ 622 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ 623 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ 624 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */ 625 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */ 626 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */ 627 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */ 628 }; 629 }; 630 631 /omit-if-no-ref/ 632 fmc_pins_a: fmc-0 { 633 pins1 { 634 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ 635 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ 636 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */ 637 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */ 638 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ 639 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ 640 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ 641 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ 642 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ 643 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ 644 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ 645 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ 646 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */ 647 bias-disable; 648 drive-push-pull; 649 slew-rate = <1>; 650 }; 651 pins2 { 652 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */ 653 bias-pull-up; 654 }; 655 }; 656 657 /omit-if-no-ref/ 658 fmc_sleep_pins_a: fmc-sleep-0 { 659 pins { 660 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ 661 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ 662 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */ 663 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */ 664 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ 665 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ 666 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ 667 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ 668 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ 669 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ 670 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ 671 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ 672 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */ 673 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */ 674 }; 675 }; 676 677 /omit-if-no-ref/ 678 fmc_pins_b: fmc-1 { 679 pins { 680 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ 681 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ 682 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */ 683 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ 684 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ 685 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ 686 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ 687 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ 688 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ 689 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ 690 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ 691 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */ 692 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */ 693 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */ 694 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */ 695 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */ 696 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */ 697 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */ 698 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */ 699 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */ 700 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */ 701 bias-disable; 702 drive-push-pull; 703 slew-rate = <3>; 704 }; 705 }; 706 707 /omit-if-no-ref/ 708 fmc_sleep_pins_b: fmc-sleep-1 { 709 pins { 710 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ 711 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ 712 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */ 713 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ 714 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ 715 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ 716 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ 717 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ 718 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ 719 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ 720 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ 721 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */ 722 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */ 723 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */ 724 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */ 725 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */ 726 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */ 727 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */ 728 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */ 729 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */ 730 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */ 731 }; 732 }; 733 734 /omit-if-no-ref/ 735 i2c1_pins_a: i2c1-0 { 736 pins { 737 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ 738 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ 739 bias-disable; 740 drive-open-drain; 741 slew-rate = <0>; 742 }; 743 }; 744 745 /omit-if-no-ref/ 746 i2c1_sleep_pins_a: i2c1-sleep-0 { 747 pins { 748 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ 749 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ 750 }; 751 }; 752 753 /omit-if-no-ref/ 754 i2c1_pins_b: i2c1-1 { 755 pins { 756 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */ 757 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ 758 bias-disable; 759 drive-open-drain; 760 slew-rate = <0>; 761 }; 762 }; 763 764 /omit-if-no-ref/ 765 i2c1_sleep_pins_b: i2c1-sleep-1 { 766 pins { 767 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */ 768 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ 769 }; 770 }; 771 772 /omit-if-no-ref/ 773 i2c1_pins_c: i2c1-2 { 774 pins { 775 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ 776 <STM32_PINMUX('D', 13, AF5)>; /* I2C1_SDA */ 777 bias-disable; 778 drive-open-drain; 779 slew-rate = <0>; 780 }; 781 }; 782 783 /omit-if-no-ref/ 784 i2c1_sleep_pins_c: i2c1-sleep-2 { 785 pins { 786 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ 787 <STM32_PINMUX('D', 13, ANALOG)>; /* I2C1_SDA */ 788 }; 789 }; 790 791 /omit-if-no-ref/ 792 i2c2_pins_a: i2c2-0 { 793 pins { 794 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */ 795 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 796 bias-disable; 797 drive-open-drain; 798 slew-rate = <0>; 799 }; 800 }; 801 802 /omit-if-no-ref/ 803 i2c2_sleep_pins_a: i2c2-sleep-0 { 804 pins { 805 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */ 806 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 807 }; 808 }; 809 810 /omit-if-no-ref/ 811 i2c2_pins_b1: i2c2-1 { 812 pins { 813 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 814 bias-disable; 815 drive-open-drain; 816 slew-rate = <0>; 817 }; 818 }; 819 820 /omit-if-no-ref/ 821 i2c2_sleep_pins_b1: i2c2-sleep-1 { 822 pins { 823 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 824 }; 825 }; 826 827 /omit-if-no-ref/ 828 i2c2_pins_c: i2c2-2 { 829 pins { 830 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */ 831 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 832 bias-disable; 833 drive-open-drain; 834 slew-rate = <0>; 835 }; 836 }; 837 838 /omit-if-no-ref/ 839 i2c2_pins_sleep_c: i2c2-sleep-2 { 840 pins { 841 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */ 842 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 843 }; 844 }; 845 846 /omit-if-no-ref/ 847 i2c5_pins_a: i2c5-0 { 848 pins { 849 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */ 850 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */ 851 bias-disable; 852 drive-open-drain; 853 slew-rate = <0>; 854 }; 855 }; 856 857 /omit-if-no-ref/ 858 i2c5_sleep_pins_a: i2c5-sleep-0 { 859 pins { 860 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */ 861 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */ 862 863 }; 864 }; 865 866 /omit-if-no-ref/ 867 i2c5_pins_b: i2c5-1 { 868 pins { 869 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */ 870 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ 871 bias-disable; 872 drive-open-drain; 873 slew-rate = <0>; 874 }; 875 }; 876 877 /omit-if-no-ref/ 878 i2c5_sleep_pins_b: i2c5-sleep-1 { 879 pins { 880 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */ 881 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ 882 }; 883 }; 884 885 /omit-if-no-ref/ 886 i2s1_pins_a: i2s1-0 { 887 pins { 888 pinmux = <STM32_PINMUX('A', 6, AF5)>, /* I2S2_SDI */ 889 <STM32_PINMUX('A', 4, AF5)>, /* I2S2_WS */ 890 <STM32_PINMUX('A', 5, AF5)>; /* I2S2_CK */ 891 slew-rate = <0>; 892 drive-push-pull; 893 bias-disable; 894 }; 895 }; 896 897 /omit-if-no-ref/ 898 i2s1_sleep_pins_a: i2s1-sleep-0 { 899 pins { 900 pinmux = <STM32_PINMUX('A', 6, ANALOG)>, /* I2S2_SDI */ 901 <STM32_PINMUX('A', 4, ANALOG)>, /* I2S2_WS */ 902 <STM32_PINMUX('A', 5, ANALOG)>; /* I2S2_CK */ 903 }; 904 }; 905 906 /omit-if-no-ref/ 907 i2s2_pins_a: i2s2-0 { 908 pins { 909 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */ 910 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */ 911 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */ 912 slew-rate = <1>; 913 drive-push-pull; 914 bias-disable; 915 }; 916 }; 917 918 /omit-if-no-ref/ 919 i2s2_sleep_pins_a: i2s2-sleep-0 { 920 pins { 921 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */ 922 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */ 923 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */ 924 }; 925 }; 926 927 /omit-if-no-ref/ 928 i2s2_pins_b: i2s2-1 { 929 pins { 930 pinmux = <STM32_PINMUX('C', 3, AF5)>, /* I2S2_SDO */ 931 <STM32_PINMUX('B', 12, AF5)>, /* I2S2_WS */ 932 <STM32_PINMUX('B', 13, AF5)>; /* I2S2_CK */ 933 bias-disable; 934 drive-push-pull; 935 slew-rate = <1>; 936 }; 937 }; 938 939 /omit-if-no-ref/ 940 i2s2_sleep_pins_b: i2s2-sleep-1 { 941 pins { 942 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* I2S2_SDO */ 943 <STM32_PINMUX('B', 12, ANALOG)>, /* I2S2_WS */ 944 <STM32_PINMUX('B', 13, ANALOG)>; /* I2S2_CK */ 945 }; 946 }; 947 948 /omit-if-no-ref/ 949 ltdc_pins_a: ltdc-0 { 950 pins { 951 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */ 952 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ 953 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ 954 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */ 955 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */ 956 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */ 957 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */ 958 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */ 959 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */ 960 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */ 961 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */ 962 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */ 963 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */ 964 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */ 965 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ 966 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */ 967 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */ 968 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */ 969 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */ 970 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */ 971 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */ 972 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */ 973 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */ 974 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */ 975 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */ 976 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */ 977 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */ 978 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */ 979 bias-disable; 980 drive-push-pull; 981 slew-rate = <1>; 982 }; 983 }; 984 985 /omit-if-no-ref/ 986 ltdc_sleep_pins_a: ltdc-sleep-0 { 987 pins { 988 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ 989 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ 990 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */ 991 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */ 992 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */ 993 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */ 994 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */ 995 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */ 996 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */ 997 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */ 998 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */ 999 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */ 1000 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */ 1001 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */ 1002 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ 1003 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */ 1004 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */ 1005 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */ 1006 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */ 1007 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */ 1008 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */ 1009 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */ 1010 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */ 1011 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */ 1012 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */ 1013 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */ 1014 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */ 1015 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */ 1016 }; 1017 }; 1018 1019 /omit-if-no-ref/ 1020 ltdc_pins_b: ltdc-1 { 1021 pins { 1022 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */ 1023 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */ 1024 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */ 1025 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */ 1026 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */ 1027 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ 1028 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ 1029 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ 1030 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ 1031 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ 1032 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ 1033 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ 1034 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ 1035 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ 1036 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ 1037 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */ 1038 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */ 1039 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ 1040 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ 1041 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ 1042 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */ 1043 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */ 1044 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */ 1045 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */ 1046 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */ 1047 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ 1048 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ 1049 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */ 1050 bias-disable; 1051 drive-push-pull; 1052 slew-rate = <1>; 1053 }; 1054 }; 1055 1056 /omit-if-no-ref/ 1057 ltdc_sleep_pins_b: ltdc-sleep-1 { 1058 pins { 1059 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */ 1060 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */ 1061 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */ 1062 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */ 1063 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */ 1064 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */ 1065 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */ 1066 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */ 1067 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */ 1068 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */ 1069 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */ 1070 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */ 1071 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */ 1072 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */ 1073 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */ 1074 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */ 1075 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */ 1076 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */ 1077 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */ 1078 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */ 1079 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */ 1080 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */ 1081 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */ 1082 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */ 1083 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */ 1084 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */ 1085 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */ 1086 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */ 1087 }; 1088 }; 1089 1090 /omit-if-no-ref/ 1091 ltdc_pins_c: ltdc-2 { 1092 pins1 { 1093 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */ 1094 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */ 1095 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ 1096 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */ 1097 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */ 1098 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ 1099 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */ 1100 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ 1101 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */ 1102 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ 1103 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */ 1104 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 1105 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 1106 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 1107 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 1108 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */ 1109 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ 1110 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */ 1111 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */ 1112 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ 1113 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ 1114 bias-disable; 1115 drive-push-pull; 1116 slew-rate = <0>; 1117 }; 1118 pins2 { 1119 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */ 1120 bias-disable; 1121 drive-push-pull; 1122 slew-rate = <1>; 1123 }; 1124 }; 1125 1126 /omit-if-no-ref/ 1127 ltdc_sleep_pins_c: ltdc-sleep-2 { 1128 pins1 { 1129 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */ 1130 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */ 1131 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ 1132 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */ 1133 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */ 1134 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ 1135 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */ 1136 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ 1137 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */ 1138 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ 1139 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */ 1140 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ 1141 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ 1142 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ 1143 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ 1144 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */ 1145 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ 1146 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */ 1147 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */ 1148 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ 1149 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 1150 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */ 1151 }; 1152 }; 1153 1154 /omit-if-no-ref/ 1155 ltdc_pins_d: ltdc-3 { 1156 pins1 { 1157 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */ 1158 bias-disable; 1159 drive-push-pull; 1160 slew-rate = <3>; 1161 }; 1162 pins2 { 1163 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */ 1164 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ 1165 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */ 1166 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */ 1167 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */ 1168 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */ 1169 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */ 1170 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */ 1171 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */ 1172 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */ 1173 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */ 1174 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */ 1175 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */ 1176 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ 1177 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */ 1178 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */ 1179 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */ 1180 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */ 1181 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */ 1182 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */ 1183 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */ 1184 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */ 1185 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */ 1186 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */ 1187 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */ 1188 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */ 1189 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */ 1190 bias-disable; 1191 drive-push-pull; 1192 slew-rate = <2>; 1193 }; 1194 }; 1195 1196 /omit-if-no-ref/ 1197 ltdc_sleep_pins_d: ltdc-sleep-3 { 1198 pins { 1199 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */ 1200 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */ 1201 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */ 1202 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */ 1203 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */ 1204 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */ 1205 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */ 1206 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */ 1207 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */ 1208 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */ 1209 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */ 1210 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */ 1211 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */ 1212 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */ 1213 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ 1214 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */ 1215 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */ 1216 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */ 1217 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */ 1218 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */ 1219 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */ 1220 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */ 1221 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */ 1222 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */ 1223 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */ 1224 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */ 1225 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */ 1226 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */ 1227 }; 1228 }; 1229 1230 /omit-if-no-ref/ 1231 ltdc_pins_e: ltdc-4 { 1232 pins1 { 1233 pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */ 1234 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */ 1235 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 1236 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 1237 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 1238 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ 1239 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */ 1240 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ 1241 <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */ 1242 <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */ 1243 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 1244 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */ 1245 <STM32_PINMUX('H', 4, AF14)>, /* LTDC_G4 */ 1246 <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */ 1247 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ 1248 <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */ 1249 <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */ 1250 <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */ 1251 <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */ 1252 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ 1253 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ 1254 <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */ 1255 <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */ 1256 <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */ 1257 <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */ 1258 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ 1259 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ 1260 bias-disable; 1261 drive-push-pull; 1262 slew-rate = <0>; 1263 }; 1264 1265 pins2 { 1266 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */ 1267 bias-disable; 1268 drive-push-pull; 1269 slew-rate = <1>; 1270 }; 1271 }; 1272 1273 /omit-if-no-ref/ 1274 ltdc_sleep_pins_e: ltdc-sleep-4 { 1275 pins { 1276 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */ 1277 <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */ 1278 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ 1279 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ 1280 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ 1281 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ 1282 <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */ 1283 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ 1284 <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */ 1285 <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */ 1286 <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */ 1287 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ 1288 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ 1289 <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */ 1290 <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */ 1291 <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */ 1292 <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */ 1293 <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */ 1294 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ 1295 <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */ 1296 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G4 */ 1297 <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */ 1298 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ 1299 <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */ 1300 <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */ 1301 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ 1302 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 1303 <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */ 1304 }; 1305 }; 1306 1307 /omit-if-no-ref/ 1308 mco1_pins_a: mco1-0 { 1309 pins { 1310 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */ 1311 bias-disable; 1312 drive-push-pull; 1313 slew-rate = <1>; 1314 }; 1315 }; 1316 1317 /omit-if-no-ref/ 1318 mco1_sleep_pins_a: mco1-sleep-0 { 1319 pins { 1320 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */ 1321 }; 1322 }; 1323 1324 /omit-if-no-ref/ 1325 mco2_pins_a: mco2-0 { 1326 pins { 1327 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */ 1328 bias-disable; 1329 drive-push-pull; 1330 slew-rate = <2>; 1331 }; 1332 }; 1333 1334 /omit-if-no-ref/ 1335 mco2_sleep_pins_a: mco2-sleep-0 { 1336 pins { 1337 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */ 1338 }; 1339 }; 1340 1341 /omit-if-no-ref/ 1342 m_can1_pins_a: m-can1-0 { 1343 pins1 { 1344 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ 1345 slew-rate = <1>; 1346 drive-push-pull; 1347 bias-disable; 1348 }; 1349 pins2 { 1350 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */ 1351 bias-disable; 1352 }; 1353 }; 1354 1355 /omit-if-no-ref/ 1356 m_can1_sleep_pins_a: m_can1-sleep-0 { 1357 pins { 1358 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */ 1359 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */ 1360 }; 1361 }; 1362 1363 /omit-if-no-ref/ 1364 m_can1_pins_b: m-can1-1 { 1365 pins1 { 1366 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ 1367 slew-rate = <1>; 1368 drive-push-pull; 1369 bias-disable; 1370 }; 1371 pins2 { 1372 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ 1373 bias-disable; 1374 }; 1375 }; 1376 1377 /omit-if-no-ref/ 1378 m_can1_sleep_pins_b: m_can1-sleep-1 { 1379 pins { 1380 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */ 1381 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */ 1382 }; 1383 }; 1384 1385 /omit-if-no-ref/ 1386 m_can1_pins_c: m-can1-2 { 1387 pins1 { 1388 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ 1389 slew-rate = <1>; 1390 drive-push-pull; 1391 bias-disable; 1392 }; 1393 pins2 { 1394 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ 1395 bias-disable; 1396 }; 1397 }; 1398 1399 /omit-if-no-ref/ 1400 m_can1_sleep_pins_c: m_can1-sleep-2 { 1401 pins { 1402 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */ 1403 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */ 1404 }; 1405 }; 1406 1407 /omit-if-no-ref/ 1408 m_can1_pins_d: m-can1-3 { 1409 pins1 { 1410 pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ 1411 slew-rate = <1>; 1412 drive-push-pull; 1413 bias-disable; 1414 }; 1415 pins2 { 1416 pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ 1417 bias-disable; 1418 }; 1419 }; 1420 1421 /omit-if-no-ref/ 1422 m_can1_sleep_pins_d: m_can1-sleep-3 { 1423 pins { 1424 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* CAN1_TX */ 1425 <STM32_PINMUX('D', 0, ANALOG)>; /* CAN1_RX */ 1426 }; 1427 }; 1428 1429 /omit-if-no-ref/ 1430 m_can2_pins_a: m-can2-0 { 1431 pins1 { 1432 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ 1433 slew-rate = <1>; 1434 drive-push-pull; 1435 bias-disable; 1436 }; 1437 pins2 { 1438 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ 1439 bias-disable; 1440 }; 1441 }; 1442 1443 /omit-if-no-ref/ 1444 m_can2_sleep_pins_a: m_can2-sleep-0 { 1445 pins { 1446 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */ 1447 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */ 1448 }; 1449 }; 1450 1451 /omit-if-no-ref/ 1452 pwm1_pins_a: pwm1-0 { 1453 pins { 1454 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */ 1455 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */ 1456 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */ 1457 bias-pull-down; 1458 drive-push-pull; 1459 slew-rate = <0>; 1460 }; 1461 }; 1462 1463 /omit-if-no-ref/ 1464 pwm1_sleep_pins_a: pwm1-sleep-0 { 1465 pins { 1466 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */ 1467 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */ 1468 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */ 1469 }; 1470 }; 1471 1472 /omit-if-no-ref/ 1473 pwm1_pins_b: pwm1-1 { 1474 pins { 1475 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */ 1476 bias-pull-down; 1477 drive-push-pull; 1478 slew-rate = <0>; 1479 }; 1480 }; 1481 1482 /omit-if-no-ref/ 1483 pwm1_sleep_pins_b: pwm1-sleep-1 { 1484 pins { 1485 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */ 1486 }; 1487 }; 1488 1489 /omit-if-no-ref/ 1490 pwm1_pins_c: pwm1-2 { 1491 pins { 1492 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */ 1493 drive-push-pull; 1494 slew-rate = <0>; 1495 }; 1496 }; 1497 1498 /omit-if-no-ref/ 1499 pwm1_sleep_pins_c: pwm1-sleep-2 { 1500 pins { 1501 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */ 1502 }; 1503 }; 1504 1505 /omit-if-no-ref/ 1506 pwm1_pins_d: pwm1-3 { 1507 pins { 1508 pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */ 1509 bias-pull-down; 1510 drive-push-pull; 1511 slew-rate = <0>; 1512 }; 1513 }; 1514 1515 /omit-if-no-ref/ 1516 pwm1_sleep_pins_d: pwm1-sleep-3 { 1517 pins { 1518 pinmux = <STM32_PINMUX('A', 0, ANALOG)>; 1519 }; 1520 }; 1521 1522 /omit-if-no-ref/ 1523 pwm2_pins_a: pwm2-0 { 1524 pins { 1525 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ 1526 bias-pull-down; 1527 drive-push-pull; 1528 slew-rate = <0>; 1529 }; 1530 }; 1531 1532 /omit-if-no-ref/ 1533 pwm2_sleep_pins_a: pwm2-sleep-0 { 1534 pins { 1535 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */ 1536 }; 1537 }; 1538 1539 /omit-if-no-ref/ 1540 pwm3_pins_a: pwm3-0 { 1541 pins { 1542 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */ 1543 bias-pull-down; 1544 drive-push-pull; 1545 slew-rate = <0>; 1546 }; 1547 }; 1548 1549 /omit-if-no-ref/ 1550 pwm3_sleep_pins_a: pwm3-sleep-0 { 1551 pins { 1552 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */ 1553 }; 1554 }; 1555 1556 /omit-if-no-ref/ 1557 pwm3_pins_b: pwm3-1 { 1558 pins { 1559 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */ 1560 bias-disable; 1561 drive-push-pull; 1562 slew-rate = <0>; 1563 }; 1564 }; 1565 1566 /omit-if-no-ref/ 1567 pwm3_sleep_pins_b: pwm3-sleep-1 { 1568 pins { 1569 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */ 1570 }; 1571 }; 1572 1573 /omit-if-no-ref/ 1574 pwm4_pins_a: pwm4-0 { 1575 pins { 1576 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */ 1577 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */ 1578 bias-pull-down; 1579 drive-push-pull; 1580 slew-rate = <0>; 1581 }; 1582 }; 1583 1584 /omit-if-no-ref/ 1585 pwm4_sleep_pins_a: pwm4-sleep-0 { 1586 pins { 1587 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */ 1588 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */ 1589 }; 1590 }; 1591 1592 /omit-if-no-ref/ 1593 pwm4_pins_b: pwm4-1 { 1594 pins { 1595 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */ 1596 bias-pull-down; 1597 drive-push-pull; 1598 slew-rate = <0>; 1599 }; 1600 }; 1601 1602 /omit-if-no-ref/ 1603 pwm4_sleep_pins_b: pwm4-sleep-1 { 1604 pins { 1605 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */ 1606 }; 1607 }; 1608 1609 /omit-if-no-ref/ 1610 pwm5_pins_a: pwm5-0 { 1611 pins { 1612 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */ 1613 bias-pull-down; 1614 drive-push-pull; 1615 slew-rate = <0>; 1616 }; 1617 }; 1618 1619 /omit-if-no-ref/ 1620 pwm5_sleep_pins_a: pwm5-sleep-0 { 1621 pins { 1622 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */ 1623 }; 1624 }; 1625 1626 /omit-if-no-ref/ 1627 pwm5_pins_b: pwm5-1 { 1628 pins { 1629 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */ 1630 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */ 1631 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */ 1632 bias-disable; 1633 drive-push-pull; 1634 slew-rate = <0>; 1635 }; 1636 }; 1637 1638 /omit-if-no-ref/ 1639 pwm5_sleep_pins_b: pwm5-sleep-1 { 1640 pins { 1641 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */ 1642 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */ 1643 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */ 1644 }; 1645 }; 1646 1647 /omit-if-no-ref/ 1648 pwm8_pins_a: pwm8-0 { 1649 pins { 1650 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */ 1651 bias-pull-down; 1652 drive-push-pull; 1653 slew-rate = <0>; 1654 }; 1655 }; 1656 1657 /omit-if-no-ref/ 1658 pwm8_sleep_pins_a: pwm8-sleep-0 { 1659 pins { 1660 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */ 1661 }; 1662 }; 1663 1664 /omit-if-no-ref/ 1665 pwm8_pins_b: pwm8-1 { 1666 pins { 1667 pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */ 1668 <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */ 1669 <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */ 1670 <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */ 1671 drive-push-pull; 1672 slew-rate = <0>; 1673 }; 1674 }; 1675 1676 /omit-if-no-ref/ 1677 pwm8_sleep_pins_b: pwm8-sleep-1 { 1678 pins { 1679 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */ 1680 <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */ 1681 <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */ 1682 <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */ 1683 }; 1684 }; 1685 1686 /omit-if-no-ref/ 1687 pwm12_pins_a: pwm12-0 { 1688 pins { 1689 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */ 1690 bias-pull-down; 1691 drive-push-pull; 1692 slew-rate = <0>; 1693 }; 1694 }; 1695 1696 /omit-if-no-ref/ 1697 pwm12_sleep_pins_a: pwm12-sleep-0 { 1698 pins { 1699 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */ 1700 }; 1701 }; 1702 1703 /omit-if-no-ref/ 1704 qspi_clk_pins_a: qspi-clk-0 { 1705 pins { 1706 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */ 1707 bias-disable; 1708 drive-push-pull; 1709 slew-rate = <3>; 1710 }; 1711 }; 1712 1713 /omit-if-no-ref/ 1714 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { 1715 pins { 1716 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */ 1717 }; 1718 }; 1719 1720 /omit-if-no-ref/ 1721 qspi_bk1_pins_a: qspi-bk1-0 { 1722 pins { 1723 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ 1724 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */ 1725 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */ 1726 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */ 1727 bias-disable; 1728 drive-push-pull; 1729 slew-rate = <1>; 1730 }; 1731 }; 1732 1733 /omit-if-no-ref/ 1734 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { 1735 pins { 1736 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */ 1737 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */ 1738 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */ 1739 <STM32_PINMUX('F', 6, ANALOG)>; /* QSPI_BK1_IO3 */ 1740 }; 1741 }; 1742 1743 /omit-if-no-ref/ 1744 qspi_bk2_pins_a: qspi-bk2-0 { 1745 pins { 1746 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */ 1747 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */ 1748 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */ 1749 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */ 1750 bias-disable; 1751 drive-push-pull; 1752 slew-rate = <1>; 1753 }; 1754 }; 1755 1756 /omit-if-no-ref/ 1757 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 { 1758 pins { 1759 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */ 1760 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */ 1761 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */ 1762 <STM32_PINMUX('G', 7, ANALOG)>; /* QSPI_BK2_IO3 */ 1763 }; 1764 }; 1765 1766 /omit-if-no-ref/ 1767 qspi_cs1_pins_a: qspi-cs1-0 { 1768 pins { 1769 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */ 1770 bias-pull-up; 1771 drive-push-pull; 1772 slew-rate = <1>; 1773 }; 1774 }; 1775 1776 /omit-if-no-ref/ 1777 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { 1778 pins { 1779 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */ 1780 }; 1781 }; 1782 1783 /omit-if-no-ref/ 1784 qspi_cs2_pins_a: qspi-cs2-0 { 1785 pins { 1786 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */ 1787 bias-pull-up; 1788 drive-push-pull; 1789 slew-rate = <1>; 1790 }; 1791 }; 1792 1793 /omit-if-no-ref/ 1794 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 { 1795 pins { 1796 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */ 1797 }; 1798 }; 1799 1800 /omit-if-no-ref/ 1801 rtc_rsvd_pins_a: rtc-rsvd-0 { 1802 pins { 1803 pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */ 1804 }; 1805 }; 1806 1807 /omit-if-no-ref/ 1808 sai2a_pins_a: sai2a-0 { 1809 pins { 1810 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */ 1811 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ 1812 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ 1813 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */ 1814 slew-rate = <0>; 1815 drive-push-pull; 1816 bias-disable; 1817 }; 1818 }; 1819 1820 /omit-if-no-ref/ 1821 sai2a_sleep_pins_a: sai2a-sleep-0 { 1822 pins { 1823 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */ 1824 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ 1825 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ 1826 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */ 1827 }; 1828 }; 1829 1830 /omit-if-no-ref/ 1831 sai2a_pins_b: sai2a-1 { 1832 pins1 { 1833 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ 1834 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ 1835 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */ 1836 slew-rate = <0>; 1837 drive-push-pull; 1838 bias-disable; 1839 }; 1840 }; 1841 1842 /omit-if-no-ref/ 1843 sai2a_sleep_pins_b: sai2a-sleep-1 { 1844 pins { 1845 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ 1846 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ 1847 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */ 1848 }; 1849 }; 1850 1851 /omit-if-no-ref/ 1852 sai2a_pins_c: sai2a-2 { 1853 pins { 1854 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */ 1855 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */ 1856 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */ 1857 slew-rate = <0>; 1858 drive-push-pull; 1859 bias-disable; 1860 }; 1861 }; 1862 1863 /omit-if-no-ref/ 1864 sai2a_sleep_pins_c: sai2a-sleep-2 { 1865 pins { 1866 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */ 1867 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */ 1868 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */ 1869 }; 1870 }; 1871 1872 /omit-if-no-ref/ 1873 sai2b_pins_a: sai2b-0 { 1874 pins1 { 1875 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */ 1876 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */ 1877 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */ 1878 slew-rate = <0>; 1879 drive-push-pull; 1880 bias-disable; 1881 }; 1882 pins2 { 1883 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1884 bias-disable; 1885 }; 1886 }; 1887 1888 /omit-if-no-ref/ 1889 sai2b_sleep_pins_a: sai2b-sleep-0 { 1890 pins { 1891 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */ 1892 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */ 1893 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */ 1894 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */ 1895 }; 1896 }; 1897 1898 /omit-if-no-ref/ 1899 sai2b_pins_b: sai2b-1 { 1900 pins { 1901 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1902 bias-disable; 1903 }; 1904 }; 1905 1906 /omit-if-no-ref/ 1907 sai2b_sleep_pins_b: sai2b-sleep-1 { 1908 pins { 1909 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1910 }; 1911 }; 1912 1913 /omit-if-no-ref/ 1914 sai2b_pins_c: sai2b-2 { 1915 pins1 { 1916 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1917 bias-disable; 1918 }; 1919 }; 1920 1921 /omit-if-no-ref/ 1922 sai2b_sleep_pins_c: sai2b-sleep-2 { 1923 pins { 1924 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1925 }; 1926 }; 1927 1928 /omit-if-no-ref/ 1929 sai2b_pins_d: sai2b-3 { 1930 pins1 { 1931 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */ 1932 <STM32_PINMUX('C', 0, AF8)>, /* SAI2_FS_B */ 1933 <STM32_PINMUX('H', 3, AF10)>; /* SAI2_MCLK_B */ 1934 slew-rate = <0>; 1935 drive-push-pull; 1936 bias-disable; 1937 }; 1938 pins2 { 1939 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 1940 bias-disable; 1941 }; 1942 }; 1943 1944 /omit-if-no-ref/ 1945 sai2b_sleep_pins_d: sai2b-sleep-3 { 1946 pins1 { 1947 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */ 1948 <STM32_PINMUX('C', 0, ANALOG)>, /* SAI2_FS_B */ 1949 <STM32_PINMUX('H', 3, ANALOG)>, /* SAI2_MCLK_B */ 1950 <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 1951 }; 1952 }; 1953 1954 /omit-if-no-ref/ 1955 sai4a_pins_a: sai4a-0 { 1956 pins { 1957 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */ 1958 slew-rate = <0>; 1959 drive-push-pull; 1960 bias-disable; 1961 }; 1962 }; 1963 1964 /omit-if-no-ref/ 1965 sai4a_sleep_pins_a: sai4a-sleep-0 { 1966 pins { 1967 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */ 1968 }; 1969 }; 1970 1971 /omit-if-no-ref/ 1972 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 1973 pins1 { 1974 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 1975 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 1976 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 1977 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 1978 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 1979 slew-rate = <1>; 1980 drive-push-pull; 1981 bias-disable; 1982 }; 1983 pins2 { 1984 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 1985 slew-rate = <2>; 1986 drive-push-pull; 1987 bias-disable; 1988 }; 1989 }; 1990 1991 /omit-if-no-ref/ 1992 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 1993 pins1 { 1994 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 1995 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 1996 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 1997 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 1998 slew-rate = <1>; 1999 drive-push-pull; 2000 bias-disable; 2001 }; 2002 pins2 { 2003 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2004 slew-rate = <2>; 2005 drive-push-pull; 2006 bias-disable; 2007 }; 2008 pins3 { 2009 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2010 slew-rate = <1>; 2011 drive-open-drain; 2012 bias-disable; 2013 }; 2014 }; 2015 2016 /omit-if-no-ref/ 2017 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 { 2018 pins1 { 2019 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2020 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2021 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 2022 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 2023 slew-rate = <1>; 2024 drive-push-pull; 2025 bias-disable; 2026 }; 2027 }; 2028 2029 /omit-if-no-ref/ 2030 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { 2031 pins { 2032 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 2033 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 2034 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ 2035 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 2036 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 2037 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 2038 }; 2039 }; 2040 2041 /omit-if-no-ref/ 2042 sdmmc1_b4_pins_b: sdmmc1-b4-1 { 2043 pins1 { 2044 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2045 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2046 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */ 2047 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 2048 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2049 slew-rate = <1>; 2050 drive-push-pull; 2051 bias-disable; 2052 }; 2053 pins2 { 2054 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2055 slew-rate = <2>; 2056 drive-push-pull; 2057 bias-disable; 2058 }; 2059 }; 2060 2061 /omit-if-no-ref/ 2062 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 { 2063 pins1 { 2064 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 2065 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 2066 <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */ 2067 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 2068 slew-rate = <1>; 2069 drive-push-pull; 2070 bias-disable; 2071 }; 2072 pins2 { 2073 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 2074 slew-rate = <2>; 2075 drive-push-pull; 2076 bias-disable; 2077 }; 2078 pins3 { 2079 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 2080 slew-rate = <1>; 2081 drive-open-drain; 2082 bias-disable; 2083 }; 2084 }; 2085 2086 /omit-if-no-ref/ 2087 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 { 2088 pins { 2089 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 2090 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 2091 <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */ 2092 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 2093 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 2094 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 2095 }; 2096 }; 2097 2098 /omit-if-no-ref/ 2099 sdmmc1_dir_pins_a: sdmmc1-dir-0 { 2100 pins1 { 2101 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2102 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ 2103 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2104 slew-rate = <1>; 2105 drive-push-pull; 2106 bias-pull-up; 2107 }; 2108 pins2 { 2109 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ 2110 bias-pull-up; 2111 }; 2112 }; 2113 2114 /omit-if-no-ref/ 2115 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 { 2116 pins1 { 2117 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2118 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ 2119 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2120 slew-rate = <1>; 2121 drive-push-pull; 2122 bias-pull-up; 2123 }; 2124 }; 2125 2126 /omit-if-no-ref/ 2127 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { 2128 pins { 2129 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ 2130 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ 2131 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ 2132 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */ 2133 }; 2134 }; 2135 2136 /omit-if-no-ref/ 2137 sdmmc1_dir_pins_b: sdmmc1-dir-1 { 2138 pins1 { 2139 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ 2140 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */ 2141 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ 2142 slew-rate = <1>; 2143 drive-push-pull; 2144 bias-pull-up; 2145 }; 2146 pins2 { 2147 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */ 2148 bias-pull-up; 2149 }; 2150 }; 2151 2152 /omit-if-no-ref/ 2153 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 { 2154 pins { 2155 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ 2156 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */ 2157 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ 2158 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */ 2159 }; 2160 }; 2161 2162 /omit-if-no-ref/ 2163 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 2164 pins1 { 2165 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2166 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2167 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2168 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2169 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2170 slew-rate = <1>; 2171 drive-push-pull; 2172 bias-pull-up; 2173 }; 2174 pins2 { 2175 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2176 slew-rate = <2>; 2177 drive-push-pull; 2178 bias-pull-up; 2179 }; 2180 }; 2181 2182 /omit-if-no-ref/ 2183 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 2184 pins1 { 2185 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2186 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2187 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2188 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2189 slew-rate = <1>; 2190 drive-push-pull; 2191 bias-pull-up; 2192 }; 2193 pins2 { 2194 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2195 slew-rate = <2>; 2196 drive-push-pull; 2197 bias-pull-up; 2198 }; 2199 pins3 { 2200 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2201 slew-rate = <1>; 2202 drive-open-drain; 2203 bias-pull-up; 2204 }; 2205 }; 2206 2207 /omit-if-no-ref/ 2208 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { 2209 pins { 2210 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 2211 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ 2212 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 2213 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 2214 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 2215 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 2216 }; 2217 }; 2218 2219 /omit-if-no-ref/ 2220 sdmmc2_b4_pins_b: sdmmc2-b4-1 { 2221 pins1 { 2222 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2223 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2224 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2225 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2226 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2227 slew-rate = <1>; 2228 drive-push-pull; 2229 bias-disable; 2230 }; 2231 pins2 { 2232 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2233 slew-rate = <2>; 2234 drive-push-pull; 2235 bias-disable; 2236 }; 2237 }; 2238 2239 /omit-if-no-ref/ 2240 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { 2241 pins1 { 2242 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2243 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */ 2244 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2245 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2246 slew-rate = <1>; 2247 drive-push-pull; 2248 bias-disable; 2249 }; 2250 pins2 { 2251 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2252 slew-rate = <2>; 2253 drive-push-pull; 2254 bias-disable; 2255 }; 2256 pins3 { 2257 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2258 slew-rate = <1>; 2259 drive-open-drain; 2260 bias-disable; 2261 }; 2262 }; 2263 2264 /omit-if-no-ref/ 2265 sdmmc2_b4_pins_c: sdmmc2-b4-2 { 2266 pins1 { 2267 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2268 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 2269 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2270 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */ 2271 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2272 slew-rate = <1>; 2273 drive-push-pull; 2274 bias-pull-up; 2275 }; 2276 2277 pins2 { 2278 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2279 slew-rate = <2>; 2280 drive-push-pull; 2281 bias-pull-up; 2282 }; 2283 }; 2284 2285 /omit-if-no-ref/ 2286 sdmmc2_b4_od_pins_c: sdmmc2-b4-od-2 { 2287 pins1 { 2288 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 2289 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */ 2290 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */ 2291 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */ 2292 slew-rate = <1>; 2293 drive-push-pull; 2294 bias-pull-up; 2295 }; 2296 2297 pins2 { 2298 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */ 2299 slew-rate = <2>; 2300 drive-push-pull; 2301 bias-pull-up; 2302 }; 2303 2304 pins3 { 2305 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 2306 slew-rate = <1>; 2307 drive-open-drain; 2308 bias-pull-up; 2309 }; 2310 }; 2311 2312 /omit-if-no-ref/ 2313 sdmmc2_b4_sleep_pins_c: sdmmc2-b4-sleep-2 { 2314 pins { 2315 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 2316 <STM32_PINMUX('B', 7, ANALOG)>, /* SDMMC2_D1 */ 2317 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 2318 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 2319 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 2320 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 2321 }; 2322 }; 2323 2324 /omit-if-no-ref/ 2325 sdmmc2_d47_pins_a: sdmmc2-d47-0 { 2326 pins { 2327 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2328 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2329 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */ 2330 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */ 2331 slew-rate = <1>; 2332 drive-push-pull; 2333 bias-pull-up; 2334 }; 2335 }; 2336 2337 /omit-if-no-ref/ 2338 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { 2339 pins { 2340 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2341 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2342 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */ 2343 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 2344 }; 2345 }; 2346 2347 /omit-if-no-ref/ 2348 sdmmc2_d47_pins_b: sdmmc2-d47-1 { 2349 pins { 2350 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2351 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2352 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2353 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2354 slew-rate = <1>; 2355 drive-push-pull; 2356 bias-disable; 2357 }; 2358 }; 2359 2360 /omit-if-no-ref/ 2361 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 { 2362 pins { 2363 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2364 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2365 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2366 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2367 }; 2368 }; 2369 2370 /omit-if-no-ref/ 2371 sdmmc2_d47_pins_c: sdmmc2-d47-2 { 2372 pins { 2373 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2374 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */ 2375 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2376 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2377 slew-rate = <1>; 2378 drive-push-pull; 2379 bias-pull-up; 2380 }; 2381 }; 2382 2383 /omit-if-no-ref/ 2384 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 { 2385 pins { 2386 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2387 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */ 2388 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2389 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2390 }; 2391 }; 2392 2393 /omit-if-no-ref/ 2394 sdmmc2_d47_pins_d: sdmmc2-d47-3 { 2395 pins { 2396 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2397 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2398 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */ 2399 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 2400 slew-rate = <1>; 2401 drive-push-pull; 2402 bias-pull-up; 2403 }; 2404 }; 2405 2406 /omit-if-no-ref/ 2407 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 { 2408 pins { 2409 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2410 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2411 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */ 2412 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 2413 }; 2414 }; 2415 2416 /omit-if-no-ref/ 2417 sdmmc2_d47_pins_e: sdmmc2-d47-4 { 2418 pins { 2419 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 2420 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 2421 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 2422 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */ 2423 slew-rate = <1>; 2424 drive-push-pull; 2425 bias-pull-up; 2426 }; 2427 }; 2428 2429 /omit-if-no-ref/ 2430 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 { 2431 pins { 2432 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 2433 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 2434 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 2435 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 2436 }; 2437 }; 2438 2439 /omit-if-no-ref/ 2440 sdmmc3_b4_pins_a: sdmmc3-b4-0 { 2441 pins1 { 2442 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2443 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2444 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */ 2445 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2446 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */ 2447 slew-rate = <1>; 2448 drive-push-pull; 2449 bias-pull-up; 2450 }; 2451 pins2 { 2452 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2453 slew-rate = <2>; 2454 drive-push-pull; 2455 bias-pull-up; 2456 }; 2457 }; 2458 2459 /omit-if-no-ref/ 2460 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 { 2461 pins1 { 2462 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2463 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2464 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */ 2465 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2466 slew-rate = <1>; 2467 drive-push-pull; 2468 bias-pull-up; 2469 }; 2470 pins2 { 2471 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2472 slew-rate = <2>; 2473 drive-push-pull; 2474 bias-pull-up; 2475 }; 2476 pins3 { 2477 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */ 2478 slew-rate = <1>; 2479 drive-open-drain; 2480 bias-pull-up; 2481 }; 2482 }; 2483 2484 /omit-if-no-ref/ 2485 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 { 2486 pins { 2487 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */ 2488 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */ 2489 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */ 2490 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2491 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2492 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */ 2493 }; 2494 }; 2495 2496 /omit-if-no-ref/ 2497 sdmmc3_b4_pins_b: sdmmc3-b4-1 { 2498 pins1 { 2499 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2500 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2501 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2502 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2503 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2504 slew-rate = <1>; 2505 drive-push-pull; 2506 bias-pull-up; 2507 }; 2508 pins2 { 2509 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2510 slew-rate = <2>; 2511 drive-push-pull; 2512 bias-pull-up; 2513 }; 2514 }; 2515 2516 /omit-if-no-ref/ 2517 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { 2518 pins1 { 2519 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */ 2520 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */ 2521 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2522 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2523 slew-rate = <1>; 2524 drive-push-pull; 2525 bias-pull-up; 2526 }; 2527 pins2 { 2528 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2529 slew-rate = <2>; 2530 drive-push-pull; 2531 bias-pull-up; 2532 }; 2533 pins3 { 2534 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */ 2535 slew-rate = <1>; 2536 drive-open-drain; 2537 bias-pull-up; 2538 }; 2539 }; 2540 2541 /omit-if-no-ref/ 2542 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 { 2543 pins { 2544 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */ 2545 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */ 2546 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ 2547 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2548 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2549 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ 2550 }; 2551 }; 2552 2553 /omit-if-no-ref/ 2554 sdmmc3_b4_pins_c: sdmmc3-b4-2 { 2555 pins1 { 2556 pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 2557 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 2558 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2559 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */ 2560 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2561 slew-rate = <1>; 2562 drive-push-pull; 2563 bias-pull-up; 2564 }; 2565 2566 pins2 { 2567 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2568 slew-rate = <2>; 2569 drive-push-pull; 2570 bias-pull-up; 2571 }; 2572 }; 2573 2574 /omit-if-no-ref/ 2575 sdmmc3_b4_od_pins_c: sdmmc3-b4-od-2 { 2576 pins1 { 2577 pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */ 2578 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */ 2579 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */ 2580 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */ 2581 slew-rate = <1>; 2582 drive-push-pull; 2583 bias-pull-up; 2584 }; 2585 2586 pins2 { 2587 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */ 2588 slew-rate = <2>; 2589 drive-push-pull; 2590 bias-pull-up; 2591 }; 2592 2593 pins3 { 2594 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */ 2595 slew-rate = <1>; 2596 drive-open-drain; 2597 bias-pull-up; 2598 }; 2599 }; 2600 2601 /omit-if-no-ref/ 2602 sdmmc3_b4_sleep_pins_c: sdmmc3-b4-sleep-2 { 2603 pins { 2604 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* SDMMC3_D0 */ 2605 <STM32_PINMUX('D', 4, ANALOG)>, /* SDMMC3_D1 */ 2606 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */ 2607 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */ 2608 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */ 2609 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */ 2610 }; 2611 }; 2612 2613 /omit-if-no-ref/ 2614 spdifrx_pins_a: spdifrx-0 { 2615 pins { 2616 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */ 2617 bias-disable; 2618 }; 2619 }; 2620 2621 /omit-if-no-ref/ 2622 spdifrx_sleep_pins_a: spdifrx-sleep-0 { 2623 pins { 2624 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */ 2625 }; 2626 }; 2627 2628 /omit-if-no-ref/ 2629 spi1_pins_b: spi1-1 { 2630 pins1 { 2631 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */ 2632 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */ 2633 bias-disable; 2634 drive-push-pull; 2635 slew-rate = <1>; 2636 }; 2637 2638 pins2 { 2639 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */ 2640 bias-disable; 2641 }; 2642 }; 2643 2644 /omit-if-no-ref/ 2645 spi2_pins_a: spi2-0 { 2646 pins1 { 2647 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */ 2648 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2649 bias-disable; 2650 drive-push-pull; 2651 slew-rate = <1>; 2652 }; 2653 2654 pins2 { 2655 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2656 bias-disable; 2657 }; 2658 }; 2659 2660 /omit-if-no-ref/ 2661 spi2_pins_b: spi2-1 { 2662 pins1 { 2663 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ 2664 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2665 bias-disable; 2666 drive-push-pull; 2667 slew-rate = <1>; 2668 }; 2669 2670 pins2 { 2671 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2672 bias-disable; 2673 }; 2674 }; 2675 2676 /omit-if-no-ref/ 2677 spi2_pins_c: spi2-2 { 2678 pins1 { 2679 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */ 2680 <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ 2681 bias-disable; 2682 drive-push-pull; 2683 }; 2684 2685 pins2 { 2686 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ 2687 bias-pull-down; 2688 }; 2689 }; 2690 2691 /omit-if-no-ref/ 2692 spi4_pins_a: spi4-0 { 2693 pins { 2694 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ 2695 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */ 2696 bias-disable; 2697 drive-push-pull; 2698 slew-rate = <1>; 2699 }; 2700 pins2 { 2701 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ 2702 bias-disable; 2703 }; 2704 }; 2705 2706 /omit-if-no-ref/ 2707 spi5_pins_a: spi5-0 { 2708 pins1 { 2709 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */ 2710 <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */ 2711 bias-disable; 2712 drive-push-pull; 2713 slew-rate = <1>; 2714 }; 2715 2716 pins2 { 2717 pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */ 2718 bias-disable; 2719 }; 2720 }; 2721 2722 /omit-if-no-ref/ 2723 stusb1600_pins_a: stusb1600-0 { 2724 pins { 2725 pinmux = <STM32_PINMUX('I', 11, GPIO)>; 2726 bias-pull-up; 2727 }; 2728 }; 2729 2730 /omit-if-no-ref/ 2731 uart4_pins_a: uart4-0 { 2732 pins1 { 2733 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2734 bias-disable; 2735 drive-push-pull; 2736 slew-rate = <0>; 2737 }; 2738 pins2 { 2739 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2740 bias-disable; 2741 }; 2742 }; 2743 2744 /omit-if-no-ref/ 2745 uart4_idle_pins_a: uart4-idle-0 { 2746 pins1 { 2747 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ 2748 }; 2749 pins2 { 2750 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2751 bias-disable; 2752 }; 2753 }; 2754 2755 /omit-if-no-ref/ 2756 uart4_sleep_pins_a: uart4-sleep-0 { 2757 pins { 2758 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ 2759 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ 2760 }; 2761 }; 2762 2763 /omit-if-no-ref/ 2764 uart4_pins_b: uart4-1 { 2765 pins1 { 2766 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ 2767 bias-disable; 2768 drive-push-pull; 2769 slew-rate = <0>; 2770 }; 2771 pins2 { 2772 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2773 bias-disable; 2774 }; 2775 }; 2776 2777 /omit-if-no-ref/ 2778 uart4_pins_c: uart4-2 { 2779 pins1 { 2780 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2781 bias-disable; 2782 drive-push-pull; 2783 slew-rate = <0>; 2784 }; 2785 pins2 { 2786 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2787 bias-disable; 2788 }; 2789 }; 2790 2791 /omit-if-no-ref/ 2792 uart4_pins_d: uart4-3 { 2793 pins1 { 2794 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */ 2795 bias-disable; 2796 drive-push-pull; 2797 slew-rate = <0>; 2798 }; 2799 pins2 { 2800 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2801 bias-disable; 2802 }; 2803 }; 2804 2805 /omit-if-no-ref/ 2806 uart4_idle_pins_d: uart4-idle-3 { 2807 pins1 { 2808 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */ 2809 }; 2810 pins2 { 2811 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 2812 bias-disable; 2813 }; 2814 }; 2815 2816 /omit-if-no-ref/ 2817 uart4_sleep_pins_d: uart4-sleep-3 { 2818 pins { 2819 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */ 2820 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ 2821 }; 2822 }; 2823 2824 /omit-if-no-ref/ 2825 uart4_pins_e: uart4-4 { 2826 pins1 { 2827 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 2828 bias-disable; 2829 drive-push-pull; 2830 slew-rate = <0>; 2831 }; 2832 2833 pins2 { 2834 pinmux = <STM32_PINMUX('B', 8, AF8)>; /* UART4_RX */ 2835 bias-disable; 2836 }; 2837 }; 2838 2839 /omit-if-no-ref/ 2840 uart4_idle_pins_e: uart4-idle-4 { 2841 pins1 { 2842 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ 2843 }; 2844 2845 pins2 { 2846 pinmux = <STM32_PINMUX('B', 8, AF8)>; /* UART4_RX */ 2847 bias-disable; 2848 }; 2849 }; 2850 2851 /omit-if-no-ref/ 2852 uart4_sleep_pins_e: uart4-sleep-4 { 2853 pins { 2854 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ 2855 <STM32_PINMUX('B', 8, ANALOG)>; /* UART4_RX */ 2856 }; 2857 }; 2858 2859 /omit-if-no-ref/ 2860 uart5_pins_a: uart5-0 { 2861 pins1 { 2862 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */ 2863 bias-disable; 2864 drive-push-pull; 2865 slew-rate = <0>; 2866 }; 2867 pins2 { 2868 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */ 2869 bias-disable; 2870 }; 2871 }; 2872 2873 /omit-if-no-ref/ 2874 uart7_pins_a: uart7-0 { 2875 pins1 { 2876 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 2877 bias-disable; 2878 drive-push-pull; 2879 slew-rate = <0>; 2880 }; 2881 pins2 { 2882 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */ 2883 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */ 2884 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */ 2885 bias-disable; 2886 }; 2887 }; 2888 2889 /omit-if-no-ref/ 2890 uart7_pins_b: uart7-1 { 2891 pins1 { 2892 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */ 2893 bias-disable; 2894 drive-push-pull; 2895 slew-rate = <0>; 2896 }; 2897 pins2 { 2898 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */ 2899 bias-disable; 2900 }; 2901 }; 2902 2903 /omit-if-no-ref/ 2904 uart7_pins_c: uart7-2 { 2905 pins1 { 2906 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 2907 bias-disable; 2908 drive-push-pull; 2909 slew-rate = <0>; 2910 }; 2911 pins2 { 2912 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 2913 bias-pull-up; 2914 }; 2915 }; 2916 2917 /omit-if-no-ref/ 2918 uart7_idle_pins_c: uart7-idle-2 { 2919 pins1 { 2920 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */ 2921 }; 2922 pins2 { 2923 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 2924 bias-pull-up; 2925 }; 2926 }; 2927 2928 /omit-if-no-ref/ 2929 uart7_sleep_pins_c: uart7-sleep-2 { 2930 pins { 2931 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */ 2932 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */ 2933 }; 2934 }; 2935 2936 /omit-if-no-ref/ 2937 uart7_pins_d: uart7-3 { 2938 pins1 { 2939 pinmux = <STM32_PINMUX('F', 7, AF7)>, /* UART7_TX */ 2940 <STM32_PINMUX('F', 8, AF7)>; /* UART7_RTS */ 2941 bias-disable; 2942 drive-push-pull; 2943 slew-rate = <0>; 2944 }; 2945 2946 pins2 { 2947 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */ 2948 <STM32_PINMUX('F', 9, AF7)>; /* UART7_CTS */ 2949 bias-disable; 2950 }; 2951 }; 2952 2953 /omit-if-no-ref/ 2954 uart8_pins_a: uart8-0 { 2955 pins1 { 2956 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ 2957 bias-disable; 2958 drive-push-pull; 2959 slew-rate = <0>; 2960 }; 2961 pins2 { 2962 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */ 2963 bias-disable; 2964 }; 2965 }; 2966 2967 /omit-if-no-ref/ 2968 uart8_rtscts_pins_a: uart8rtscts-0 { 2969 pins { 2970 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */ 2971 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */ 2972 bias-disable; 2973 }; 2974 }; 2975 2976 /omit-if-no-ref/ 2977 usart1_pins_a: usart1-0 { 2978 pins1 { 2979 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */ 2980 bias-disable; 2981 drive-push-pull; 2982 slew-rate = <0>; 2983 }; 2984 pins2 { 2985 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ 2986 bias-disable; 2987 }; 2988 }; 2989 2990 /omit-if-no-ref/ 2991 usart1_idle_pins_a: usart1-idle-0 { 2992 pins1 { 2993 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ 2994 <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ 2995 }; 2996 }; 2997 2998 /omit-if-no-ref/ 2999 usart1_sleep_pins_a: usart1-sleep-0 { 3000 pins { 3001 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ 3002 <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */ 3003 }; 3004 }; 3005 3006 /omit-if-no-ref/ 3007 usart2_pins_a: usart2-0 { 3008 pins1 { 3009 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ 3010 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3011 bias-disable; 3012 drive-push-pull; 3013 slew-rate = <0>; 3014 }; 3015 pins2 { 3016 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ 3017 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ 3018 bias-disable; 3019 }; 3020 }; 3021 3022 /omit-if-no-ref/ 3023 usart2_sleep_pins_a: usart2-sleep-0 { 3024 pins { 3025 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ 3026 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 3027 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ 3028 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3029 }; 3030 }; 3031 3032 /omit-if-no-ref/ 3033 usart2_pins_b: usart2-1 { 3034 pins1 { 3035 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ 3036 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */ 3037 bias-disable; 3038 drive-push-pull; 3039 slew-rate = <0>; 3040 }; 3041 pins2 { 3042 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */ 3043 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */ 3044 bias-disable; 3045 }; 3046 }; 3047 3048 /omit-if-no-ref/ 3049 usart2_sleep_pins_b: usart2-sleep-1 { 3050 pins { 3051 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */ 3052 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */ 3053 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */ 3054 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */ 3055 }; 3056 }; 3057 3058 /omit-if-no-ref/ 3059 usart2_pins_c: usart2-2 { 3060 pins1 { 3061 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */ 3062 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3063 bias-disable; 3064 drive-push-pull; 3065 slew-rate = <0>; 3066 }; 3067 pins2 { 3068 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ 3069 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ 3070 bias-disable; 3071 }; 3072 }; 3073 3074 /omit-if-no-ref/ 3075 usart2_idle_pins_c: usart2-idle-2 { 3076 pins1 { 3077 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 3078 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3079 }; 3080 pins2 { 3081 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 3082 bias-disable; 3083 drive-push-pull; 3084 slew-rate = <0>; 3085 }; 3086 pins3 { 3087 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ 3088 bias-disable; 3089 }; 3090 }; 3091 3092 /omit-if-no-ref/ 3093 usart2_sleep_pins_c: usart2-sleep-2 { 3094 pins { 3095 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 3096 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 3097 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ 3098 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 3099 }; 3100 }; 3101 3102 /omit-if-no-ref/ 3103 usart3_pins_a: usart3-0 { 3104 pins1 { 3105 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ 3106 bias-disable; 3107 drive-push-pull; 3108 slew-rate = <0>; 3109 }; 3110 pins2 { 3111 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3112 bias-disable; 3113 }; 3114 }; 3115 3116 /omit-if-no-ref/ 3117 usart3_idle_pins_a: usart3-idle-0 { 3118 pins1 { 3119 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */ 3120 }; 3121 pins2 { 3122 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3123 bias-disable; 3124 }; 3125 }; 3126 3127 /omit-if-no-ref/ 3128 usart3_sleep_pins_a: usart3-sleep-0 { 3129 pins { 3130 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3131 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3132 }; 3133 }; 3134 3135 /omit-if-no-ref/ 3136 usart3_pins_b: usart3-1 { 3137 pins1 { 3138 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3139 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3140 bias-disable; 3141 drive-push-pull; 3142 slew-rate = <0>; 3143 }; 3144 pins2 { 3145 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3146 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */ 3147 bias-pull-up; 3148 }; 3149 }; 3150 3151 /omit-if-no-ref/ 3152 usart3_idle_pins_b: usart3-idle-1 { 3153 pins1 { 3154 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3155 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */ 3156 }; 3157 pins2 { 3158 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3159 bias-disable; 3160 drive-push-pull; 3161 slew-rate = <0>; 3162 }; 3163 pins3 { 3164 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3165 bias-pull-up; 3166 }; 3167 }; 3168 3169 /omit-if-no-ref/ 3170 usart3_sleep_pins_b: usart3-sleep-1 { 3171 pins { 3172 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3173 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3174 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */ 3175 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3176 }; 3177 }; 3178 3179 /omit-if-no-ref/ 3180 usart3_pins_c: usart3-2 { 3181 pins1 { 3182 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3183 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3184 bias-disable; 3185 drive-push-pull; 3186 slew-rate = <0>; 3187 }; 3188 pins2 { 3189 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3190 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */ 3191 bias-pull-up; 3192 }; 3193 }; 3194 3195 /omit-if-no-ref/ 3196 usart3_idle_pins_c: usart3-idle-2 { 3197 pins1 { 3198 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3199 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */ 3200 }; 3201 pins2 { 3202 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3203 bias-disable; 3204 drive-push-pull; 3205 slew-rate = <0>; 3206 }; 3207 pins3 { 3208 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 3209 bias-pull-up; 3210 }; 3211 }; 3212 3213 /omit-if-no-ref/ 3214 usart3_sleep_pins_c: usart3-sleep-2 { 3215 pins { 3216 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3217 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3218 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */ 3219 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 3220 }; 3221 }; 3222 3223 /omit-if-no-ref/ 3224 usart3_pins_d: usart3-3 { 3225 pins1 { 3226 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3227 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3228 bias-disable; 3229 drive-push-pull; 3230 slew-rate = <0>; 3231 }; 3232 pins2 { 3233 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */ 3234 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3235 bias-disable; 3236 }; 3237 }; 3238 3239 /omit-if-no-ref/ 3240 usart3_idle_pins_d: usart3-idle-3 { 3241 pins1 { 3242 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3243 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3244 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */ 3245 }; 3246 pins2 { 3247 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */ 3248 bias-disable; 3249 }; 3250 }; 3251 3252 /omit-if-no-ref/ 3253 usart3_sleep_pins_d: usart3-sleep-3 { 3254 pins { 3255 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3256 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3257 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ 3258 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */ 3259 }; 3260 }; 3261 3262 /omit-if-no-ref/ 3263 usart3_pins_e: usart3-4 { 3264 pins1 { 3265 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3266 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3267 bias-disable; 3268 drive-push-pull; 3269 slew-rate = <0>; 3270 }; 3271 pins2 { 3272 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */ 3273 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3274 bias-pull-up; 3275 }; 3276 }; 3277 3278 /omit-if-no-ref/ 3279 usart3_idle_pins_e: usart3-idle-4 { 3280 pins1 { 3281 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3282 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */ 3283 }; 3284 pins2 { 3285 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 3286 bias-disable; 3287 drive-push-pull; 3288 slew-rate = <0>; 3289 }; 3290 pins3 { 3291 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */ 3292 bias-pull-up; 3293 }; 3294 }; 3295 3296 /omit-if-no-ref/ 3297 usart3_sleep_pins_e: usart3-sleep-4 { 3298 pins { 3299 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 3300 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 3301 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ 3302 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */ 3303 }; 3304 }; 3305 3306 /omit-if-no-ref/ 3307 usart3_pins_f: usart3-5 { 3308 pins1 { 3309 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 3310 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ 3311 bias-disable; 3312 drive-push-pull; 3313 slew-rate = <0>; 3314 }; 3315 pins2 { 3316 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 3317 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 3318 bias-disable; 3319 }; 3320 }; 3321 3322 /omit-if-no-ref/ 3323 usbotg_hs_pins_a: usbotg-hs-0 { 3324 pins { 3325 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ 3326 }; 3327 }; 3328 3329 /omit-if-no-ref/ 3330 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 { 3331 pins { 3332 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */ 3333 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */ 3334 }; 3335 }; 3336}; 3337 3338&pinctrl_z { 3339 /omit-if-no-ref/ 3340 i2c2_pins_b2: i2c2-0 { 3341 pins { 3342 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */ 3343 bias-disable; 3344 drive-open-drain; 3345 slew-rate = <0>; 3346 }; 3347 }; 3348 3349 /omit-if-no-ref/ 3350 i2c2_sleep_pins_b2: i2c2-sleep-0 { 3351 pins { 3352 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */ 3353 }; 3354 }; 3355 3356 /omit-if-no-ref/ 3357 i2c4_pins_a: i2c4-0 { 3358 pins { 3359 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */ 3360 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */ 3361 bias-disable; 3362 drive-open-drain; 3363 slew-rate = <0>; 3364 }; 3365 }; 3366 3367 /omit-if-no-ref/ 3368 i2c4_sleep_pins_a: i2c4-sleep-0 { 3369 pins { 3370 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */ 3371 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */ 3372 }; 3373 }; 3374 3375 /omit-if-no-ref/ 3376 i2c6_pins_a: i2c6-0 { 3377 pins { 3378 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */ 3379 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */ 3380 bias-disable; 3381 drive-open-drain; 3382 slew-rate = <0>; 3383 }; 3384 }; 3385 3386 /omit-if-no-ref/ 3387 i2c6_sleep_pins_a: i2c6-sleep-0 { 3388 pins { 3389 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */ 3390 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */ 3391 }; 3392 }; 3393 3394 /omit-if-no-ref/ 3395 i2c6_pins_b: i2c6-1 { 3396 pins { 3397 pinmux = <STM32_PINMUX('A', 11, AF2)>, /* I2C6_SCL */ 3398 <STM32_PINMUX('A', 12, AF2)>; /* I2C6_SDA */ 3399 bias-disable; 3400 drive-open-drain; 3401 slew-rate = <0>; 3402 }; 3403 }; 3404 3405 /omit-if-no-ref/ 3406 i2c6_sleep_pins_b: i2c6-sleep-1 { 3407 pins { 3408 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C6_SCL */ 3409 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C6_SDA */ 3410 }; 3411 }; 3412 3413 /omit-if-no-ref/ 3414 spi1_pins_a: spi1-0 { 3415 pins1 { 3416 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */ 3417 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */ 3418 bias-disable; 3419 drive-push-pull; 3420 slew-rate = <1>; 3421 }; 3422 3423 pins2 { 3424 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */ 3425 bias-disable; 3426 }; 3427 }; 3428 3429 /omit-if-no-ref/ 3430 spi1_sleep_pins_a: spi1-sleep-0 { 3431 pins { 3432 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */ 3433 <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI1_MISO */ 3434 <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI1_MOSI */ 3435 }; 3436 }; 3437 3438 /omit-if-no-ref/ 3439 usart1_pins_b: usart1-1 { 3440 pins1 { 3441 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */ 3442 bias-disable; 3443 drive-push-pull; 3444 slew-rate = <0>; 3445 }; 3446 pins2 { 3447 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ 3448 bias-disable; 3449 }; 3450 }; 3451 3452 /omit-if-no-ref/ 3453 usart1_idle_pins_b: usart1-idle-1 { 3454 pins1 { 3455 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */ 3456 }; 3457 pins2 { 3458 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ 3459 bias-disable; 3460 }; 3461 }; 3462 3463 /omit-if-no-ref/ 3464 usart1_sleep_pins_b: usart1-sleep-1 { 3465 pins { 3466 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */ 3467 <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */ 3468 }; 3469 }; 3470}; 3471