xref: /linux/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
4 *
5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6 */
7
8#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9#include <dt-bindings/input/linux-event-codes.h>
10#include "sc7280.dtsi"
11#include "pm7325.dtsi"
12#include "pm8350c.dtsi"
13#include "pmk8350.dtsi"
14
15#include "sc7280-chrome-common.dtsi"
16#include "sc7280-herobrine-lte-sku.dtsi"
17
18/ {
19	aliases {
20		bluetooth0 = &bluetooth;
21		serial1 = &uart7;
22		wifi0 = &wifi;
23	};
24
25	max98360a: audio-codec-0 {
26		compatible = "maxim,max98360a";
27		pinctrl-names = "default";
28		pinctrl-0 = <&amp_en>;
29		sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30		#sound-dai-cells = <0>;
31	};
32
33	wcd9385: audio-codec-1 {
34		compatible = "qcom,wcd9385-codec";
35		pinctrl-names = "default", "sleep";
36		pinctrl-0 = <&wcd_reset_n>;
37		pinctrl-1 = <&wcd_reset_n_sleep>;
38
39		reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
40
41		qcom,rx-device = <&wcd_rx>;
42		qcom,tx-device = <&wcd_tx>;
43
44		vdd-rxtx-supply = <&vreg_l18b_1p8>;
45		vdd-io-supply = <&vreg_l18b_1p8>;
46		vdd-buck-supply = <&vreg_l17b_1p8>;
47		vdd-mic-bias-supply = <&vreg_bob>;
48
49		qcom,micbias1-microvolt = <1800000>;
50		qcom,micbias2-microvolt = <1800000>;
51		qcom,micbias3-microvolt = <1800000>;
52		qcom,micbias4-microvolt = <1800000>;
53
54		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
55							  500000 500000 500000>;
56		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
57		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
58		#sound-dai-cells = <1>;
59	};
60
61	gpio-keys {
62		compatible = "gpio-keys";
63		label = "gpio-keys";
64
65		pinctrl-names = "default";
66		pinctrl-0 = <&key_vol_up_default>;
67
68		key-volume-up {
69			label = "volume_up";
70			gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
71			linux,input-type = <1>;
72			linux,code = <KEY_VOLUMEUP>;
73			wakeup-source;
74			debounce-interval = <15>;
75			linux,can-disable;
76		};
77	};
78
79	nvme_3v3_regulator: nvme-3v3-regulator {
80		compatible = "regulator-fixed";
81		regulator-name = "VLDO_3V3";
82
83		regulator-min-microvolt = <3300000>;
84		regulator-max-microvolt = <3300000>;
85
86		enable-active-high;
87		pinctrl-names = "default";
88		pinctrl-0 = <&nvme_pwren>;
89	};
90
91	sound: sound {
92		compatible = "google,sc7280-herobrine";
93		model = "sc7280-wcd938x-max98360a-1mic";
94
95		audio-routing =
96			"IN1_HPHL", "HPHL_OUT",
97			"IN2_HPHR", "HPHR_OUT",
98			"AMIC1", "MIC BIAS1",
99			"AMIC2", "MIC BIAS2",
100			"VA DMIC0", "MIC BIAS3",
101			"VA DMIC1", "MIC BIAS3",
102			"VA DMIC2", "MIC BIAS1",
103			"VA DMIC3", "MIC BIAS1",
104			"TX SWR_ADC0", "ADC1_OUTPUT",
105			"TX SWR_ADC1", "ADC2_OUTPUT",
106			"TX SWR_ADC2", "ADC3_OUTPUT",
107			"TX SWR_DMIC0", "DMIC1_OUTPUT",
108			"TX SWR_DMIC1", "DMIC2_OUTPUT",
109			"TX SWR_DMIC2", "DMIC3_OUTPUT",
110			"TX SWR_DMIC3", "DMIC4_OUTPUT",
111			"TX SWR_DMIC4", "DMIC5_OUTPUT",
112			"TX SWR_DMIC5", "DMIC6_OUTPUT",
113			"TX SWR_DMIC6", "DMIC7_OUTPUT",
114			"TX SWR_DMIC7", "DMIC8_OUTPUT";
115
116		#address-cells = <1>;
117		#size-cells = <0>;
118
119		dai-link@0 {
120			link-name = "MAX98360A";
121			reg = <0>;
122
123			cpu {
124				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
125			};
126
127			codec {
128				sound-dai = <&max98360a>;
129			};
130		};
131
132		dai-link@1 {
133			link-name = "DisplayPort";
134			reg = <1>;
135
136			cpu {
137				sound-dai = <&lpass_cpu LPASS_DP_RX>;
138			};
139
140			codec {
141				sound-dai = <&mdss_dp>;
142			};
143		};
144
145		dai-link@2 {
146			link-name = "WCD9385 Playback";
147			reg = <2>;
148
149			cpu {
150				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
151			};
152
153			codec {
154				sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
155			};
156		};
157
158		dai-link@3 {
159			link-name = "WCD9385 Capture";
160			reg = <3>;
161
162			cpu {
163				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
164			};
165
166			codec {
167				sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
168			};
169		};
170
171		dai-link@4 {
172			link-name = "DMIC";
173			reg = <4>;
174
175			cpu {
176				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
177			};
178
179			codec {
180				sound-dai = <&lpass_va_macro 0>;
181			};
182		};
183	};
184};
185
186&apps_rsc {
187	regulators-0 {
188		compatible = "qcom,pm7325-rpmh-regulators";
189		qcom,pmic-id = "b";
190
191		vreg_s1b_1p8: smps1 {
192			regulator-min-microvolt = <1856000>;
193			regulator-max-microvolt = <2040000>;
194		};
195
196		vreg_s7b_0p9: smps7 {
197			regulator-min-microvolt = <535000>;
198			regulator-max-microvolt = <1120000>;
199		};
200
201		vreg_s8b_1p2: smps8 {
202			regulator-min-microvolt = <1256000>;
203			regulator-max-microvolt = <1500000>;
204		};
205
206		vreg_l1b_0p8: ldo1 {
207			regulator-min-microvolt = <825000>;
208			regulator-max-microvolt = <925000>;
209		};
210
211		vreg_l2b_3p0: ldo2 {
212			regulator-min-microvolt = <2700000>;
213			regulator-max-microvolt = <3544000>;
214		};
215
216		vreg_l6b_1p2: ldo6 {
217			regulator-min-microvolt = <1140000>;
218			regulator-max-microvolt = <1260000>;
219		};
220
221		vreg_l7b_2p9: ldo7 {
222			regulator-min-microvolt = <2960000>;
223			regulator-max-microvolt = <2960000>;
224		};
225
226		vreg_l8b_0p9: ldo8 {
227			regulator-min-microvolt = <870000>;
228			regulator-max-microvolt = <970000>;
229		};
230
231		vreg_l9b_1p2: ldo9 {
232			regulator-min-microvolt = <1080000>;
233			regulator-max-microvolt = <1304000>;
234		};
235
236		vreg_l11b_1p7: ldo11 {
237			regulator-min-microvolt = <1504000>;
238			regulator-max-microvolt = <2000000>;
239		};
240
241		vreg_l12b_0p8: ldo12 {
242			regulator-min-microvolt = <751000>;
243			regulator-max-microvolt = <824000>;
244		};
245
246		vreg_l13b_0p8: ldo13 {
247			regulator-min-microvolt = <530000>;
248			regulator-max-microvolt = <824000>;
249		};
250
251		vreg_l14b_1p2: ldo14 {
252			regulator-min-microvolt = <1080000>;
253			regulator-max-microvolt = <1304000>;
254		};
255
256		vreg_l15b_0p8: ldo15 {
257			regulator-min-microvolt = <765000>;
258			regulator-max-microvolt = <1020000>;
259		};
260
261		vreg_l16b_1p2: ldo16 {
262			regulator-min-microvolt = <1100000>;
263			regulator-max-microvolt = <1300000>;
264		};
265
266		vreg_l17b_1p8: ldo17 {
267			regulator-min-microvolt = <1700000>;
268			regulator-max-microvolt = <1900000>;
269		};
270
271		vreg_l18b_1p8: ldo18 {
272			regulator-min-microvolt = <1800000>;
273			regulator-max-microvolt = <2000000>;
274		};
275
276		vreg_l19b_1p8: ldo19 {
277			regulator-min-microvolt = <1800000>;
278			regulator-max-microvolt = <1800000>;
279		};
280	};
281
282	regulators-1 {
283		compatible = "qcom,pm8350c-rpmh-regulators";
284		qcom,pmic-id = "c";
285
286		vreg_s1c_2p2: smps1 {
287			regulator-min-microvolt = <2190000>;
288			regulator-max-microvolt = <2210000>;
289		};
290
291		vreg_s9c_1p0: smps9 {
292			regulator-min-microvolt = <1010000>;
293			regulator-max-microvolt = <1170000>;
294		};
295
296		vreg_l1c_1p8: ldo1 {
297			regulator-min-microvolt = <1800000>;
298			regulator-max-microvolt = <1980000>;
299		};
300
301		vreg_l2c_1p8: ldo2 {
302			regulator-min-microvolt = <1620000>;
303			regulator-max-microvolt = <1980000>;
304		};
305
306		vreg_l3c_3p0: ldo3 {
307			regulator-min-microvolt = <2800000>;
308			regulator-max-microvolt = <3540000>;
309		};
310
311		vreg_l4c_1p8: ldo4 {
312			regulator-min-microvolt = <1620000>;
313			regulator-max-microvolt = <3300000>;
314		};
315
316		vreg_l5c_1p8: ldo5 {
317			regulator-min-microvolt = <1620000>;
318			regulator-max-microvolt = <3300000>;
319		};
320
321		vreg_l6c_2p9: ldo6 {
322			regulator-min-microvolt = <1800000>;
323			regulator-max-microvolt = <2950000>;
324		};
325
326		vreg_l7c_3p0: ldo7 {
327			regulator-min-microvolt = <3000000>;
328			regulator-max-microvolt = <3544000>;
329		};
330
331		vreg_l8c_1p8: ldo8 {
332			regulator-min-microvolt = <1620000>;
333			regulator-max-microvolt = <2000000>;
334		};
335
336		vreg_l9c_2p9: ldo9 {
337			regulator-min-microvolt = <2960000>;
338			regulator-max-microvolt = <2960000>;
339		};
340
341		vreg_l10c_0p8: ldo10 {
342			regulator-min-microvolt = <720000>;
343			regulator-max-microvolt = <1050000>;
344		};
345
346		vreg_l11c_2p8: ldo11 {
347			regulator-min-microvolt = <2800000>;
348			regulator-max-microvolt = <3544000>;
349		};
350
351		vreg_l12c_1p8: ldo12 {
352			regulator-min-microvolt = <1650000>;
353			regulator-max-microvolt = <2000000>;
354		};
355
356		vreg_l13c_3p0: ldo13 {
357			regulator-min-microvolt = <2700000>;
358			regulator-max-microvolt = <3544000>;
359		};
360
361		vreg_bob: bob {
362			regulator-min-microvolt = <3008000>;
363			regulator-max-microvolt = <3960000>;
364		};
365	};
366};
367
368&gpi_dma0 {
369	status = "okay";
370};
371
372&gpi_dma1 {
373	status = "okay";
374};
375
376&lpass_cpu {
377	status = "okay";
378
379	pinctrl-names = "default";
380	pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
381
382	dai-link@1 {
383		reg = <MI2S_SECONDARY>;
384		qcom,playback-sd-lines = <0>;
385	};
386
387	dai-link@5 {
388		reg = <LPASS_DP_RX>;
389	};
390
391	dai-link@6 {
392		reg = <LPASS_CDC_DMA_RX0>;
393	};
394
395	dai-link@19 {
396		reg = <LPASS_CDC_DMA_TX3>;
397	};
398
399	dai-link@25 {
400		reg = <LPASS_CDC_DMA_VA_TX0>;
401	};
402};
403
404&lpass_rx_macro {
405	status = "okay";
406};
407
408&lpass_tx_macro {
409	status = "okay";
410};
411
412&lpass_va_macro {
413	status = "okay";
414	vdd-micb-supply = <&vreg_bob>;
415	pinctrl-0 = <&lpass_dmic01_clk>, <&lpass_dmic01_data>;
416	pinctrl-names = "default";
417};
418
419&pcie1 {
420	status = "okay";
421	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
422
423	vddpe-3v3-supply = <&nvme_3v3_regulator>;
424
425	pinctrl-names = "default";
426	pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
427};
428
429&pcie1_phy {
430	status = "okay";
431
432	vdda-phy-supply = <&vreg_l10c_0p8>;
433	vdda-pll-supply = <&vreg_l6b_1p2>;
434};
435
436&pmk8350_vadc {
437	channel@3 {
438		reg = <PMK8350_ADC7_DIE_TEMP>;
439		label = "pmk8350_die_temp";
440		qcom,pre-scaling = <1 1>;
441	};
442};
443
444&qfprom {
445	vcc-supply = <&vreg_l1c_1p8>;
446};
447
448&qupv3_id_0 {
449	status = "okay";
450};
451
452&qupv3_id_1 {
453	status = "okay";
454};
455
456&sdhc_1 {
457	status = "okay";
458
459	non-removable;
460	no-sd;
461	no-sdio;
462
463	vmmc-supply = <&vreg_l7b_2p9>;
464	vqmmc-supply = <&vreg_l19b_1p8>;
465};
466
467&sdhc_2 {
468	status = "okay";
469
470	pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
471	pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
472
473	vmmc-supply = <&vreg_l9c_2p9>;
474	vqmmc-supply = <&vreg_l6c_2p9>;
475
476	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
477};
478
479&swr0 {
480	status = "okay";
481
482	wcd_rx: codec@0,4 {
483		compatible = "sdw20217010d00";
484		reg = <0 4>;
485		qcom,rx-port-mapping = <1 2 3 4 5>;
486	};
487};
488
489&swr1 {
490	status = "okay";
491
492	wcd_tx: codec@0,3 {
493		compatible = "sdw20217010d00";
494		reg = <0 3>;
495		qcom,tx-port-mapping = <1 2 3 4>;
496	};
497};
498
499&uart5 {
500	status = "okay";
501};
502
503&ufs_mem_hc {
504	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
505	vcc-supply = <&vreg_l7b_2p9>;
506	vcc-max-microamp = <800000>;
507	vccq-supply = <&vreg_l9b_1p2>;
508	vccq-max-microamp = <900000>;
509	vccq2-supply = <&vreg_l9b_1p2>;
510	vccq2-max-microamp = <900000>;
511
512	status = "okay";
513};
514
515&ufs_mem_phy {
516	vdda-phy-supply = <&vreg_l10c_0p8>;
517	vdda-pll-supply = <&vreg_l6b_1p2>;
518
519	status = "okay";
520};
521
522&usb_1 {
523	status = "okay";
524};
525
526&usb_1_dwc3 {
527	dr_mode = "host";
528};
529
530&usb_1_hsphy {
531	status = "okay";
532
533	vdda-pll-supply = <&vreg_l10c_0p8>;
534	vdda33-supply = <&vreg_l2b_3p0>;
535	vdda18-supply = <&vreg_l1c_1p8>;
536	qcom,hs-rise-fall-time-bp = <0>;
537	qcom,squelch-detector-bp = <(-2090)>;
538	qcom,hs-disconnect-bp = <1743>;
539	qcom,hs-amplitude-bp = <1780>;
540	qcom,hs-crossover-voltage-microvolt = <(-31000)>;
541	qcom,hs-output-impedance-micro-ohms = <2600000>;
542};
543
544&usb_1_qmpphy {
545	status = "okay";
546
547	vdda-phy-supply = <&vreg_l6b_1p2>;
548	vdda-pll-supply = <&vreg_l1b_0p8>;
549};
550
551&uart7 {
552	status = "okay";
553
554	/delete-property/interrupts;
555	interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
556				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
557	pinctrl-names = "default", "sleep";
558	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
559
560	bluetooth: bluetooth {
561		compatible = "qcom,wcn6750-bt";
562		pinctrl-names = "default";
563		pinctrl-0 = <&bt_en>, <&sw_ctrl>;
564		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
565		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
566		vddaon-supply = <&vreg_s7b_0p9>;
567		vddbtcxmx-supply = <&vreg_s7b_0p9>;
568		vddrfacmn-supply = <&vreg_s7b_0p9>;
569		vddrfa0p8-supply = <&vreg_s7b_0p9>;
570		vddrfa1p7-supply = <&vreg_s1b_1p8>;
571		vddrfa1p2-supply = <&vreg_s8b_1p2>;
572		vddrfa2p2-supply = <&vreg_s1c_2p2>;
573		vddasd-supply = <&vreg_l11c_2p8>;
574		max-speed = <3200000>;
575	};
576};
577
578/* PINCTRL - additions to nodes defined in sc7280.dtsi */
579
580&dp_hot_plug_det {
581	bias-disable;
582};
583
584&lpass_dmic01_clk {
585	drive-strength = <8>;
586	bias-disable;
587};
588
589&lpass_dmic01_data {
590	bias-pull-down;
591};
592
593&lpass_dmic23_clk {
594	drive-strength = <8>;
595	bias-disable;
596};
597
598&lpass_dmic23_data {
599	bias-pull-down;
600};
601
602&lpass_rx_swr_clk {
603	drive-strength = <2>;
604	slew-rate = <1>;
605	bias-disable;
606};
607
608&lpass_rx_swr_data {
609	drive-strength = <2>;
610	slew-rate = <1>;
611	bias-bus-hold;
612};
613
614&lpass_tx_swr_clk {
615	drive-strength = <2>;
616	slew-rate = <1>;
617	bias-disable;
618};
619
620&lpass_tx_swr_data {
621	drive-strength = <2>;
622	slew-rate = <1>;
623	bias-bus-hold;
624};
625
626&mi2s1_data0 {
627	drive-strength = <6>;
628	bias-disable;
629};
630
631&mi2s1_sclk {
632	drive-strength = <6>;
633	bias-disable;
634};
635
636&mi2s1_ws {
637	drive-strength = <6>;
638};
639
640&pm7325_gpios {
641	key_vol_up_default: key-vol-up-state {
642		pins = "gpio6";
643		function = "normal";
644		input-enable;
645		bias-pull-up;
646		power-source = <0>;
647		qcom,drive-strength = <3>;
648	};
649};
650
651&pcie1_clkreq_n {
652	bias-pull-up;
653	drive-strength = <2>;
654};
655
656&qspi_cs0 {
657	bias-disable;		/* External pullup */
658};
659
660&qspi_clk {
661	bias-pull-down;		/* No external pulls or external pulldown */
662};
663
664&qspi_data0 {
665	bias-pull-down;		/* No external pulls or external pulldown */
666};
667
668&qspi_data1 {
669	bias-pull-down;		/* No external pulls or external pulldown */
670};
671
672&qup_uart5_tx {
673	drive-strength = <2>;
674	bias-disable;
675};
676
677&qup_uart5_rx {
678	drive-strength = <2>;
679	bias-pull-up;
680};
681
682&qup_uart7_cts {
683	/*
684	 * Configure a bias-bus-hold on CTS to lower power
685	 * usage when Bluetooth is turned off. Bus hold will
686	 * maintain a low power state regardless of whether
687	 * the Bluetooth module drives the pin in either
688	 * direction or leaves the pin fully unpowered.
689	 */
690	bias-bus-hold;
691};
692
693&qup_uart7_rts {
694	/* We'll drive RTS, so no pull */
695	drive-strength = <2>;
696	bias-disable;
697};
698
699&qup_uart7_tx {
700	/* We'll drive TX, so no pull */
701	drive-strength = <2>;
702	bias-disable;
703};
704
705&qup_uart7_rx {
706	/*
707	 * Configure a pull-up on RX. This is needed to avoid
708	 * garbage data when the TX pin of the Bluetooth module is
709	 * in tri-state (module powered off or not driving the
710	 * signal yet).
711	 */
712	bias-pull-up;
713};
714
715&sdc1_clk {
716	bias-disable;
717	drive-strength = <16>;
718};
719
720&sdc1_cmd {
721	bias-pull-up;
722	drive-strength = <10>;
723};
724
725&sdc1_data {
726	bias-pull-up;
727	drive-strength = <10>;
728};
729
730&sdc1_rclk {
731	bias-pull-down;
732};
733
734&sdc2_clk {
735	bias-disable;
736	drive-strength = <16>;
737};
738
739&sdc2_cmd {
740	bias-pull-up;
741	drive-strength = <10>;
742};
743
744&sdc2_data {
745	bias-pull-up;
746	drive-strength = <10>;
747};
748
749&tlmm {
750	amp_en: amp-en-state {
751		pins = "gpio63";
752		function = "gpio";
753		bias-pull-down;
754		drive-strength = <2>;
755	};
756
757	bt_en: bt-en-state {
758		pins = "gpio85";
759		function = "gpio";
760		output-low;
761		bias-disable;
762	};
763
764	nvme_pwren: nvme-pwren-state {
765		function = "gpio";
766	};
767
768	pcie1_reset_n: pcie1-reset-n-state {
769		pins = "gpio2";
770		function = "gpio";
771
772		drive-strength = <16>;
773		output-low;
774		bias-disable;
775	};
776
777	pcie1_wake_n: pcie1-wake-n-state {
778		pins = "gpio3";
779		function = "gpio";
780
781		drive-strength = <2>;
782		bias-pull-up;
783	};
784
785	qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
786		pins = "gpio28";
787		function = "gpio";
788		/*
789		 * Configure a bias-bus-hold on CTS to lower power
790		 * usage when Bluetooth is turned off. Bus hold will
791		 * maintain a low power state regardless of whether
792		 * the Bluetooth module drives the pin in either
793		 * direction or leaves the pin fully unpowered.
794		 */
795		bias-bus-hold;
796	};
797
798	qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
799		pins = "gpio29";
800		function = "gpio";
801		/*
802		 * Configure pull-down on RTS. As RTS is active low
803		 * signal, pull it low to indicate the BT SoC that it
804		 * can wakeup the system anytime from suspend state by
805		 * pulling RX low (by sending wakeup bytes).
806		 */
807		bias-pull-down;
808	};
809
810	qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
811		pins = "gpio30";
812		function = "gpio";
813		/*
814		 * Configure pull-up on TX when it isn't actively driven
815		 * to prevent BT SoC from receiving garbage during sleep.
816		 */
817		bias-pull-up;
818	};
819
820	qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
821		pins = "gpio31";
822		function = "gpio";
823		/*
824		 * Configure a pull-up on RX. This is needed to avoid
825		 * garbage data when the TX pin of the Bluetooth module
826		 * is floating which may cause spurious wakeups.
827		 */
828		bias-pull-up;
829	};
830
831	sd_cd: sd-cd-state {
832		pins = "gpio91";
833		function = "gpio";
834		bias-pull-up;
835	};
836
837	sw_ctrl: sw-ctrl-state {
838		pins = "gpio86";
839		function = "gpio";
840		bias-pull-down;
841	};
842
843	wcd_reset_n: wcd-reset-n-state {
844		pins = "gpio83";
845		function = "gpio";
846		drive-strength = <8>;
847	};
848
849	wcd_reset_n_sleep: wcd-reset-n-sleep-state {
850		pins = "gpio83";
851		function = "gpio";
852		drive-strength = <8>;
853		bias-disable;
854	};
855};
856