1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device tree definitions for the Turing RK1 SoM. 4 * 5 * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com> 6 * 7 * Based on RK3588-EVB1 devicetree 8 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 9 */ 10 11/dts-v1/; 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/pinctrl/rockchip.h> 14#include "rk3588.dtsi" 15 16/ { 17 compatible = "turing,rk1", "rockchip,rk3588"; 18 19 aliases { 20 ethernet0 = &gmac1; 21 mmc0 = &sdhci; 22 }; 23 24 fan: pwm-fan { 25 compatible = "pwm-fan"; 26 cooling-levels = <0 25 95 145 195 255>; 27 fan-supply = <&vcc5v0_sys>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pwm0m2_pins &fan_int>; 30 interrupt-parent = <&gpio0>; 31 interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>; 32 pwms = <&pwm0 0 50000 0>; 33 #cooling-cells = <2>; 34 }; 35 36 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 37 compatible = "regulator-fixed"; 38 regulator-name = "vcc3v3_pcie30"; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 enable-active-high; 42 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&vcc3v3_pcie30_en>; 45 startup-delay-us = <5000>; 46 }; 47 48 vcc5v0_sys: regulator-vcc5v0-sys { 49 compatible = "regulator-fixed"; 50 regulator-name = "vcc5v0_sys"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <5000000>; 54 regulator-max-microvolt = <5000000>; 55 }; 56 57 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc_1v1_nldo_s3"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <1100000>; 63 regulator-max-microvolt = <1100000>; 64 vin-supply = <&vcc5v0_sys>; 65 }; 66}; 67 68&combphy2_psu { 69 status = "okay"; 70}; 71 72&cpu_b0 { 73 cpu-supply = <&vdd_cpu_big0_s0>; 74}; 75 76&cpu_b1 { 77 cpu-supply = <&vdd_cpu_big0_s0>; 78}; 79 80&cpu_b2 { 81 cpu-supply = <&vdd_cpu_big1_s0>; 82}; 83 84&cpu_b3 { 85 cpu-supply = <&vdd_cpu_big1_s0>; 86}; 87 88&cpu_l0 { 89 cpu-supply = <&vdd_cpu_lit_s0>; 90}; 91 92&cpu_l1 { 93 cpu-supply = <&vdd_cpu_lit_s0>; 94}; 95 96&cpu_l2 { 97 cpu-supply = <&vdd_cpu_lit_s0>; 98}; 99 100&cpu_l3 { 101 cpu-supply = <&vdd_cpu_lit_s0>; 102}; 103 104&gmac1 { 105 clock_in_out = "output"; 106 phy-handle = <&rgmii_phy>; 107 phy-mode = "rgmii-rxid"; 108 pinctrl-0 = <&gmac1_miim 109 &gmac1_tx_bus2 110 &gmac1_rx_bus2 111 &gmac1_rgmii_clk 112 &gmac1_rgmii_bus>; 113 pinctrl-names = "default"; 114 rx_delay = <0x00>; 115 tx_delay = <0x43>; 116 status = "okay"; 117}; 118 119&gpu { 120 mali-supply = <&vdd_gpu_s0>; 121 status = "okay"; 122}; 123 124&i2c0 { 125 pinctrl-names = "default"; 126 pinctrl-0 = <&i2c0m2_xfer>; 127 status = "okay"; 128 129 vdd_cpu_big0_s0: regulator@42 { 130 compatible = "rockchip,rk8602"; 131 reg = <0x42>; 132 fcs,suspend-voltage-selector = <1>; 133 regulator-name = "vdd_cpu_big0_s0"; 134 regulator-always-on; 135 regulator-boot-on; 136 regulator-min-microvolt = <550000>; 137 regulator-max-microvolt = <1050000>; 138 regulator-ramp-delay = <2300>; 139 vin-supply = <&vcc5v0_sys>; 140 141 regulator-state-mem { 142 regulator-off-in-suspend; 143 }; 144 }; 145 146 vdd_cpu_big1_s0: regulator@43 { 147 compatible = "rockchip,rk8603", "rockchip,rk8602"; 148 reg = <0x43>; 149 fcs,suspend-voltage-selector = <1>; 150 regulator-name = "vdd_cpu_big1_s0"; 151 regulator-always-on; 152 regulator-boot-on; 153 regulator-min-microvolt = <550000>; 154 regulator-max-microvolt = <1050000>; 155 regulator-ramp-delay = <2300>; 156 vin-supply = <&vcc5v0_sys>; 157 158 regulator-state-mem { 159 regulator-off-in-suspend; 160 }; 161 }; 162}; 163 164&i2c1 { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&i2c1m2_xfer>; 167 status = "okay"; 168 169 vdd_npu_s0: regulator@42 { 170 compatible = "rockchip,rk8602"; 171 reg = <0x42>; 172 fcs,suspend-voltage-selector = <1>; 173 regulator-name = "vdd_npu_s0"; 174 regulator-always-on; 175 regulator-boot-on; 176 regulator-min-microvolt = <550000>; 177 regulator-max-microvolt = <950000>; 178 regulator-ramp-delay = <2300>; 179 vin-supply = <&vcc5v0_sys>; 180 181 regulator-state-mem { 182 regulator-off-in-suspend; 183 }; 184 }; 185}; 186 187&i2c6 { 188 status = "okay"; 189 190 hym8563: rtc@51 { 191 compatible = "haoyu,hym8563"; 192 reg = <0x51>; 193 #clock-cells = <0>; 194 clock-output-names = "hym8563"; 195 pinctrl-names = "default"; 196 pinctrl-0 = <&hym8563_int>; 197 interrupt-parent = <&gpio0>; 198 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 199 wakeup-source; 200 }; 201}; 202 203&mdio1 { 204 rgmii_phy: ethernet-phy@1 { 205 /* RTL8211F */ 206 compatible = "ethernet-phy-id001c.c916"; 207 reg = <0x1>; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&rtl8211f_rst>; 210 reset-assert-us = <15000>; 211 reset-deassert-us = <50000>; 212 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 213 }; 214}; 215 216&package_thermal { 217 polling-delay = <1000>; 218 219 trips { 220 package_active1: trip-active1 { 221 temperature = <45000>; 222 hysteresis = <5000>; 223 type = "active"; 224 }; 225 package_active2: trip-active2 { 226 temperature = <50000>; 227 hysteresis = <5000>; 228 type = "active"; 229 }; 230 package_active3: trip-active3 { 231 temperature = <60000>; 232 hysteresis = <5000>; 233 type = "active"; 234 }; 235 package_active4: trip-active4 { 236 temperature = <70000>; 237 hysteresis = <5000>; 238 type = "active"; 239 }; 240 package_active5: trip-active5 { 241 temperature = <80000>; 242 hysteresis = <5000>; 243 type = "active"; 244 }; 245 }; 246 247 cooling-maps { 248 map1 { 249 trip = <&package_active1>; 250 cooling-device = <&fan 1 1>; 251 }; 252 map2 { 253 trip = <&package_active2>; 254 cooling-device = <&fan 2 2>; 255 }; 256 map3 { 257 trip = <&package_active3>; 258 cooling-device = <&fan 3 3>; 259 }; 260 map4 { 261 trip = <&package_active4>; 262 cooling-device = <&fan 4 4>; 263 }; 264 map5 { 265 trip = <&package_active5>; 266 cooling-device = <&fan 5 5>; 267 }; 268 }; 269}; 270 271&pcie2x1l1 { 272 linux,pci-domain = <1>; 273 pinctrl-names = "default"; 274 pinctrl-0 = <&pcie2_reset>, <&pcie30x1m1_0_clkreqn>, <&pcie30x1m1_0_waken>; 275 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 276 status = "okay"; 277}; 278 279&pcie30phy { 280 status = "okay"; 281}; 282 283&pcie3x4 { 284 linux,pci-domain = <0>; 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>, <&pcie30x4m1_waken>; 287 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 288 vpcie3v3-supply = <&vcc3v3_pcie30>; 289 status = "okay"; 290}; 291 292&pd_gpu { 293 domain-supply = <&vdd_gpu_s0>; 294}; 295 296&pinctrl { 297 fan { 298 fan_int: fan-int { 299 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 300 }; 301 }; 302 303 hym8563 { 304 hym8563_int: hym8563-int { 305 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 306 }; 307 }; 308 309 pcie2 { 310 pcie2_reset: pcie2-reset { 311 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 312 }; 313 }; 314 315 pcie3 { 316 pcie3_reset: pcie3-reset { 317 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 318 }; 319 320 vcc3v3_pcie30_en: pcie3-reg { 321 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 322 }; 323 }; 324 325 rtl8211f { 326 rtl8211f_rst: rtl8211f-rst { 327 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 328 }; 329 }; 330}; 331 332&pwm0 { 333 status = "okay"; 334}; 335 336&sdhci { 337 bus-width = <8>; 338 no-sdio; 339 no-sd; 340 non-removable; 341 mmc-hs400-1_8v; 342 mmc-hs400-enhanced-strobe; 343 status = "okay"; 344}; 345 346&spi2 { 347 status = "okay"; 348 pinctrl-names = "default"; 349 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 350 num-cs = <1>; 351 352 pmic@0 { 353 compatible = "rockchip,rk806"; 354 spi-max-frequency = <1000000>; 355 reg = <0x0>; 356 357 interrupt-parent = <&gpio0>; 358 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 359 360 pinctrl-names = "default"; 361 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 362 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 363 system-power-controller; 364 365 vcc1-supply = <&vcc5v0_sys>; 366 vcc2-supply = <&vcc5v0_sys>; 367 vcc3-supply = <&vcc5v0_sys>; 368 vcc4-supply = <&vcc5v0_sys>; 369 vcc5-supply = <&vcc5v0_sys>; 370 vcc6-supply = <&vcc5v0_sys>; 371 vcc7-supply = <&vcc5v0_sys>; 372 vcc8-supply = <&vcc5v0_sys>; 373 vcc9-supply = <&vcc5v0_sys>; 374 vcc10-supply = <&vcc5v0_sys>; 375 vcc11-supply = <&vcc_2v0_pldo_s3>; 376 vcc12-supply = <&vcc5v0_sys>; 377 vcc13-supply = <&vcc_1v1_nldo_s3>; 378 vcc14-supply = <&vcc_1v1_nldo_s3>; 379 vcca-supply = <&vcc5v0_sys>; 380 381 gpio-controller; 382 #gpio-cells = <2>; 383 384 rk806_dvs1_null: dvs1-null-pins { 385 pins = "gpio_pwrctrl1"; 386 function = "pin_fun0"; 387 }; 388 389 rk806_dvs2_null: dvs2-null-pins { 390 pins = "gpio_pwrctrl2"; 391 function = "pin_fun0"; 392 }; 393 394 rk806_dvs3_null: dvs3-null-pins { 395 pins = "gpio_pwrctrl3"; 396 function = "pin_fun0"; 397 }; 398 399 regulators { 400 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 401 regulator-boot-on; 402 regulator-min-microvolt = <550000>; 403 regulator-max-microvolt = <950000>; 404 regulator-ramp-delay = <12500>; 405 regulator-name = "vdd_gpu_s0"; 406 regulator-enable-ramp-delay = <400>; 407 408 regulator-state-mem { 409 regulator-off-in-suspend; 410 }; 411 }; 412 413 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 414 regulator-always-on; 415 regulator-boot-on; 416 regulator-min-microvolt = <550000>; 417 regulator-max-microvolt = <950000>; 418 regulator-ramp-delay = <12500>; 419 regulator-name = "vdd_cpu_lit_s0"; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vdd_log_s0: dcdc-reg3 { 427 regulator-always-on; 428 regulator-boot-on; 429 regulator-min-microvolt = <675000>; 430 regulator-max-microvolt = <750000>; 431 regulator-ramp-delay = <12500>; 432 regulator-name = "vdd_log_s0"; 433 434 regulator-state-mem { 435 regulator-off-in-suspend; 436 regulator-suspend-microvolt = <750000>; 437 }; 438 }; 439 440 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 441 regulator-always-on; 442 regulator-boot-on; 443 regulator-min-microvolt = <550000>; 444 regulator-max-microvolt = <950000>; 445 regulator-ramp-delay = <12500>; 446 regulator-name = "vdd_vdenc_s0"; 447 448 regulator-state-mem { 449 regulator-off-in-suspend; 450 }; 451 }; 452 453 vdd_ddr_s0: dcdc-reg5 { 454 regulator-always-on; 455 regulator-boot-on; 456 regulator-min-microvolt = <675000>; 457 regulator-max-microvolt = <900000>; 458 regulator-ramp-delay = <12500>; 459 regulator-name = "vdd_ddr_s0"; 460 461 regulator-state-mem { 462 regulator-off-in-suspend; 463 regulator-suspend-microvolt = <850000>; 464 }; 465 }; 466 467 vdd2_ddr_s3: dcdc-reg6 { 468 regulator-always-on; 469 regulator-boot-on; 470 regulator-name = "vdd2_ddr_s3"; 471 472 regulator-state-mem { 473 regulator-on-in-suspend; 474 }; 475 }; 476 477 vcc_2v0_pldo_s3: dcdc-reg7 { 478 regulator-always-on; 479 regulator-boot-on; 480 regulator-min-microvolt = <2000000>; 481 regulator-max-microvolt = <2000000>; 482 regulator-ramp-delay = <12500>; 483 regulator-name = "vdd_2v0_pldo_s3"; 484 485 regulator-state-mem { 486 regulator-on-in-suspend; 487 regulator-suspend-microvolt = <2000000>; 488 }; 489 }; 490 491 vcc_3v3_s3: dcdc-reg8 { 492 regulator-always-on; 493 regulator-boot-on; 494 regulator-min-microvolt = <3300000>; 495 regulator-max-microvolt = <3300000>; 496 regulator-name = "vcc_3v3_s3"; 497 498 regulator-state-mem { 499 regulator-on-in-suspend; 500 regulator-suspend-microvolt = <3300000>; 501 }; 502 }; 503 504 vddq_ddr_s0: dcdc-reg9 { 505 regulator-always-on; 506 regulator-boot-on; 507 regulator-name = "vddq_ddr_s0"; 508 509 regulator-state-mem { 510 regulator-off-in-suspend; 511 }; 512 }; 513 514 vcc_1v8_s3: dcdc-reg10 { 515 regulator-always-on; 516 regulator-boot-on; 517 regulator-min-microvolt = <1800000>; 518 regulator-max-microvolt = <1800000>; 519 regulator-name = "vcc_1v8_s3"; 520 521 regulator-state-mem { 522 regulator-on-in-suspend; 523 regulator-suspend-microvolt = <1800000>; 524 }; 525 }; 526 527 avcc_1v8_s0: pldo-reg1 { 528 regulator-always-on; 529 regulator-boot-on; 530 regulator-min-microvolt = <1800000>; 531 regulator-max-microvolt = <1800000>; 532 regulator-name = "avcc_1v8_s0"; 533 534 regulator-state-mem { 535 regulator-off-in-suspend; 536 }; 537 }; 538 539 vcc_1v8_s0: pldo-reg2 { 540 regulator-always-on; 541 regulator-boot-on; 542 regulator-min-microvolt = <1800000>; 543 regulator-max-microvolt = <1800000>; 544 regulator-name = "vcc_1v8_s0"; 545 546 regulator-state-mem { 547 regulator-off-in-suspend; 548 regulator-suspend-microvolt = <1800000>; 549 }; 550 }; 551 552 avdd_1v2_s0: pldo-reg3 { 553 regulator-always-on; 554 regulator-boot-on; 555 regulator-min-microvolt = <1200000>; 556 regulator-max-microvolt = <1200000>; 557 regulator-name = "avdd_1v2_s0"; 558 559 regulator-state-mem { 560 regulator-off-in-suspend; 561 }; 562 }; 563 564 vcc_3v3_s0: pldo-reg4 { 565 regulator-always-on; 566 regulator-boot-on; 567 regulator-min-microvolt = <3300000>; 568 regulator-max-microvolt = <3300000>; 569 regulator-ramp-delay = <12500>; 570 regulator-name = "vcc_3v3_s0"; 571 572 regulator-state-mem { 573 regulator-off-in-suspend; 574 }; 575 }; 576 577 vccio_sd_s0: pldo-reg5 { 578 regulator-always-on; 579 regulator-boot-on; 580 regulator-min-microvolt = <1800000>; 581 regulator-max-microvolt = <3300000>; 582 regulator-ramp-delay = <12500>; 583 regulator-name = "vccio_sd_s0"; 584 585 regulator-state-mem { 586 regulator-off-in-suspend; 587 }; 588 }; 589 590 pldo6_s3: pldo-reg6 { 591 regulator-always-on; 592 regulator-boot-on; 593 regulator-min-microvolt = <1800000>; 594 regulator-max-microvolt = <1800000>; 595 regulator-name = "pldo6_s3"; 596 597 regulator-state-mem { 598 regulator-on-in-suspend; 599 regulator-suspend-microvolt = <1800000>; 600 }; 601 }; 602 603 vdd_0v75_s3: nldo-reg1 { 604 regulator-always-on; 605 regulator-boot-on; 606 regulator-min-microvolt = <750000>; 607 regulator-max-microvolt = <750000>; 608 regulator-name = "vdd_0v75_s3"; 609 610 regulator-state-mem { 611 regulator-on-in-suspend; 612 regulator-suspend-microvolt = <750000>; 613 }; 614 }; 615 616 vdd_ddr_pll_s0: nldo-reg2 { 617 regulator-always-on; 618 regulator-boot-on; 619 regulator-min-microvolt = <850000>; 620 regulator-max-microvolt = <850000>; 621 regulator-name = "vdd_ddr_pll_s0"; 622 623 regulator-state-mem { 624 regulator-off-in-suspend; 625 regulator-suspend-microvolt = <850000>; 626 }; 627 }; 628 629 avdd_0v75_s0: nldo-reg3 { 630 regulator-always-on; 631 regulator-boot-on; 632 regulator-min-microvolt = <750000>; 633 regulator-max-microvolt = <750000>; 634 regulator-name = "avdd_0v75_s0"; 635 636 regulator-state-mem { 637 regulator-off-in-suspend; 638 }; 639 }; 640 641 vdd_0v85_s0: nldo-reg4 { 642 regulator-always-on; 643 regulator-boot-on; 644 regulator-min-microvolt = <850000>; 645 regulator-max-microvolt = <850000>; 646 regulator-name = "vdd_0v85_s0"; 647 648 regulator-state-mem { 649 regulator-off-in-suspend; 650 }; 651 }; 652 653 vdd_0v75_s0: nldo-reg5 { 654 regulator-always-on; 655 regulator-boot-on; 656 regulator-min-microvolt = <750000>; 657 regulator-max-microvolt = <750000>; 658 regulator-name = "vdd_0v75_s0"; 659 660 regulator-state-mem { 661 regulator-off-in-suspend; 662 }; 663 }; 664 }; 665 }; 666}; 667 668&tsadc { 669 status = "okay"; 670}; 671 672&uart2 { 673 pinctrl-0 = <&uart2m0_xfer>; 674 status = "okay"; 675}; 676 677&uart9 { 678 pinctrl-0 = <&uart9m0_xfer>; 679 status = "okay"; 680}; 681 682/* USB 0: USB 2.0 only, OTG-capable */ 683&u2phy0 { 684 status = "okay"; 685}; 686 687&u2phy0_otg { 688 status = "okay"; 689}; 690 691&usbdp_phy0 { 692 /* 693 * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not 694 * involved in this USB2-only bus. The bus controller (below) needs to 695 * know that it doesn't have a USB3 port so it can ignore any 696 * USB3-related signals. This is handled in hardware by updating the 697 * GRFs corresponding to that bus controller. Alas, Linux currently 698 * puts the code to do that in the USBDP driver, so USBDP0 must be 699 * enabled for now. 700 */ 701 rockchip,dp-lane-mux = <0 1 2 3>; /* "No USB lanes" */ 702 status = "okay"; 703}; 704 705&usb_host0_xhci { 706 extcon = <&u2phy0>; 707 maximum-speed = "high-speed"; 708 status = "okay"; 709}; 710 711/* USB 1: USB 3.0, host only */ 712&u2phy1 { 713 status = "okay"; 714}; 715 716&u2phy1_otg { 717 status = "okay"; 718}; 719 720&usbdp_phy1 { 721 status = "okay"; 722}; 723 724&usb_host1_xhci { 725 dr_mode = "host"; 726 extcon = <&u2phy1>; 727 status = "okay"; 728}; 729 730/* USB 2: USB 2.0, host only */ 731&u2phy2 { 732 status = "okay"; 733}; 734 735&u2phy2_host { 736 status = "okay"; 737}; 738 739&usb_host0_ehci { 740 status = "okay"; 741}; 742 743&usb_host0_ohci { 744 status = "okay"; 745}; 746