1/*- 2 * Copyright (c) 2016-2020 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Portions of this software were developed by SRI International and the 6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Portions of this software were developed by the University of Cambridge 10 * Computer Laboratory as part of the CTSRD Project, with support from the 11 * UK Higher Education Innovation Fund (HEIF). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35#include <machine/asm.h> 36ENTRY(generic_bs_r_1) 37 add a3, a1, a2 38 lbu a0, 0(a3) 39 ret 40END(generic_bs_r_1) 41 42ENTRY(generic_bs_r_2) 43 add a3, a1, a2 44 lhu a0, 0(a3) 45 ret 46END(generic_bs_r_2) 47 48ENTRY(generic_bs_r_4) 49 add a3, a1, a2 50 lw a0, 0(a3) 51 ret 52END(generic_bs_r_4) 53 54ENTRY(generic_bs_r_8) 55 add a3, a1, a2 56 ld a0, 0(a3) 57 ret 58END(generic_bs_r_8) 59 60ENTRY(generic_bs_w_1) 61 add a4, a1, a2 62 sb a3, 0(a4) 63 ret 64END(generic_bs_w_1) 65 66ENTRY(generic_bs_w_2) 67 add a4, a1, a2 68 sh a3, 0(a4) 69 ret 70END(generic_bs_w_2) 71 72ENTRY(generic_bs_w_4) 73 add a4, a1, a2 74 sw a3, 0(a4) 75 ret 76END(generic_bs_w_4) 77 78ENTRY(generic_bs_w_8) 79 add a4, a1, a2 80 sd a3, 0(a4) 81 ret 82END(generic_bs_w_8) 83