1 /* 2 * refclock_irig - audio IRIG-B/E demodulator/decoder 3 */ 4 #ifdef HAVE_CONFIG_H 5 #include <config.h> 6 #endif 7 8 #if defined(REFCLOCK) && defined(CLOCK_IRIG) 9 10 #include "ntpd.h" 11 #include "ntp_io.h" 12 #include "ntp_refclock.h" 13 #include "ntp_calendar.h" 14 #include "ntp_stdlib.h" 15 16 #include <stdio.h> 17 #include <ctype.h> 18 #include <math.h> 19 #ifdef HAVE_SYS_IOCTL_H 20 #include <sys/ioctl.h> 21 #endif /* HAVE_SYS_IOCTL_H */ 22 23 #include "audio.h" 24 25 /* 26 * Audio IRIG-B/E demodulator/decoder 27 * 28 * This driver synchronizes the computer time using data encoded in 29 * IRIG-B/E signals commonly produced by GPS receivers and other timing 30 * devices. The IRIG signal is an amplitude-modulated carrier with 31 * pulse-width modulated data bits. For IRIG-B, the carrier frequency is 32 * 1000 Hz and bit rate 100 b/s; for IRIG-E, the carrier frequenchy is 33 * 100 Hz and bit rate 10 b/s. The driver automatically recognizes which 34 & format is in use. 35 * 36 * The driver requires an audio codec or sound card with sampling rate 8 37 * kHz and mu-law companding. This is the same standard as used by the 38 * telephone industry and is supported by most hardware and operating 39 * systems, including Solaris, SunOS, FreeBSD, NetBSD and Linux. In this 40 * implementation, only one audio driver and codec can be supported on a 41 * single machine. 42 * 43 * The program processes 8000-Hz mu-law companded samples using separate 44 * signal filters for IRIG-B and IRIG-E, a comb filter, envelope 45 * detector and automatic threshold corrector. Cycle crossings relative 46 * to the corrected slice level determine the width of each pulse and 47 * its value - zero, one or position identifier. 48 * 49 * The data encode 20 BCD digits which determine the second, minute, 50 * hour and day of the year and sometimes the year and synchronization 51 * condition. The comb filter exponentially averages the corresponding 52 * samples of successive baud intervals in order to reliably identify 53 * the reference carrier cycle. A type-II phase-lock loop (PLL) performs 54 * additional integration and interpolation to accurately determine the 55 * zero crossing of that cycle, which determines the reference 56 * timestamp. A pulse-width discriminator demodulates the data pulses, 57 * which are then encoded as the BCD digits of the timecode. 58 * 59 * The timecode and reference timestamp are updated once each second 60 * with IRIG-B (ten seconds with IRIG-E) and local clock offset samples 61 * saved for later processing. At poll intervals of 64 s, the saved 62 * samples are processed by a trimmed-mean filter and used to update the 63 * system clock. 64 * 65 * An automatic gain control feature provides protection against 66 * overdriven or underdriven input signal amplitudes. It is designed to 67 * maintain adequate demodulator signal amplitude while avoiding 68 * occasional noise spikes. In order to assure reliable capture, the 69 * decompanded input signal amplitude must be greater than 100 units and 70 * the codec sample frequency error less than 250 PPM (.025 percent). 71 * 72 * Monitor Data 73 * 74 * The timecode format used for debugging and data recording includes 75 * data helpful in diagnosing problems with the IRIG signal and codec 76 * connections. The driver produces one line for each timecode in the 77 * following format: 78 * 79 * 00 00 98 23 19:26:52 2782 143 0.694 10 0.3 66.5 3094572411.00027 80 * 81 * If clockstats is enabled, the most recent line is written to the 82 * clockstats file every 64 s. If verbose recording is enabled (fudge 83 * flag 4) each line is written as generated. 84 * 85 * The first field containes the error flags in hex, where the hex bits 86 * are interpreted as below. This is followed by the year of century, 87 * day of year and time of day. Note that the time of day is for the 88 * previous minute, not the current time. The status indicator and year 89 * are not produced by some IRIG devices and appear as zeros. Following 90 * these fields are the carrier amplitude (0-3000), codec gain (0-255), 91 * modulation index (0-1), time constant (4-10), carrier phase error 92 * +-.5) and carrier frequency error (PPM). The last field is the on- 93 * time timestamp in NTP format. 94 * 95 * The error flags are defined as follows in hex: 96 * 97 * x01 Low signal. The carrier amplitude is less than 100 units. This 98 * is usually the result of no signal or wrong input port. 99 * x02 Frequency error. The codec frequency error is greater than 250 100 * PPM. This may be due to wrong signal format or (rarely) 101 * defective codec. 102 * x04 Modulation error. The IRIG modulation index is less than 0.5. 103 * This is usually the result of an overdriven codec, wrong signal 104 * format or wrong input port. 105 * x08 Frame synch error. The decoder frame does not match the IRIG 106 * frame. This is usually the result of an overdriven codec, wrong 107 * signal format or noisy IRIG signal. It may also be the result of 108 * an IRIG signature check which indicates a failure of the IRIG 109 * signal synchronization source. 110 * x10 Data bit error. The data bit length is out of tolerance. This is 111 * usually the result of an overdriven codec, wrong signal format 112 * or noisy IRIG signal. 113 * x20 Seconds numbering discrepancy. The decoder second does not match 114 * the IRIG second. This is usually the result of an overdriven 115 * codec, wrong signal format or noisy IRIG signal. 116 * x40 Codec error (overrun). The machine is not fast enough to keep up 117 * with the codec. 118 * x80 Device status error (Spectracom). 119 * 120 * 121 * Once upon a time, an UltrSPARC 30 and Solaris 2.7 kept the clock 122 * within a few tens of microseconds relative to the IRIG-B signal. 123 * Accuracy with IRIG-E was about ten times worse. Unfortunately, Sun 124 * broke the 2.7 audio driver in 2.8, which has a 10-ms sawtooth 125 * modulation. 126 * 127 * Unlike other drivers, which can have multiple instantiations, this 128 * one supports only one. It does not seem likely that more than one 129 * audio codec would be useful in a single machine. More than one would 130 * probably chew up too much CPU time anyway. 131 * 132 * Fudge factors 133 * 134 * Fudge flag4 causes the dubugging output described above to be 135 * recorded in the clockstats file. Fudge flag2 selects the audio input 136 * port, where 0 is the mike port (default) and 1 is the line-in port. 137 * It does not seem useful to select the compact disc player port. Fudge 138 * flag3 enables audio monitoring of the input signal. For this purpose, 139 * the monitor gain is set t a default value. Fudgetime2 is used as a 140 * frequency vernier for broken codec sample frequency. 141 * 142 * Alarm codes 143 * 144 * CEVNT_BADTIME invalid date or time 145 * CEVNT_TIMEOUT no IRIG data since last poll 146 */ 147 /* 148 * Interface definitions 149 */ 150 #define DEVICE_AUDIO "/dev/audio" /* audio device name */ 151 #define PRECISION (-17) /* precision assumed (about 10 us) */ 152 #define REFID "IRIG" /* reference ID */ 153 #define DESCRIPTION "Generic IRIG Audio Driver" /* WRU */ 154 #define AUDIO_BUFSIZ 320 /* audio buffer size (40 ms) */ 155 #define SECOND 8000 /* nominal sample rate (Hz) */ 156 #define BAUD 80 /* samples per baud interval */ 157 #define OFFSET 128 /* companded sample offset */ 158 #define SIZE 256 /* decompanding table size */ 159 #define CYCLE 8 /* samples per bit */ 160 #define SUBFLD 10 /* bits per frame */ 161 #define FIELD 100 /* bits per second */ 162 #define MINTC 2 /* min PLL time constant */ 163 #define MAXTC 10 /* max PLL time constant max */ 164 #define MAXAMP 3000. /* maximum signal amplitude */ 165 #define MINAMP 2000. /* minimum signal amplitude */ 166 #define DRPOUT 100. /* dropout signal amplitude */ 167 #define MODMIN 0.5 /* minimum modulation index */ 168 #define MAXFREQ (250e-6 * SECOND) /* freq tolerance (.025%) */ 169 170 /* 171 * The on-time synchronization point is the positive-going zero crossing 172 * of the first cycle of the second. The IIR baseband filter phase delay 173 * is 1.03 ms for IRIG-B and 3.47 ms for IRIG-E. The fudge value 2.68 ms 174 * due to the codec and other causes was determined by calibrating to a 175 * PPS signal from a GPS receiver. 176 * 177 * The results with a 2.4-GHz P4 running FreeBSD 6.1 are generally 178 * within .02 ms short-term with .02 ms jitter. The processor load due 179 * to the driver is 0.51 percent. 180 */ 181 #define IRIG_B ((1.03 + 2.68) / 1000) /* IRIG-B system delay (s) */ 182 #define IRIG_E ((3.47 + 2.68) / 1000) /* IRIG-E system delay (s) */ 183 184 /* 185 * Data bit definitions 186 */ 187 #define BIT0 0 /* zero */ 188 #define BIT1 1 /* one */ 189 #define BITP 2 /* position identifier */ 190 191 /* 192 * Error flags 193 */ 194 #define IRIG_ERR_AMP 0x01 /* low carrier amplitude */ 195 #define IRIG_ERR_FREQ 0x02 /* frequency tolerance exceeded */ 196 #define IRIG_ERR_MOD 0x04 /* low modulation index */ 197 #define IRIG_ERR_SYNCH 0x08 /* frame synch error */ 198 #define IRIG_ERR_DECODE 0x10 /* frame decoding error */ 199 #define IRIG_ERR_CHECK 0x20 /* second numbering discrepancy */ 200 #define IRIG_ERR_ERROR 0x40 /* codec error (overrun) */ 201 #define IRIG_ERR_SIGERR 0x80 /* IRIG status error (Spectracom) */ 202 203 static char hexchar[] = "0123456789abcdef"; 204 205 /* 206 * IRIG unit control structure 207 */ 208 struct irigunit { 209 u_char timecode[2 * SUBFLD + 1]; /* timecode string */ 210 l_fp timestamp; /* audio sample timestamp */ 211 l_fp tick; /* audio sample increment */ 212 l_fp refstamp; /* reference timestamp */ 213 l_fp chrstamp; /* baud timestamp */ 214 l_fp prvstamp; /* previous baud timestamp */ 215 double integ[BAUD]; /* baud integrator */ 216 double phase, freq; /* logical clock phase and frequency */ 217 double zxing; /* phase detector integrator */ 218 double yxing; /* cycle phase */ 219 double exing; /* envelope phase */ 220 double modndx; /* modulation index */ 221 double irig_b; /* IRIG-B signal amplitude */ 222 double irig_e; /* IRIG-E signal amplitude */ 223 int errflg; /* error flags */ 224 /* 225 * Audio codec variables 226 */ 227 double comp[SIZE]; /* decompanding table */ 228 double signal; /* peak signal for AGC */ 229 int port; /* codec port */ 230 int gain; /* codec gain */ 231 int mongain; /* codec monitor gain */ 232 int seccnt; /* second interval counter */ 233 234 /* 235 * RF variables 236 */ 237 double bpf[9]; /* IRIG-B filter shift register */ 238 double lpf[5]; /* IRIG-E filter shift register */ 239 double envmin, envmax; /* envelope min and max */ 240 double slice; /* envelope slice level */ 241 double intmin, intmax; /* integrated envelope min and max */ 242 double maxsignal; /* integrated peak amplitude */ 243 double noise; /* integrated noise amplitude */ 244 double lastenv[CYCLE]; /* last cycle amplitudes */ 245 double lastint[CYCLE]; /* last integrated cycle amplitudes */ 246 double lastsig; /* last carrier sample */ 247 double fdelay; /* filter delay */ 248 int decim; /* sample decimation factor */ 249 int envphase; /* envelope phase */ 250 int envptr; /* envelope phase pointer */ 251 int envsw; /* envelope state */ 252 int envxing; /* envelope slice crossing */ 253 int tc; /* time constant */ 254 int tcount; /* time constant counter */ 255 int badcnt; /* decimation interval counter */ 256 257 /* 258 * Decoder variables 259 */ 260 int pulse; /* cycle counter */ 261 int cycles; /* carrier cycles */ 262 int dcycles; /* data cycles */ 263 int lastbit; /* last code element */ 264 int second; /* previous second */ 265 int bitcnt; /* bit count in frame */ 266 int frmcnt; /* bit count in second */ 267 int xptr; /* timecode pointer */ 268 int bits; /* demodulated bits */ 269 }; 270 271 /* 272 * Function prototypes 273 */ 274 static int irig_start (int, struct peer *); 275 static void irig_shutdown (int, struct peer *); 276 static void irig_receive (struct recvbuf *); 277 static void irig_poll (int, struct peer *); 278 279 /* 280 * More function prototypes 281 */ 282 static void irig_base (struct peer *, double); 283 static void irig_rf (struct peer *, double); 284 static void irig_baud (struct peer *, int); 285 static void irig_decode (struct peer *, int); 286 static void irig_gain (struct peer *); 287 288 /* 289 * Transfer vector 290 */ 291 struct refclock refclock_irig = { 292 irig_start, /* start up driver */ 293 irig_shutdown, /* shut down driver */ 294 irig_poll, /* transmit poll message */ 295 noentry, /* not used (old irig_control) */ 296 noentry, /* initialize driver (not used) */ 297 noentry, /* not used (old irig_buginfo) */ 298 NOFLAGS /* not used */ 299 }; 300 301 302 /* 303 * irig_start - open the devices and initialize data for processing 304 */ 305 static int 306 irig_start( 307 int unit, /* instance number (used for PCM) */ 308 struct peer *peer /* peer structure pointer */ 309 ) 310 { 311 struct refclockproc *pp; 312 struct irigunit *up; 313 314 /* 315 * Local variables 316 */ 317 int fd; /* file descriptor */ 318 int i; /* index */ 319 double step; /* codec adjustment */ 320 321 /* 322 * Open audio device 323 */ 324 fd = audio_init(DEVICE_AUDIO, AUDIO_BUFSIZ, unit); 325 if (fd < 0) 326 return (0); 327 #ifdef DEBUG 328 if (debug) 329 audio_show(); 330 #endif 331 332 /* 333 * Allocate and initialize unit structure 334 */ 335 up = emalloc_zero(sizeof(*up)); 336 pp = peer->procptr; 337 pp->io.clock_recv = irig_receive; 338 pp->io.srcclock = peer; 339 pp->io.datalen = 0; 340 pp->io.fd = fd; 341 if (!io_addclock(&pp->io)) { 342 close(fd); 343 pp->io.fd = -1; 344 free(up); 345 return (0); 346 } 347 pp->unitptr = up; 348 349 /* 350 * Initialize miscellaneous variables 351 */ 352 peer->precision = PRECISION; 353 pp->clockdesc = DESCRIPTION; 354 memcpy((char *)&pp->refid, REFID, 4); 355 up->tc = MINTC; 356 up->decim = 1; 357 up->gain = 127; 358 359 /* 360 * The companded samples are encoded sign-magnitude. The table 361 * contains all the 256 values in the interest of speed. 362 */ 363 up->comp[0] = up->comp[OFFSET] = 0.; 364 up->comp[1] = 1; up->comp[OFFSET + 1] = -1.; 365 up->comp[2] = 3; up->comp[OFFSET + 2] = -3.; 366 step = 2.; 367 for (i = 3; i < OFFSET; i++) { 368 up->comp[i] = up->comp[i - 1] + step; 369 up->comp[OFFSET + i] = -up->comp[i]; 370 if (i % 16 == 0) 371 step *= 2.; 372 } 373 DTOLFP(1. / SECOND, &up->tick); 374 return (1); 375 } 376 377 378 /* 379 * irig_shutdown - shut down the clock 380 */ 381 static void 382 irig_shutdown( 383 int unit, /* instance number (not used) */ 384 struct peer *peer /* peer structure pointer */ 385 ) 386 { 387 struct refclockproc *pp; 388 struct irigunit *up; 389 390 pp = peer->procptr; 391 up = pp->unitptr; 392 if (-1 != pp->io.fd) 393 io_closeclock(&pp->io); 394 if (NULL != up) 395 free(up); 396 } 397 398 399 /* 400 * irig_receive - receive data from the audio device 401 * 402 * This routine reads input samples and adjusts the logical clock to 403 * track the irig clock by dropping or duplicating codec samples. 404 */ 405 static void 406 irig_receive( 407 struct recvbuf *rbufp /* receive buffer structure pointer */ 408 ) 409 { 410 struct peer *peer; 411 struct refclockproc *pp; 412 struct irigunit *up; 413 414 /* 415 * Local variables 416 */ 417 double sample; /* codec sample */ 418 u_char *dpt; /* buffer pointer */ 419 int bufcnt; /* buffer counter */ 420 l_fp ltemp; /* l_fp temp */ 421 422 peer = rbufp->recv_peer; 423 pp = peer->procptr; 424 up = pp->unitptr; 425 426 /* 427 * Main loop - read until there ain't no more. Note codec 428 * samples are bit-inverted. 429 */ 430 DTOLFP((double)rbufp->recv_length / SECOND, <emp); 431 L_SUB(&rbufp->recv_time, <emp); 432 up->timestamp = rbufp->recv_time; 433 dpt = rbufp->recv_buffer; 434 for (bufcnt = 0; bufcnt < rbufp->recv_length; bufcnt++) { 435 sample = up->comp[~*dpt++ & 0xff]; 436 437 /* 438 * Variable frequency oscillator. The codec oscillator 439 * runs at the nominal rate of 8000 samples per second, 440 * or 125 us per sample. A frequency change of one unit 441 * results in either duplicating or deleting one sample 442 * per second, which results in a frequency change of 443 * 125 PPM. 444 */ 445 up->phase += (up->freq + clock_codec) / SECOND; 446 up->phase += pp->fudgetime2 / 1e6; 447 if (up->phase >= .5) { 448 up->phase -= 1.; 449 } else if (up->phase < -.5) { 450 up->phase += 1.; 451 irig_rf(peer, sample); 452 irig_rf(peer, sample); 453 } else { 454 irig_rf(peer, sample); 455 } 456 L_ADD(&up->timestamp, &up->tick); 457 sample = fabs(sample); 458 if (sample > up->signal) 459 up->signal = sample; 460 up->signal += (sample - up->signal) / 461 1000; 462 463 /* 464 * Once each second, determine the IRIG format and gain. 465 */ 466 up->seccnt = (up->seccnt + 1) % SECOND; 467 if (up->seccnt == 0) { 468 if (up->irig_b > up->irig_e) { 469 up->decim = 1; 470 up->fdelay = IRIG_B; 471 } else { 472 up->decim = 10; 473 up->fdelay = IRIG_E; 474 } 475 up->irig_b = up->irig_e = 0; 476 irig_gain(peer); 477 478 } 479 } 480 481 /* 482 * Set the input port and monitor gain for the next buffer. 483 */ 484 if (pp->sloppyclockflag & CLK_FLAG2) 485 up->port = 2; 486 else 487 up->port = 1; 488 if (pp->sloppyclockflag & CLK_FLAG3) 489 up->mongain = MONGAIN; 490 else 491 up->mongain = 0; 492 } 493 494 495 /* 496 * irig_rf - RF processing 497 * 498 * This routine filters the RF signal using a bandass filter for IRIG-B 499 * and a lowpass filter for IRIG-E. In case of IRIG-E, the samples are 500 * decimated by a factor of ten. Note that the codec filters function as 501 * roofing filters to attenuate both the high and low ends of the 502 * passband. IIR filter coefficients were determined using Matlab Signal 503 * Processing Toolkit. 504 */ 505 static void 506 irig_rf( 507 struct peer *peer, /* peer structure pointer */ 508 double sample /* current signal sample */ 509 ) 510 { 511 struct refclockproc *pp; 512 struct irigunit *up; 513 514 /* 515 * Local variables 516 */ 517 double irig_b, irig_e; /* irig filter outputs */ 518 519 pp = peer->procptr; 520 up = pp->unitptr; 521 522 /* 523 * IRIG-B filter. Matlab 4th-order IIR elliptic, 800-1200 Hz 524 * bandpass, 0.3 dB passband ripple, -50 dB stopband ripple, 525 * phase delay 1.03 ms. 526 */ 527 irig_b = (up->bpf[8] = up->bpf[7]) * 6.505491e-001; 528 irig_b += (up->bpf[7] = up->bpf[6]) * -3.875180e+000; 529 irig_b += (up->bpf[6] = up->bpf[5]) * 1.151180e+001; 530 irig_b += (up->bpf[5] = up->bpf[4]) * -2.141264e+001; 531 irig_b += (up->bpf[4] = up->bpf[3]) * 2.712837e+001; 532 irig_b += (up->bpf[3] = up->bpf[2]) * -2.384486e+001; 533 irig_b += (up->bpf[2] = up->bpf[1]) * 1.427663e+001; 534 irig_b += (up->bpf[1] = up->bpf[0]) * -5.352734e+000; 535 up->bpf[0] = sample - irig_b; 536 irig_b = up->bpf[0] * 4.952157e-003 537 + up->bpf[1] * -2.055878e-002 538 + up->bpf[2] * 4.401413e-002 539 + up->bpf[3] * -6.558851e-002 540 + up->bpf[4] * 7.462108e-002 541 + up->bpf[5] * -6.558851e-002 542 + up->bpf[6] * 4.401413e-002 543 + up->bpf[7] * -2.055878e-002 544 + up->bpf[8] * 4.952157e-003; 545 up->irig_b += irig_b * irig_b; 546 547 /* 548 * IRIG-E filter. Matlab 4th-order IIR elliptic, 130-Hz lowpass, 549 * 0.3 dB passband ripple, -50 dB stopband ripple, phase delay 550 * 3.47 ms. 551 */ 552 irig_e = (up->lpf[4] = up->lpf[3]) * 8.694604e-001; 553 irig_e += (up->lpf[3] = up->lpf[2]) * -3.589893e+000; 554 irig_e += (up->lpf[2] = up->lpf[1]) * 5.570154e+000; 555 irig_e += (up->lpf[1] = up->lpf[0]) * -3.849667e+000; 556 up->lpf[0] = sample - irig_e; 557 irig_e = up->lpf[0] * 3.215696e-003 558 + up->lpf[1] * -1.174951e-002 559 + up->lpf[2] * 1.712074e-002 560 + up->lpf[3] * -1.174951e-002 561 + up->lpf[4] * 3.215696e-003; 562 up->irig_e += irig_e * irig_e; 563 564 /* 565 * Decimate by a factor of either 1 (IRIG-B) or 10 (IRIG-E). 566 */ 567 up->badcnt = (up->badcnt + 1) % up->decim; 568 if (up->badcnt == 0) { 569 if (up->decim == 1) 570 irig_base(peer, irig_b); 571 else 572 irig_base(peer, irig_e); 573 } 574 } 575 576 /* 577 * irig_base - baseband processing 578 * 579 * This routine processes the baseband signal and demodulates the AM 580 * carrier using a synchronous detector. It then synchronizes to the 581 * data frame at the baud rate and decodes the width-modulated data 582 * pulses. 583 */ 584 static void 585 irig_base( 586 struct peer *peer, /* peer structure pointer */ 587 double sample /* current signal sample */ 588 ) 589 { 590 struct refclockproc *pp; 591 struct irigunit *up; 592 593 /* 594 * Local variables 595 */ 596 double lope; /* integrator output */ 597 double env; /* envelope detector output */ 598 double dtemp; 599 int carphase; /* carrier phase */ 600 601 pp = peer->procptr; 602 up = pp->unitptr; 603 604 /* 605 * Synchronous baud integrator. Corresponding samples of current 606 * and past baud intervals are integrated to refine the envelope 607 * amplitude and phase estimate. We keep one cycle (1 ms) of the 608 * raw data and one baud (10 ms) of the integrated data. 609 */ 610 up->envphase = (up->envphase + 1) % BAUD; 611 up->integ[up->envphase] += (sample - up->integ[up->envphase]) / 612 (5 * up->tc); 613 lope = up->integ[up->envphase]; 614 carphase = up->envphase % CYCLE; 615 up->lastenv[carphase] = sample; 616 up->lastint[carphase] = lope; 617 618 /* 619 * Phase detector. Find the negative-going zero crossing 620 * relative to sample 4 in the 8-sample sycle. A phase change of 621 * 360 degrees produces an output change of one unit. 622 */ 623 if (up->lastsig > 0 && lope <= 0) 624 up->zxing += (double)(carphase - 4) / CYCLE; 625 up->lastsig = lope; 626 627 /* 628 * End of the baud. Update signal/noise estimates and PLL 629 * phase, frequency and time constant. 630 */ 631 if (up->envphase == 0) { 632 up->maxsignal = up->intmax; up->noise = up->intmin; 633 up->intmin = 1e6; up->intmax = -1e6; 634 if (up->maxsignal < DRPOUT) 635 up->errflg |= IRIG_ERR_AMP; 636 if (up->maxsignal > 0) 637 up->modndx = (up->maxsignal - up->noise) / 638 up->maxsignal; 639 else 640 up->modndx = 0; 641 if (up->modndx < MODMIN) 642 up->errflg |= IRIG_ERR_MOD; 643 if (up->errflg & (IRIG_ERR_AMP | IRIG_ERR_FREQ | 644 IRIG_ERR_MOD | IRIG_ERR_SYNCH)) { 645 up->tc = MINTC; 646 up->tcount = 0; 647 } 648 649 /* 650 * Update PLL phase and frequency. The PLL time constant 651 * is set initially to stabilize the frequency within a 652 * minute or two, then increases to the maximum. The 653 * frequency is clamped so that the PLL capture range 654 * cannot be exceeded. 655 */ 656 dtemp = up->zxing * up->decim / BAUD; 657 up->yxing = dtemp; 658 up->zxing = 0.; 659 up->phase += dtemp / up->tc; 660 up->freq += dtemp / (4. * up->tc * up->tc); 661 if (up->freq > MAXFREQ) { 662 up->freq = MAXFREQ; 663 up->errflg |= IRIG_ERR_FREQ; 664 } else if (up->freq < -MAXFREQ) { 665 up->freq = -MAXFREQ; 666 up->errflg |= IRIG_ERR_FREQ; 667 } 668 } 669 670 /* 671 * Synchronous demodulator. There are eight samples in the cycle 672 * and ten cycles in the baud. Since the PLL has aligned the 673 * negative-going zero crossing at sample 4, the maximum 674 * amplitude is at sample 2 and minimum at sample 6. The 675 * beginning of the data pulse is determined from the integrated 676 * samples, while the end of the pulse is determined from the 677 * raw samples. The raw data bits are demodulated relative to 678 * the slice level and left-shifted in the decoding register. 679 */ 680 if (carphase != 7) 681 return; 682 683 lope = (up->lastint[2] - up->lastint[6]) / 2.; 684 if (lope > up->intmax) 685 up->intmax = lope; 686 if (lope < up->intmin) 687 up->intmin = lope; 688 689 /* 690 * Pulse code demodulator and reference timestamp. The decoder 691 * looks for a sequence of ten bits; the first two bits must be 692 * one, the last two bits must be zero. Frame synch is asserted 693 * when three correct frames have been found. 694 */ 695 up->pulse = (up->pulse + 1) % 10; 696 up->cycles <<= 1; 697 if (lope >= (up->maxsignal + up->noise) / 2.) 698 up->cycles |= 1; 699 if ((up->cycles & 0x303c0f03) == 0x300c0300) { 700 if (up->pulse != 0) 701 up->errflg |= IRIG_ERR_SYNCH; 702 up->pulse = 0; 703 } 704 705 /* 706 * Assemble the baud and max/min to get the slice level for the 707 * next baud. The slice level is based on the maximum over the 708 * first two bits and the minimum over the last two bits, with 709 * the slice level halfway between the maximum and minimum. 710 */ 711 env = (up->lastenv[2] - up->lastenv[6]) / 2.; 712 up->dcycles <<= 1; 713 if (env >= up->slice) 714 up->dcycles |= 1; 715 switch(up->pulse) { 716 717 case 0: 718 irig_baud(peer, up->dcycles); 719 if (env < up->envmin) 720 up->envmin = env; 721 up->slice = (up->envmax + up->envmin) / 2; 722 up->envmin = 1e6; up->envmax = -1e6; 723 break; 724 725 case 1: 726 up->envmax = env; 727 break; 728 729 case 2: 730 if (env > up->envmax) 731 up->envmax = env; 732 break; 733 734 case 9: 735 up->envmin = env; 736 break; 737 } 738 } 739 740 /* 741 * irig_baud - update the PLL and decode the pulse-width signal 742 */ 743 static void 744 irig_baud( 745 struct peer *peer, /* peer structure pointer */ 746 int bits /* decoded bits */ 747 ) 748 { 749 struct refclockproc *pp; 750 struct irigunit *up; 751 double dtemp; 752 l_fp ltemp; 753 754 pp = peer->procptr; 755 up = pp->unitptr; 756 757 /* 758 * The PLL time constant starts out small, in order to 759 * sustain a frequency tolerance of 250 PPM. It 760 * gradually increases as the loop settles down. Note 761 * that small wiggles are not believed, unless they 762 * persist for lots of samples. 763 */ 764 up->exing = -up->yxing; 765 if (abs(up->envxing - up->envphase) <= 1) { 766 up->tcount++; 767 if (up->tcount > 20 * up->tc) { 768 up->tc++; 769 if (up->tc > MAXTC) 770 up->tc = MAXTC; 771 up->tcount = 0; 772 up->envxing = up->envphase; 773 } else { 774 up->exing -= up->envxing - up->envphase; 775 } 776 } else { 777 up->tcount = 0; 778 up->envxing = up->envphase; 779 } 780 781 /* 782 * Strike the baud timestamp as the positive zero crossing of 783 * the first bit, accounting for the codec delay and filter 784 * delay. 785 */ 786 up->prvstamp = up->chrstamp; 787 dtemp = up->decim * (up->exing / SECOND) + up->fdelay; 788 DTOLFP(dtemp, <emp); 789 up->chrstamp = up->timestamp; 790 L_SUB(&up->chrstamp, <emp); 791 792 /* 793 * The data bits are collected in ten-bit bauds. The first two 794 * bits are not used. The resulting patterns represent runs of 795 * 0-1 bits (0), 2-4 bits (1) and 5-7 bits (PI). The remaining 796 * 8-bit run represents a soft error and is treated as 0. 797 */ 798 switch (up->dcycles & 0xff) { 799 800 case 0x00: /* 0-1 bits (0) */ 801 case 0x80: 802 irig_decode(peer, BIT0); 803 break; 804 805 case 0xc0: /* 2-4 bits (1) */ 806 case 0xe0: 807 case 0xf0: 808 irig_decode(peer, BIT1); 809 break; 810 811 case 0xf8: /* (5-7 bits (PI) */ 812 case 0xfc: 813 case 0xfe: 814 irig_decode(peer, BITP); 815 break; 816 817 default: /* 8 bits (error) */ 818 irig_decode(peer, BIT0); 819 up->errflg |= IRIG_ERR_DECODE; 820 } 821 } 822 823 824 /* 825 * irig_decode - decode the data 826 * 827 * This routine assembles bauds into digits, digits into frames and 828 * frames into the timecode fields. Bits can have values of zero, one 829 * or position identifier. There are four bits per digit, ten digits per 830 * frame and ten frames per second. 831 */ 832 static void 833 irig_decode( 834 struct peer *peer, /* peer structure pointer */ 835 int bit /* data bit (0, 1 or 2) */ 836 ) 837 { 838 struct refclockproc *pp; 839 struct irigunit *up; 840 841 /* 842 * Local variables 843 */ 844 int syncdig; /* sync digit (Spectracom) */ 845 char sbs[6 + 1]; /* binary seconds since 0h */ 846 char spare[2 + 1]; /* mulligan digits */ 847 int temp; 848 849 syncdig = 0; 850 pp = peer->procptr; 851 up = pp->unitptr; 852 853 /* 854 * Assemble frame bits. 855 */ 856 up->bits >>= 1; 857 if (bit == BIT1) { 858 up->bits |= 0x200; 859 } else if (bit == BITP && up->lastbit == BITP) { 860 861 /* 862 * Frame sync - two adjacent position identifiers, which 863 * mark the beginning of the second. The reference time 864 * is the beginning of the second position identifier, 865 * so copy the character timestamp to the reference 866 * timestamp. 867 */ 868 if (up->frmcnt != 1) 869 up->errflg |= IRIG_ERR_SYNCH; 870 up->frmcnt = 1; 871 up->refstamp = up->prvstamp; 872 } 873 up->lastbit = bit; 874 if (up->frmcnt % SUBFLD == 0) { 875 876 /* 877 * End of frame. Encode two hexadecimal digits in 878 * little-endian timecode field. Note frame 1 is shifted 879 * right one bit to account for the marker PI. 880 */ 881 temp = up->bits; 882 if (up->frmcnt == 10) 883 temp >>= 1; 884 if (up->xptr >= 2) { 885 up->timecode[--up->xptr] = hexchar[temp & 0xf]; 886 up->timecode[--up->xptr] = hexchar[(temp >> 5) & 887 0xf]; 888 } 889 if (up->frmcnt == 0) { 890 891 /* 892 * End of second. Decode the timecode and wind 893 * the clock. Not all IRIG generators have the 894 * year; if so, it is nonzero after year 2000. 895 * Not all have the hardware status bit; if so, 896 * it is lit when the source is okay and dim 897 * when bad. We watch this only if the year is 898 * nonzero. Not all are configured for signature 899 * control. If so, all BCD digits are set to 900 * zero if the source is bad. In this case the 901 * refclock_process() will reject the timecode 902 * as invalid. 903 */ 904 up->xptr = 2 * SUBFLD; 905 if (sscanf((char *)up->timecode, 906 "%6s%2d%1d%2s%3d%2d%2d%2d", sbs, &pp->year, 907 &syncdig, spare, &pp->day, &pp->hour, 908 &pp->minute, &pp->second) != 8) 909 pp->leap = LEAP_NOTINSYNC; 910 else 911 pp->leap = LEAP_NOWARNING; 912 up->second = (up->second + up->decim) % 60; 913 914 /* 915 * Raise an alarm if the day field is zero, 916 * which happens when signature control is 917 * enabled and the device has lost 918 * synchronization. Raise an alarm if the year 919 * field is nonzero and the sync indicator is 920 * zero, which happens when a Spectracom radio 921 * has lost synchronization. Raise an alarm if 922 * the expected second does not agree with the 923 * decoded second, which happens with a garbled 924 * IRIG signal. We are very particular. 925 */ 926 if (pp->day == 0 || (pp->year != 0 && syncdig == 927 0)) 928 up->errflg |= IRIG_ERR_SIGERR; 929 if (pp->second != up->second) 930 up->errflg |= IRIG_ERR_CHECK; 931 up->second = pp->second; 932 933 /* 934 * Wind the clock only if there are no errors 935 * and the time constant has reached the 936 * maximum. 937 */ 938 if (up->errflg == 0 && up->tc == MAXTC) { 939 pp->lastref = pp->lastrec; 940 pp->lastrec = up->refstamp; 941 if (!refclock_process(pp)) 942 refclock_report(peer, 943 CEVNT_BADTIME); 944 } 945 snprintf(pp->a_lastcode, sizeof(pp->a_lastcode), 946 "%02x %02d %03d %02d:%02d:%02d %4.0f %3d %6.3f %2d %6.2f %6.1f %s", 947 up->errflg, pp->year, pp->day, 948 pp->hour, pp->minute, pp->second, 949 up->maxsignal, up->gain, up->modndx, 950 up->tc, up->exing * 1e6 / SECOND, up->freq * 951 1e6 / SECOND, ulfptoa(&pp->lastrec, 6)); 952 pp->lencode = strlen(pp->a_lastcode); 953 up->errflg = 0; 954 if (pp->sloppyclockflag & CLK_FLAG4) { 955 record_clock_stats(&peer->srcadr, 956 pp->a_lastcode); 957 #ifdef DEBUG 958 if (debug) 959 printf("irig %s\n", 960 pp->a_lastcode); 961 #endif /* DEBUG */ 962 } 963 } 964 } 965 up->frmcnt = (up->frmcnt + 1) % FIELD; 966 } 967 968 969 /* 970 * irig_poll - called by the transmit procedure 971 * 972 * This routine sweeps up the timecode updates since the last poll. For 973 * IRIG-B there should be at least 60 updates; for IRIG-E there should 974 * be at least 6. If nothing is heard, a timeout event is declared. 975 */ 976 static void 977 irig_poll( 978 int unit, /* instance number (not used) */ 979 struct peer *peer /* peer structure pointer */ 980 ) 981 { 982 struct refclockproc *pp; 983 984 pp = peer->procptr; 985 986 if (pp->coderecv == pp->codeproc) { 987 refclock_report(peer, CEVNT_TIMEOUT); 988 return; 989 990 } 991 refclock_receive(peer); 992 if (!(pp->sloppyclockflag & CLK_FLAG4)) { 993 record_clock_stats(&peer->srcadr, pp->a_lastcode); 994 #ifdef DEBUG 995 if (debug) 996 printf("irig %s\n", pp->a_lastcode); 997 #endif /* DEBUG */ 998 } 999 pp->polls++; 1000 1001 } 1002 1003 1004 /* 1005 * irig_gain - adjust codec gain 1006 * 1007 * This routine is called at the end of each second. It uses the AGC to 1008 * bradket the maximum signal level between MINAMP and MAXAMP to avoid 1009 * hunting. The routine also jiggles the input port and selectively 1010 * mutes the monitor. 1011 */ 1012 static void 1013 irig_gain( 1014 struct peer *peer /* peer structure pointer */ 1015 ) 1016 { 1017 struct refclockproc *pp; 1018 struct irigunit *up; 1019 1020 pp = peer->procptr; 1021 up = pp->unitptr; 1022 1023 /* 1024 * Apparently, the codec uses only the high order bits of the 1025 * gain control field. Thus, it may take awhile for changes to 1026 * wiggle the hardware bits. 1027 */ 1028 if (up->maxsignal < MINAMP) { 1029 up->gain += 4; 1030 if (up->gain > MAXGAIN) 1031 up->gain = MAXGAIN; 1032 } else if (up->maxsignal > MAXAMP) { 1033 up->gain -= 4; 1034 if (up->gain < 0) 1035 up->gain = 0; 1036 } 1037 audio_gain(up->gain, up->mongain, up->port); 1038 } 1039 1040 1041 #else 1042 NONEMPTY_TRANSLATION_UNIT 1043 #endif /* REFCLOCK */ 1044