xref: /freebsd/sys/dev/rtwn/rtl8192c/pci/r92ce_priv.h (revision 2ff63af9b88c7413b7d71715b5532625752a248e)
1 /*	$OpenBSD: if_rtwnreg.h,v 1.3 2015/06/14 08:02:47 stsp Exp $	*/
2 
3 /*-
4  * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
5  * Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
6  * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  *
20  */
21 
22 #ifndef R92CE_PRIV_H
23 #define R92CE_PRIV_H
24 
25 #include <dev/rtwn/rtl8192c/r92c_priv.h>
26 
27 /*
28  * MAC initialization values.
29  */
30 static const struct rtwn_mac_prog rtl8192ce_mac[] = {
31 	{ 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
32 	{ 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
33 	{ 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
34 	{ 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
35 	{ 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
36 	{ 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
37 	{ 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
38 	{ 0x45b, 0xb9 }, { 0x460, 0x88 }, { 0x461, 0x88 }, { 0x462, 0x06 },
39 	{ 0x463, 0x03 }, { 0x4c8, 0x04 }, { 0x4c9, 0x08 }, { 0x4cc, 0x02 },
40 	{ 0x4cd, 0x28 }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
41 	{ 0x502, 0x2f }, { 0x503, 0x00 }, { 0x504, 0x28 }, { 0x505, 0xa3 },
42 	{ 0x506, 0x5e }, { 0x507, 0x00 }, { 0x508, 0x2b }, { 0x509, 0xa4 },
43 	{ 0x50a, 0x5e }, { 0x50b, 0x00 }, { 0x50c, 0x4f }, { 0x50d, 0xa4 },
44 	{ 0x50e, 0x00 }, { 0x50f, 0x00 }, { 0x512, 0x1c }, { 0x514, 0x0a },
45 	{ 0x515, 0x10 }, { 0x516, 0x0a }, { 0x517, 0x10 }, { 0x51a, 0x16 },
46 	{ 0x524, 0x0f }, { 0x525, 0x4f }, { 0x546, 0x20 }, { 0x547, 0x00 },
47 	{ 0x559, 0x02 }, { 0x55a, 0x02 }, { 0x55d, 0xff }, { 0x605, 0x30 },
48 	{ 0x608, 0x0e }, { 0x609, 0x2a }, { 0x652, 0x20 }, { 0x63c, 0x0a },
49 	{ 0x63d, 0x0e }, { 0x700, 0x21 }, { 0x701, 0x43 }, { 0x702, 0x65 },
50 	{ 0x703, 0x87 }, { 0x708, 0x21 }, { 0x709, 0x43 }, { 0x70a, 0x65 },
51 	{ 0x70b, 0x87 }
52 };
53 
54 /*
55  * Baseband initialization values.
56  */
57 static const uint16_t rtl8192ce_bb_regs0[] = {
58 	0x024, 0x028, 0x800, 0x804, 0x808, 0x80c, 0x810, 0x814, 0x818,
59 	0x81c, 0x820, 0x824, 0x828, 0x82c, 0x830, 0x834, 0x838, 0x83c,
60 	0x840, 0x844, 0x848, 0x84c, 0x850, 0x854, 0x858, 0x85c, 0x860,
61 	0x864, 0x868, 0x86c, 0x870, 0x874, 0x878, 0x87c, 0x880, 0x884,
62 	0x888, 0x88c, 0x890, 0x894, 0x898, 0x89c, 0x900, 0x904, 0x908,
63 	0x90c, 0xa00, 0xa04, 0xa08, 0xa0c, 0xa10, 0xa14, 0xa18, 0xa1c,
64 	0xa20, 0xa24, 0xa28, 0xa2c, 0xa70, 0xa74, 0xc00, 0xc04
65 }, rtl8192ce_bb_regs1[] = {
66 	0xc08, 0xc0c, 0xc10, 0xc14, 0xc18, 0xc1c, 0xc20, 0xc24, 0xc28,
67 	0xc2c, 0xc30, 0xc34, 0xc38, 0xc3c, 0xc40, 0xc44, 0xc48, 0xc4c,
68 	0xc50, 0xc54, 0xc58, 0xc5c, 0xc60, 0xc64, 0xc68, 0xc6c, 0xc70,
69 	0xc74, 0xc78, 0xc7c, 0xc80, 0xc84, 0xc88, 0xc8c, 0xc90, 0xc94,
70 	0xc98, 0xc9c, 0xca0, 0xca4, 0xca8, 0xcac, 0xcb0, 0xcb4, 0xcb8,
71 	0xcbc, 0xcc0, 0xcc4, 0xcc8, 0xccc, 0xcd0, 0xcd4, 0xcd8, 0xcdc,
72 	0xce0, 0xce4, 0xce8, 0xcec, 0xd00
73 };
74 
75 static const uint32_t rtl8192ce_bb_vals0_2t[] = {
76 	0x0011800f, 0x00ffdb83, 0x80040002, 0x00000003, 0x0000fc00,
77 	0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000,
78 	0x01000100, 0x00390004, 0x01000100, 0x00390004, 0x27272727,
79 	0x27272727, 0x27272727, 0x27272727, 0x00010000, 0x00010000,
80 	0x27272727, 0x27272727, 0x00000000, 0x00000000, 0x569a569a,
81 	0x0c1b25a4, 0x66e60230, 0x061f0130, 0x27272727, 0x2b2b2b27,
82 	0x07000700, 0x22184000, 0x08080808, 0x00000000, 0xc0083070,
83 	0x000004d5, 0x00000000, 0xcc0000c0, 0x00000800, 0xfffffffe,
84 	0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000,
85 	0x81121313, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f,
86 	0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000,
87 	0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007,
88 	0x48071d40, 0x03a05633
89 }, rtl8192ce_bb_vals0_1t[] = {
90 	0x0011800f, 0x00ffdb83, 0x80040000, 0x00000001, 0x0000fc00,
91 	0x0000000a, 0x10005388, 0x020c3d10, 0x02200385, 0x00000000,
92 	0x01000100, 0x00390004, 0x00000000, 0x00000000, 0x00000000,
93 	0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000,
94 	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x569a569a,
95 	0x001b25a4, 0x66e60230, 0x061f0130, 0x00000000, 0x32323200,
96 	0x07000700, 0x22004000, 0x00000808, 0x00000000, 0xc0083070,
97 	0x000004d5, 0x00000000, 0xccc000c0, 0x00000800, 0xfffffffe,
98 	0x40302010, 0x00706050, 0x00000000, 0x00000023, 0x00000000,
99 	0x81121111, 0x00d047c8, 0x80ff000c, 0x8c838300, 0x2e68120f,
100 	0x9500bb78, 0x11144028, 0x00881117, 0x89140f00, 0x1a1b0000,
101 	0x090e1317, 0x00000204, 0x00d30000, 0x101fbf00, 0x00000007,
102 	0x48071d40, 0x03a05611
103 }, rtl8192ce_bb_vals1[] = {
104 	0x000000e4, 0x6c6c6c6c, 0x08800000, 0x40000100, 0x08800000,
105 	0x40000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
106 	0x69e9ac44, 0x469652cf, 0x49795994, 0x0a97971c, 0x1f7c403f,
107 	0x000100b7, 0xec020107, 0x007f037f, 0x69543420, 0x43bc0094,
108 	0x69543420, 0x433c0094, 0x00000000, 0x5116848b, 0x47c00bff,
109 	0x00000036, 0x2c7f000d, 0x018610db, 0x0000001f, 0x00b91612,
110 	0x40000100, 0x20f60000, 0x40000100, 0x20200000, 0x00121820,
111 	0x00000000, 0x00121820, 0x00007f7f, 0x00000000, 0x00000080,
112 	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
113 	0x28000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
114 	0x00000000, 0x00000000, 0x64b22427, 0x00766932, 0x00222222,
115 	0x00000000, 0x37644302, 0x2f97d40c, 0x00080740
116 }, rtl8192ce_bb_vals4_1t[] = {
117 	0x00000010, 0x001b25a4, 0x631b25a0, 0x631b25a0, 0x081b25a0,
118 	0x081b25a0, 0x081b25a0, 0x081b25a0, 0x631b25a0, 0x081b25a0,
119 	0x631b25a0, 0x631b25a0, 0x631b25a0, 0x631b25a0, 0x001b25a0,
120 	0x001b25a0, 0x6b1b25a0, 0x00000003, 0x00000000, 0x00000300
121 };
122 
123 static const struct rtwn_bb_prog rtl8192ce_bb[] = {
124 	{
125 		nitems(rtl8192ce_bb_regs0),
126 		rtl8192ce_bb_regs0,
127 		rtl8192ce_bb_vals0_2t,
128 		{ R92C_COND_RTL8192C },
129 		&(const struct rtwn_bb_prog){
130 			nitems(rtl8192ce_bb_regs0),
131 			rtl8192ce_bb_regs0,
132 			rtl8192ce_bb_vals0_1t,
133 			{ 0 },
134 			NULL
135 		}
136 	},
137 	{
138 		nitems(rtl8192ce_bb_regs1),
139 		rtl8192ce_bb_regs1,
140 		rtl8192ce_bb_vals1,
141 		{ 0 },
142 		NULL
143 	},
144 	{
145 		nitems(rtl8192c_bb_regs3),
146 		rtl8192c_bb_regs3,
147 		rtl8192c_bb_vals3_92ce_92cu,
148 		{ R92C_COND_RTL8192C },
149 		&(const struct rtwn_bb_prog){
150 			nitems(rtl8192c_bb_regs3),
151 			rtl8192c_bb_regs3,
152 			rtl8192c_bb_vals3_88cu_88ru,
153 			{ 0 },
154 			NULL
155 		}
156 	},
157 	{
158 		nitems(rtl8192c_bb_regs4),
159 		rtl8192c_bb_regs4,
160 		rtl8192c_bb_vals4,
161 		{ 0 },
162 		NULL
163 	},
164 	{
165 		nitems(rtl8192c_bb_regs5),
166 		rtl8192c_bb_regs5,
167 		rtl8192c_bb_vals5_92ce_92cu,
168 		{ R92C_COND_RTL8192C },
169 		&(const struct rtwn_bb_prog){
170 			nitems(rtl8192c_bb_regs5),
171 			rtl8192c_bb_regs5,
172 			rtl8192ce_bb_vals4_1t,
173 			{ 0 },
174 			NULL
175 		}
176 	}
177 };
178 
179 #endif	/* R92CE_PRIV_H */
180