1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7795-sysc.h> 11 12#define SOC_HAS_HDMI1 13#define SOC_HAS_SATA 14#define SOC_HAS_USB2_CH2 15#define SOC_HAS_USB2_CH3 16 17/ { 18 compatible = "renesas,r8a7795"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 /* 23 * The external audio clocks are configured as 0 Hz fixed frequency 24 * clocks by default. 25 * Boards that provide audio clocks should override them. 26 */ 27 audio_clk_a: audio_clk_a { 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <0>; 31 }; 32 33 audio_clk_b: audio_clk_b { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_c: audio_clk_c { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 /* External CAN clock - to be overridden by boards that provide it */ 46 can_clk: can { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 cluster0_opp: opp-table-0 { 53 compatible = "operating-points-v2"; 54 opp-shared; 55 56 opp-500000000 { 57 opp-hz = /bits/ 64 <500000000>; 58 opp-microvolt = <830000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1000000000 { 62 opp-hz = /bits/ 64 <1000000000>; 63 opp-microvolt = <830000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1500000000 { 67 opp-hz = /bits/ 64 <1500000000>; 68 opp-microvolt = <830000>; 69 clock-latency-ns = <300000>; 70 opp-suspend; 71 }; 72 opp-1600000000 { 73 opp-hz = /bits/ 64 <1600000000>; 74 opp-microvolt = <900000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1700000000 { 78 opp-hz = /bits/ 64 <1700000000>; 79 opp-microvolt = <960000>; 80 clock-latency-ns = <300000>; 81 turbo-mode; 82 }; 83 }; 84 85 cluster1_opp: opp-table-1 { 86 compatible = "operating-points-v2"; 87 opp-shared; 88 89 opp-800000000 { 90 opp-hz = /bits/ 64 <800000000>; 91 opp-microvolt = <820000>; 92 clock-latency-ns = <300000>; 93 }; 94 opp-1000000000 { 95 opp-hz = /bits/ 64 <1000000000>; 96 opp-microvolt = <820000>; 97 clock-latency-ns = <300000>; 98 }; 99 opp-1200000000 { 100 opp-hz = /bits/ 64 <1200000000>; 101 opp-microvolt = <820000>; 102 clock-latency-ns = <300000>; 103 }; 104 }; 105 106 cpus { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 110 cpu-map { 111 cluster0 { 112 core0 { 113 cpu = <&a57_0>; 114 }; 115 core1 { 116 cpu = <&a57_1>; 117 }; 118 core2 { 119 cpu = <&a57_2>; 120 }; 121 core3 { 122 cpu = <&a57_3>; 123 }; 124 }; 125 126 cluster1 { 127 core0 { 128 cpu = <&a53_0>; 129 }; 130 core1 { 131 cpu = <&a53_1>; 132 }; 133 core2 { 134 cpu = <&a53_2>; 135 }; 136 core3 { 137 cpu = <&a53_3>; 138 }; 139 }; 140 }; 141 142 a57_0: cpu@0 { 143 compatible = "arm,cortex-a57"; 144 reg = <0x0>; 145 device_type = "cpu"; 146 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 147 next-level-cache = <&L2_CA57>; 148 enable-method = "psci"; 149 cpu-idle-states = <&CPU_SLEEP_0>; 150 dynamic-power-coefficient = <854>; 151 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 152 operating-points-v2 = <&cluster0_opp>; 153 capacity-dmips-mhz = <1024>; 154 #cooling-cells = <2>; 155 }; 156 157 a57_1: cpu@1 { 158 compatible = "arm,cortex-a57"; 159 reg = <0x1>; 160 device_type = "cpu"; 161 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 162 next-level-cache = <&L2_CA57>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_2: cpu@2 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x2>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a57_3: cpu@3 { 186 compatible = "arm,cortex-a57"; 187 reg = <0x3>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7795_PD_CA57_CPU3>; 190 next-level-cache = <&L2_CA57>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_0>; 193 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 194 operating-points-v2 = <&cluster0_opp>; 195 capacity-dmips-mhz = <1024>; 196 #cooling-cells = <2>; 197 }; 198 199 a53_0: cpu@100 { 200 compatible = "arm,cortex-a53"; 201 reg = <0x100>; 202 device_type = "cpu"; 203 power-domains = <&sysc R8A7795_PD_CA53_CPU0>; 204 next-level-cache = <&L2_CA53>; 205 enable-method = "psci"; 206 cpu-idle-states = <&CPU_SLEEP_1>; 207 #cooling-cells = <2>; 208 dynamic-power-coefficient = <277>; 209 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 210 operating-points-v2 = <&cluster1_opp>; 211 capacity-dmips-mhz = <535>; 212 }; 213 214 a53_1: cpu@101 { 215 compatible = "arm,cortex-a53"; 216 reg = <0x101>; 217 device_type = "cpu"; 218 power-domains = <&sysc R8A7795_PD_CA53_CPU1>; 219 next-level-cache = <&L2_CA53>; 220 enable-method = "psci"; 221 cpu-idle-states = <&CPU_SLEEP_1>; 222 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 223 operating-points-v2 = <&cluster1_opp>; 224 capacity-dmips-mhz = <535>; 225 }; 226 227 a53_2: cpu@102 { 228 compatible = "arm,cortex-a53"; 229 reg = <0x102>; 230 device_type = "cpu"; 231 power-domains = <&sysc R8A7795_PD_CA53_CPU2>; 232 next-level-cache = <&L2_CA53>; 233 enable-method = "psci"; 234 cpu-idle-states = <&CPU_SLEEP_1>; 235 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 236 operating-points-v2 = <&cluster1_opp>; 237 capacity-dmips-mhz = <535>; 238 }; 239 240 a53_3: cpu@103 { 241 compatible = "arm,cortex-a53"; 242 reg = <0x103>; 243 device_type = "cpu"; 244 power-domains = <&sysc R8A7795_PD_CA53_CPU3>; 245 next-level-cache = <&L2_CA53>; 246 enable-method = "psci"; 247 cpu-idle-states = <&CPU_SLEEP_1>; 248 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 249 operating-points-v2 = <&cluster1_opp>; 250 capacity-dmips-mhz = <535>; 251 }; 252 253 L2_CA57: cache-controller-0 { 254 compatible = "cache"; 255 power-domains = <&sysc R8A7795_PD_CA57_SCU>; 256 cache-unified; 257 cache-level = <2>; 258 }; 259 260 L2_CA53: cache-controller-1 { 261 compatible = "cache"; 262 power-domains = <&sysc R8A7795_PD_CA53_SCU>; 263 cache-unified; 264 cache-level = <2>; 265 }; 266 267 idle-states { 268 entry-method = "psci"; 269 270 CPU_SLEEP_0: cpu-sleep-0 { 271 compatible = "arm,idle-state"; 272 arm,psci-suspend-param = <0x0010000>; 273 local-timer-stop; 274 entry-latency-us = <400>; 275 exit-latency-us = <500>; 276 min-residency-us = <4000>; 277 }; 278 279 CPU_SLEEP_1: cpu-sleep-1 { 280 compatible = "arm,idle-state"; 281 arm,psci-suspend-param = <0x0010000>; 282 local-timer-stop; 283 entry-latency-us = <700>; 284 exit-latency-us = <700>; 285 min-residency-us = <5000>; 286 }; 287 }; 288 }; 289 290 extal_clk: extal { 291 compatible = "fixed-clock"; 292 #clock-cells = <0>; 293 /* This value must be overridden by the board */ 294 clock-frequency = <0>; 295 bootph-all; 296 }; 297 298 extalr_clk: extalr { 299 compatible = "fixed-clock"; 300 #clock-cells = <0>; 301 /* This value must be overridden by the board */ 302 clock-frequency = <0>; 303 bootph-all; 304 }; 305 306 /* External PCIe clock - can be overridden by the board */ 307 pcie_bus_clk: pcie_bus { 308 compatible = "fixed-clock"; 309 #clock-cells = <0>; 310 clock-frequency = <0>; 311 }; 312 313 pmu_a53 { 314 compatible = "arm,cortex-a53-pmu"; 315 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 316 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 317 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 318 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 319 interrupt-affinity = <&a53_0>, 320 <&a53_1>, 321 <&a53_2>, 322 <&a53_3>; 323 }; 324 325 pmu_a57 { 326 compatible = "arm,cortex-a57-pmu"; 327 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 328 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 329 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 330 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 331 interrupt-affinity = <&a57_0>, 332 <&a57_1>, 333 <&a57_2>, 334 <&a57_3>; 335 }; 336 337 psci { 338 compatible = "arm,psci-1.0", "arm,psci-0.2"; 339 method = "smc"; 340 }; 341 342 /* External SCIF clock - to be overridden by boards that provide it */ 343 scif_clk: scif { 344 compatible = "fixed-clock"; 345 #clock-cells = <0>; 346 clock-frequency = <0>; 347 }; 348 349 soc: soc { 350 compatible = "simple-bus"; 351 interrupt-parent = <&gic>; 352 bootph-all; 353 354 #address-cells = <2>; 355 #size-cells = <2>; 356 ranges; 357 358 rwdt: watchdog@e6020000 { 359 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 360 reg = <0 0xe6020000 0 0x0c>; 361 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 402>; 363 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 364 resets = <&cpg 402>; 365 status = "disabled"; 366 }; 367 368 gpio0: gpio@e6050000 { 369 compatible = "renesas,gpio-r8a7795", 370 "renesas,rcar-gen3-gpio"; 371 reg = <0 0xe6050000 0 0x50>; 372 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 373 #gpio-cells = <2>; 374 gpio-controller; 375 gpio-ranges = <&pfc 0 0 16>; 376 #interrupt-cells = <2>; 377 interrupt-controller; 378 clocks = <&cpg CPG_MOD 912>; 379 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 380 resets = <&cpg 912>; 381 }; 382 383 gpio1: gpio@e6051000 { 384 compatible = "renesas,gpio-r8a7795", 385 "renesas,rcar-gen3-gpio"; 386 reg = <0 0xe6051000 0 0x50>; 387 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 388 #gpio-cells = <2>; 389 gpio-controller; 390 gpio-ranges = <&pfc 0 32 29>; 391 #interrupt-cells = <2>; 392 interrupt-controller; 393 clocks = <&cpg CPG_MOD 911>; 394 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 395 resets = <&cpg 911>; 396 }; 397 398 gpio2: gpio@e6052000 { 399 compatible = "renesas,gpio-r8a7795", 400 "renesas,rcar-gen3-gpio"; 401 reg = <0 0xe6052000 0 0x50>; 402 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 403 #gpio-cells = <2>; 404 gpio-controller; 405 gpio-ranges = <&pfc 0 64 15>; 406 #interrupt-cells = <2>; 407 interrupt-controller; 408 clocks = <&cpg CPG_MOD 910>; 409 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 410 resets = <&cpg 910>; 411 }; 412 413 gpio3: gpio@e6053000 { 414 compatible = "renesas,gpio-r8a7795", 415 "renesas,rcar-gen3-gpio"; 416 reg = <0 0xe6053000 0 0x50>; 417 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 418 #gpio-cells = <2>; 419 gpio-controller; 420 gpio-ranges = <&pfc 0 96 16>; 421 #interrupt-cells = <2>; 422 interrupt-controller; 423 clocks = <&cpg CPG_MOD 909>; 424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 425 resets = <&cpg 909>; 426 }; 427 428 gpio4: gpio@e6054000 { 429 compatible = "renesas,gpio-r8a7795", 430 "renesas,rcar-gen3-gpio"; 431 reg = <0 0xe6054000 0 0x50>; 432 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 433 #gpio-cells = <2>; 434 gpio-controller; 435 gpio-ranges = <&pfc 0 128 18>; 436 #interrupt-cells = <2>; 437 interrupt-controller; 438 clocks = <&cpg CPG_MOD 908>; 439 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 440 resets = <&cpg 908>; 441 }; 442 443 gpio5: gpio@e6055000 { 444 compatible = "renesas,gpio-r8a7795", 445 "renesas,rcar-gen3-gpio"; 446 reg = <0 0xe6055000 0 0x50>; 447 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 448 #gpio-cells = <2>; 449 gpio-controller; 450 gpio-ranges = <&pfc 0 160 26>; 451 #interrupt-cells = <2>; 452 interrupt-controller; 453 clocks = <&cpg CPG_MOD 907>; 454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 455 resets = <&cpg 907>; 456 }; 457 458 gpio6: gpio@e6055400 { 459 compatible = "renesas,gpio-r8a7795", 460 "renesas,rcar-gen3-gpio"; 461 reg = <0 0xe6055400 0 0x50>; 462 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 463 #gpio-cells = <2>; 464 gpio-controller; 465 gpio-ranges = <&pfc 0 192 32>; 466 #interrupt-cells = <2>; 467 interrupt-controller; 468 clocks = <&cpg CPG_MOD 906>; 469 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 470 resets = <&cpg 906>; 471 }; 472 473 gpio7: gpio@e6055800 { 474 compatible = "renesas,gpio-r8a7795", 475 "renesas,rcar-gen3-gpio"; 476 reg = <0 0xe6055800 0 0x50>; 477 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 478 #gpio-cells = <2>; 479 gpio-controller; 480 gpio-ranges = <&pfc 0 224 4>; 481 #interrupt-cells = <2>; 482 interrupt-controller; 483 clocks = <&cpg CPG_MOD 905>; 484 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 485 resets = <&cpg 905>; 486 }; 487 488 pfc: pinctrl@e6060000 { 489 compatible = "renesas,pfc-r8a7795"; 490 reg = <0 0xe6060000 0 0x50c>; 491 bootph-all; 492 }; 493 494 cmt0: timer@e60f0000 { 495 compatible = "renesas,r8a7795-cmt0", 496 "renesas,rcar-gen3-cmt0"; 497 reg = <0 0xe60f0000 0 0x1004>; 498 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 500 clocks = <&cpg CPG_MOD 303>; 501 clock-names = "fck"; 502 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 503 resets = <&cpg 303>; 504 status = "disabled"; 505 }; 506 507 cmt1: timer@e6130000 { 508 compatible = "renesas,r8a7795-cmt1", 509 "renesas,rcar-gen3-cmt1"; 510 reg = <0 0xe6130000 0 0x1004>; 511 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 302>; 520 clock-names = "fck"; 521 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 522 resets = <&cpg 302>; 523 status = "disabled"; 524 }; 525 526 cmt2: timer@e6140000 { 527 compatible = "renesas,r8a7795-cmt1", 528 "renesas,rcar-gen3-cmt1"; 529 reg = <0 0xe6140000 0 0x1004>; 530 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 534 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 535 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 537 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 538 clocks = <&cpg CPG_MOD 301>; 539 clock-names = "fck"; 540 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 541 resets = <&cpg 301>; 542 status = "disabled"; 543 }; 544 545 cmt3: timer@e6148000 { 546 compatible = "renesas,r8a7795-cmt1", 547 "renesas,rcar-gen3-cmt1"; 548 reg = <0 0xe6148000 0 0x1004>; 549 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 550 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 551 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 552 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 555 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 556 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 557 clocks = <&cpg CPG_MOD 300>; 558 clock-names = "fck"; 559 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 560 resets = <&cpg 300>; 561 status = "disabled"; 562 }; 563 564 cpg: clock-controller@e6150000 { 565 compatible = "renesas,r8a7795-cpg-mssr"; 566 reg = <0 0xe6150000 0 0x1000>; 567 clocks = <&extal_clk>, <&extalr_clk>; 568 clock-names = "extal", "extalr"; 569 #clock-cells = <2>; 570 #power-domain-cells = <0>; 571 #reset-cells = <1>; 572 bootph-all; 573 }; 574 575 rst: reset-controller@e6160000 { 576 compatible = "renesas,r8a7795-rst"; 577 reg = <0 0xe6160000 0 0x0200>; 578 bootph-all; 579 }; 580 581 sysc: system-controller@e6180000 { 582 compatible = "renesas,r8a7795-sysc"; 583 reg = <0 0xe6180000 0 0x0400>; 584 #power-domain-cells = <1>; 585 }; 586 587 tsc: thermal@e6198000 { 588 compatible = "renesas,r8a7795-thermal"; 589 reg = <0 0xe6198000 0 0x100>, 590 <0 0xe61a0000 0 0x100>, 591 <0 0xe61a8000 0 0x100>; 592 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 593 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 522>; 596 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 597 resets = <&cpg 522>; 598 #thermal-sensor-cells = <1>; 599 }; 600 601 intc_ex: interrupt-controller@e61c0000 { 602 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; 603 #interrupt-cells = <2>; 604 interrupt-controller; 605 reg = <0 0xe61c0000 0 0x200>; 606 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 609 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 611 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 407>; 613 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 614 resets = <&cpg 407>; 615 }; 616 617 tmu0: timer@e61e0000 { 618 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 619 reg = <0 0xe61e0000 0 0x30>; 620 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 623 interrupt-names = "tuni0", "tuni1", "tuni2"; 624 clocks = <&cpg CPG_MOD 125>; 625 clock-names = "fck"; 626 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 627 resets = <&cpg 125>; 628 status = "disabled"; 629 }; 630 631 tmu1: timer@e6fc0000 { 632 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 633 reg = <0 0xe6fc0000 0 0x30>; 634 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 638 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 639 clocks = <&cpg CPG_MOD 124>; 640 clock-names = "fck"; 641 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 642 resets = <&cpg 124>; 643 status = "disabled"; 644 }; 645 646 tmu2: timer@e6fd0000 { 647 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 648 reg = <0 0xe6fd0000 0 0x30>; 649 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 653 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 654 clocks = <&cpg CPG_MOD 123>; 655 clock-names = "fck"; 656 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 657 resets = <&cpg 123>; 658 status = "disabled"; 659 }; 660 661 tmu3: timer@e6fe0000 { 662 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 663 reg = <0 0xe6fe0000 0 0x30>; 664 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 667 interrupt-names = "tuni0", "tuni1", "tuni2"; 668 clocks = <&cpg CPG_MOD 122>; 669 clock-names = "fck"; 670 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 671 resets = <&cpg 122>; 672 status = "disabled"; 673 }; 674 675 tmu4: timer@ffc00000 { 676 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 677 reg = <0 0xffc00000 0 0x30>; 678 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 681 interrupt-names = "tuni0", "tuni1", "tuni2"; 682 clocks = <&cpg CPG_MOD 121>; 683 clock-names = "fck"; 684 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 685 resets = <&cpg 121>; 686 status = "disabled"; 687 }; 688 689 i2c0: i2c@e6500000 { 690 #address-cells = <1>; 691 #size-cells = <0>; 692 compatible = "renesas,i2c-r8a7795", 693 "renesas,rcar-gen3-i2c"; 694 reg = <0 0xe6500000 0 0x40>; 695 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 931>; 697 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 698 resets = <&cpg 931>; 699 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 700 <&dmac2 0x91>, <&dmac2 0x90>; 701 dma-names = "tx", "rx", "tx", "rx"; 702 i2c-scl-internal-delay-ns = <110>; 703 status = "disabled"; 704 }; 705 706 i2c1: i2c@e6508000 { 707 #address-cells = <1>; 708 #size-cells = <0>; 709 compatible = "renesas,i2c-r8a7795", 710 "renesas,rcar-gen3-i2c"; 711 reg = <0 0xe6508000 0 0x40>; 712 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 930>; 714 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 715 resets = <&cpg 930>; 716 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 717 <&dmac2 0x93>, <&dmac2 0x92>; 718 dma-names = "tx", "rx", "tx", "rx"; 719 i2c-scl-internal-delay-ns = <6>; 720 status = "disabled"; 721 }; 722 723 i2c2: i2c@e6510000 { 724 #address-cells = <1>; 725 #size-cells = <0>; 726 compatible = "renesas,i2c-r8a7795", 727 "renesas,rcar-gen3-i2c"; 728 reg = <0 0xe6510000 0 0x40>; 729 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 730 clocks = <&cpg CPG_MOD 929>; 731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 732 resets = <&cpg 929>; 733 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 734 <&dmac2 0x95>, <&dmac2 0x94>; 735 dma-names = "tx", "rx", "tx", "rx"; 736 i2c-scl-internal-delay-ns = <6>; 737 status = "disabled"; 738 }; 739 740 i2c3: i2c@e66d0000 { 741 #address-cells = <1>; 742 #size-cells = <0>; 743 compatible = "renesas,i2c-r8a7795", 744 "renesas,rcar-gen3-i2c"; 745 reg = <0 0xe66d0000 0 0x40>; 746 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 928>; 748 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 749 resets = <&cpg 928>; 750 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 751 dma-names = "tx", "rx"; 752 i2c-scl-internal-delay-ns = <110>; 753 status = "disabled"; 754 }; 755 756 i2c4: i2c@e66d8000 { 757 #address-cells = <1>; 758 #size-cells = <0>; 759 compatible = "renesas,i2c-r8a7795", 760 "renesas,rcar-gen3-i2c"; 761 reg = <0 0xe66d8000 0 0x40>; 762 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 763 clocks = <&cpg CPG_MOD 927>; 764 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 765 resets = <&cpg 927>; 766 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 767 dma-names = "tx", "rx"; 768 i2c-scl-internal-delay-ns = <110>; 769 status = "disabled"; 770 }; 771 772 i2c5: i2c@e66e0000 { 773 #address-cells = <1>; 774 #size-cells = <0>; 775 compatible = "renesas,i2c-r8a7795", 776 "renesas,rcar-gen3-i2c"; 777 reg = <0 0xe66e0000 0 0x40>; 778 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 779 clocks = <&cpg CPG_MOD 919>; 780 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 781 resets = <&cpg 919>; 782 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 783 dma-names = "tx", "rx"; 784 i2c-scl-internal-delay-ns = <110>; 785 status = "disabled"; 786 }; 787 788 i2c6: i2c@e66e8000 { 789 #address-cells = <1>; 790 #size-cells = <0>; 791 compatible = "renesas,i2c-r8a7795", 792 "renesas,rcar-gen3-i2c"; 793 reg = <0 0xe66e8000 0 0x40>; 794 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 795 clocks = <&cpg CPG_MOD 918>; 796 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 797 resets = <&cpg 918>; 798 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 799 dma-names = "tx", "rx"; 800 i2c-scl-internal-delay-ns = <6>; 801 status = "disabled"; 802 }; 803 804 i2c_dvfs: i2c@e60b0000 { 805 #address-cells = <1>; 806 #size-cells = <0>; 807 compatible = "renesas,iic-r8a7795", 808 "renesas,rcar-gen3-iic", 809 "renesas,rmobile-iic"; 810 reg = <0 0xe60b0000 0 0x425>; 811 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 812 clocks = <&cpg CPG_MOD 926>; 813 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 814 resets = <&cpg 926>; 815 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 816 dma-names = "tx", "rx"; 817 status = "disabled"; 818 }; 819 820 hscif0: serial@e6540000 { 821 compatible = "renesas,hscif-r8a7795", 822 "renesas,rcar-gen3-hscif", 823 "renesas,hscif"; 824 reg = <0 0xe6540000 0 96>; 825 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 826 clocks = <&cpg CPG_MOD 520>, 827 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 828 <&scif_clk>; 829 clock-names = "fck", "brg_int", "scif_clk"; 830 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 831 <&dmac2 0x31>, <&dmac2 0x30>; 832 dma-names = "tx", "rx", "tx", "rx"; 833 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 834 resets = <&cpg 520>; 835 status = "disabled"; 836 }; 837 838 hscif1: serial@e6550000 { 839 compatible = "renesas,hscif-r8a7795", 840 "renesas,rcar-gen3-hscif", 841 "renesas,hscif"; 842 reg = <0 0xe6550000 0 96>; 843 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 844 clocks = <&cpg CPG_MOD 519>, 845 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 846 <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 849 <&dmac2 0x33>, <&dmac2 0x32>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 852 resets = <&cpg 519>; 853 status = "disabled"; 854 }; 855 856 hscif2: serial@e6560000 { 857 compatible = "renesas,hscif-r8a7795", 858 "renesas,rcar-gen3-hscif", 859 "renesas,hscif"; 860 reg = <0 0xe6560000 0 96>; 861 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 862 clocks = <&cpg CPG_MOD 518>, 863 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 864 <&scif_clk>; 865 clock-names = "fck", "brg_int", "scif_clk"; 866 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 867 <&dmac2 0x35>, <&dmac2 0x34>; 868 dma-names = "tx", "rx", "tx", "rx"; 869 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 870 resets = <&cpg 518>; 871 status = "disabled"; 872 }; 873 874 hscif3: serial@e66a0000 { 875 compatible = "renesas,hscif-r8a7795", 876 "renesas,rcar-gen3-hscif", 877 "renesas,hscif"; 878 reg = <0 0xe66a0000 0 96>; 879 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 880 clocks = <&cpg CPG_MOD 517>, 881 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 882 <&scif_clk>; 883 clock-names = "fck", "brg_int", "scif_clk"; 884 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 885 dma-names = "tx", "rx"; 886 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 887 resets = <&cpg 517>; 888 status = "disabled"; 889 }; 890 891 hscif4: serial@e66b0000 { 892 compatible = "renesas,hscif-r8a7795", 893 "renesas,rcar-gen3-hscif", 894 "renesas,hscif"; 895 reg = <0 0xe66b0000 0 96>; 896 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 897 clocks = <&cpg CPG_MOD 516>, 898 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 899 <&scif_clk>; 900 clock-names = "fck", "brg_int", "scif_clk"; 901 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 902 dma-names = "tx", "rx"; 903 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 904 resets = <&cpg 516>; 905 status = "disabled"; 906 }; 907 908 hsusb: usb@e6590000 { 909 compatible = "renesas,usbhs-r8a7795", 910 "renesas,rcar-gen3-usbhs"; 911 reg = <0 0xe6590000 0 0x200>; 912 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 913 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 914 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 915 <&usb_dmac1 0>, <&usb_dmac1 1>; 916 dma-names = "ch0", "ch1", "ch2", "ch3"; 917 renesas,buswait = <11>; 918 phys = <&usb2_phy0 3>; 919 phy-names = "usb"; 920 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 921 resets = <&cpg 704>, <&cpg 703>; 922 status = "disabled"; 923 }; 924 925 hsusb3: usb@e659c000 { 926 compatible = "renesas,usbhs-r8a7795", 927 "renesas,rcar-gen3-usbhs"; 928 reg = <0 0xe659c000 0 0x200>; 929 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 930 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>; 931 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, 932 <&usb_dmac3 0>, <&usb_dmac3 1>; 933 dma-names = "ch0", "ch1", "ch2", "ch3"; 934 renesas,buswait = <11>; 935 phys = <&usb2_phy3 3>; 936 phy-names = "usb"; 937 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 938 resets = <&cpg 705>, <&cpg 700>; 939 status = "disabled"; 940 }; 941 942 usb_dmac0: dma-controller@e65a0000 { 943 compatible = "renesas,r8a7795-usb-dmac", 944 "renesas,usb-dmac"; 945 reg = <0 0xe65a0000 0 0x100>; 946 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 948 interrupt-names = "ch0", "ch1"; 949 clocks = <&cpg CPG_MOD 330>; 950 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 951 resets = <&cpg 330>; 952 #dma-cells = <1>; 953 dma-channels = <2>; 954 }; 955 956 usb_dmac1: dma-controller@e65b0000 { 957 compatible = "renesas,r8a7795-usb-dmac", 958 "renesas,usb-dmac"; 959 reg = <0 0xe65b0000 0 0x100>; 960 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 962 interrupt-names = "ch0", "ch1"; 963 clocks = <&cpg CPG_MOD 331>; 964 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 965 resets = <&cpg 331>; 966 #dma-cells = <1>; 967 dma-channels = <2>; 968 }; 969 970 usb_dmac2: dma-controller@e6460000 { 971 compatible = "renesas,r8a7795-usb-dmac", 972 "renesas,usb-dmac"; 973 reg = <0 0xe6460000 0 0x100>; 974 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 976 interrupt-names = "ch0", "ch1"; 977 clocks = <&cpg CPG_MOD 326>; 978 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 979 resets = <&cpg 326>; 980 #dma-cells = <1>; 981 dma-channels = <2>; 982 }; 983 984 usb_dmac3: dma-controller@e6470000 { 985 compatible = "renesas,r8a7795-usb-dmac", 986 "renesas,usb-dmac"; 987 reg = <0 0xe6470000 0 0x100>; 988 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 990 interrupt-names = "ch0", "ch1"; 991 clocks = <&cpg CPG_MOD 329>; 992 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 993 resets = <&cpg 329>; 994 #dma-cells = <1>; 995 dma-channels = <2>; 996 }; 997 998 usb3_phy0: usb-phy@e65ee000 { 999 compatible = "renesas,r8a7795-usb3-phy", 1000 "renesas,rcar-gen3-usb3-phy"; 1001 reg = <0 0xe65ee000 0 0x90>; 1002 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 1003 <&usb_extal_clk>; 1004 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 1005 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1006 resets = <&cpg 328>; 1007 #phy-cells = <0>; 1008 status = "disabled"; 1009 }; 1010 1011 arm_cc630p: crypto@e6601000 { 1012 compatible = "arm,cryptocell-630p-ree"; 1013 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 1014 reg = <0x0 0xe6601000 0 0x1000>; 1015 clocks = <&cpg CPG_MOD 229>; 1016 resets = <&cpg 229>; 1017 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1018 }; 1019 1020 dmac0: dma-controller@e6700000 { 1021 compatible = "renesas,dmac-r8a7795", 1022 "renesas,rcar-dmac"; 1023 reg = <0 0xe6700000 0 0x10000>; 1024 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 1041 interrupt-names = "error", 1042 "ch0", "ch1", "ch2", "ch3", 1043 "ch4", "ch5", "ch6", "ch7", 1044 "ch8", "ch9", "ch10", "ch11", 1045 "ch12", "ch13", "ch14", "ch15"; 1046 clocks = <&cpg CPG_MOD 219>; 1047 clock-names = "fck"; 1048 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1049 resets = <&cpg 219>; 1050 #dma-cells = <1>; 1051 dma-channels = <16>; 1052 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1053 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1054 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1055 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1056 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1057 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1058 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1059 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1060 }; 1061 1062 dmac1: dma-controller@e7300000 { 1063 compatible = "renesas,dmac-r8a7795", 1064 "renesas,rcar-dmac"; 1065 reg = <0 0xe7300000 0 0x10000>; 1066 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1070 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1071 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1072 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1073 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1074 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1075 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1081 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1082 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1083 interrupt-names = "error", 1084 "ch0", "ch1", "ch2", "ch3", 1085 "ch4", "ch5", "ch6", "ch7", 1086 "ch8", "ch9", "ch10", "ch11", 1087 "ch12", "ch13", "ch14", "ch15"; 1088 clocks = <&cpg CPG_MOD 218>; 1089 clock-names = "fck"; 1090 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1091 resets = <&cpg 218>; 1092 #dma-cells = <1>; 1093 dma-channels = <16>; 1094 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1095 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1096 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1097 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1098 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1099 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1100 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1101 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1102 }; 1103 1104 dmac2: dma-controller@e7310000 { 1105 compatible = "renesas,dmac-r8a7795", 1106 "renesas,rcar-dmac"; 1107 reg = <0 0xe7310000 0 0x10000>; 1108 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1109 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1110 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1111 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1112 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1113 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1114 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1118 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1119 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1120 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1121 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1122 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1124 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1125 interrupt-names = "error", 1126 "ch0", "ch1", "ch2", "ch3", 1127 "ch4", "ch5", "ch6", "ch7", 1128 "ch8", "ch9", "ch10", "ch11", 1129 "ch12", "ch13", "ch14", "ch15"; 1130 clocks = <&cpg CPG_MOD 217>; 1131 clock-names = "fck"; 1132 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1133 resets = <&cpg 217>; 1134 #dma-cells = <1>; 1135 dma-channels = <16>; 1136 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1137 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1138 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1139 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1140 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1141 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1142 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1143 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1144 }; 1145 1146 ipmmu_ds0: iommu@e6740000 { 1147 compatible = "renesas,ipmmu-r8a7795"; 1148 reg = <0 0xe6740000 0 0x1000>; 1149 renesas,ipmmu-main = <&ipmmu_mm 0>; 1150 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1151 #iommu-cells = <1>; 1152 }; 1153 1154 ipmmu_ds1: iommu@e7740000 { 1155 compatible = "renesas,ipmmu-r8a7795"; 1156 reg = <0 0xe7740000 0 0x1000>; 1157 renesas,ipmmu-main = <&ipmmu_mm 1>; 1158 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1159 #iommu-cells = <1>; 1160 }; 1161 1162 ipmmu_hc: iommu@e6570000 { 1163 compatible = "renesas,ipmmu-r8a7795"; 1164 reg = <0 0xe6570000 0 0x1000>; 1165 renesas,ipmmu-main = <&ipmmu_mm 2>; 1166 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1167 #iommu-cells = <1>; 1168 }; 1169 1170 ipmmu_ir: iommu@ff8b0000 { 1171 compatible = "renesas,ipmmu-r8a7795"; 1172 reg = <0 0xff8b0000 0 0x1000>; 1173 renesas,ipmmu-main = <&ipmmu_mm 3>; 1174 power-domains = <&sysc R8A7795_PD_A3IR>; 1175 #iommu-cells = <1>; 1176 }; 1177 1178 ipmmu_mm: iommu@e67b0000 { 1179 compatible = "renesas,ipmmu-r8a7795"; 1180 reg = <0 0xe67b0000 0 0x1000>; 1181 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1183 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1184 #iommu-cells = <1>; 1185 }; 1186 1187 ipmmu_mp0: iommu@ec670000 { 1188 compatible = "renesas,ipmmu-r8a7795"; 1189 reg = <0 0xec670000 0 0x1000>; 1190 renesas,ipmmu-main = <&ipmmu_mm 4>; 1191 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1192 #iommu-cells = <1>; 1193 }; 1194 1195 ipmmu_pv0: iommu@fd800000 { 1196 compatible = "renesas,ipmmu-r8a7795"; 1197 reg = <0 0xfd800000 0 0x1000>; 1198 renesas,ipmmu-main = <&ipmmu_mm 6>; 1199 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1200 #iommu-cells = <1>; 1201 }; 1202 1203 ipmmu_pv1: iommu@fd950000 { 1204 compatible = "renesas,ipmmu-r8a7795"; 1205 reg = <0 0xfd950000 0 0x1000>; 1206 renesas,ipmmu-main = <&ipmmu_mm 7>; 1207 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1208 #iommu-cells = <1>; 1209 }; 1210 1211 ipmmu_pv2: iommu@fd960000 { 1212 compatible = "renesas,ipmmu-r8a7795"; 1213 reg = <0 0xfd960000 0 0x1000>; 1214 renesas,ipmmu-main = <&ipmmu_mm 8>; 1215 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1216 #iommu-cells = <1>; 1217 }; 1218 1219 ipmmu_pv3: iommu@fd970000 { 1220 compatible = "renesas,ipmmu-r8a7795"; 1221 reg = <0 0xfd970000 0 0x1000>; 1222 renesas,ipmmu-main = <&ipmmu_mm 9>; 1223 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1224 #iommu-cells = <1>; 1225 }; 1226 1227 ipmmu_rt: iommu@ffc80000 { 1228 compatible = "renesas,ipmmu-r8a7795"; 1229 reg = <0 0xffc80000 0 0x1000>; 1230 renesas,ipmmu-main = <&ipmmu_mm 10>; 1231 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1232 #iommu-cells = <1>; 1233 }; 1234 1235 ipmmu_vc0: iommu@fe6b0000 { 1236 compatible = "renesas,ipmmu-r8a7795"; 1237 reg = <0 0xfe6b0000 0 0x1000>; 1238 renesas,ipmmu-main = <&ipmmu_mm 12>; 1239 power-domains = <&sysc R8A7795_PD_A3VC>; 1240 #iommu-cells = <1>; 1241 }; 1242 1243 ipmmu_vc1: iommu@fe6f0000 { 1244 compatible = "renesas,ipmmu-r8a7795"; 1245 reg = <0 0xfe6f0000 0 0x1000>; 1246 renesas,ipmmu-main = <&ipmmu_mm 13>; 1247 power-domains = <&sysc R8A7795_PD_A3VC>; 1248 #iommu-cells = <1>; 1249 }; 1250 1251 ipmmu_vi0: iommu@febd0000 { 1252 compatible = "renesas,ipmmu-r8a7795"; 1253 reg = <0 0xfebd0000 0 0x1000>; 1254 renesas,ipmmu-main = <&ipmmu_mm 14>; 1255 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1256 #iommu-cells = <1>; 1257 }; 1258 1259 ipmmu_vi1: iommu@febe0000 { 1260 compatible = "renesas,ipmmu-r8a7795"; 1261 reg = <0 0xfebe0000 0 0x1000>; 1262 renesas,ipmmu-main = <&ipmmu_mm 15>; 1263 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1264 #iommu-cells = <1>; 1265 }; 1266 1267 ipmmu_vp0: iommu@fe990000 { 1268 compatible = "renesas,ipmmu-r8a7795"; 1269 reg = <0 0xfe990000 0 0x1000>; 1270 renesas,ipmmu-main = <&ipmmu_mm 16>; 1271 power-domains = <&sysc R8A7795_PD_A3VP>; 1272 #iommu-cells = <1>; 1273 }; 1274 1275 ipmmu_vp1: iommu@fe980000 { 1276 compatible = "renesas,ipmmu-r8a7795"; 1277 reg = <0 0xfe980000 0 0x1000>; 1278 renesas,ipmmu-main = <&ipmmu_mm 17>; 1279 power-domains = <&sysc R8A7795_PD_A3VP>; 1280 #iommu-cells = <1>; 1281 }; 1282 1283 avb: ethernet@e6800000 { 1284 compatible = "renesas,etheravb-r8a7795", 1285 "renesas,etheravb-rcar-gen3"; 1286 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1287 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1288 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1289 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1290 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1291 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1292 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1293 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1294 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1295 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1296 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1297 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1298 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1299 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1300 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1301 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1302 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1303 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1304 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1305 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1306 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1307 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1308 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1309 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1310 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1311 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1312 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1313 "ch4", "ch5", "ch6", "ch7", 1314 "ch8", "ch9", "ch10", "ch11", 1315 "ch12", "ch13", "ch14", "ch15", 1316 "ch16", "ch17", "ch18", "ch19", 1317 "ch20", "ch21", "ch22", "ch23", 1318 "ch24"; 1319 clocks = <&cpg CPG_MOD 812>; 1320 clock-names = "fck"; 1321 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1322 resets = <&cpg 812>; 1323 phy-mode = "rgmii"; 1324 rx-internal-delay-ps = <0>; 1325 tx-internal-delay-ps = <0>; 1326 iommus = <&ipmmu_ds0 16>; 1327 #address-cells = <1>; 1328 #size-cells = <0>; 1329 status = "disabled"; 1330 }; 1331 1332 can0: can@e6c30000 { 1333 compatible = "renesas,can-r8a7795", 1334 "renesas,rcar-gen3-can"; 1335 reg = <0 0xe6c30000 0 0x1000>; 1336 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 916>, 1338 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1339 <&can_clk>; 1340 clock-names = "clkp1", "clkp2", "can_clk"; 1341 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1342 assigned-clock-rates = <40000000>; 1343 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1344 resets = <&cpg 916>; 1345 status = "disabled"; 1346 }; 1347 1348 can1: can@e6c38000 { 1349 compatible = "renesas,can-r8a7795", 1350 "renesas,rcar-gen3-can"; 1351 reg = <0 0xe6c38000 0 0x1000>; 1352 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1353 clocks = <&cpg CPG_MOD 915>, 1354 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1355 <&can_clk>; 1356 clock-names = "clkp1", "clkp2", "can_clk"; 1357 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1358 assigned-clock-rates = <40000000>; 1359 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1360 resets = <&cpg 915>; 1361 status = "disabled"; 1362 }; 1363 1364 canfd: can@e66c0000 { 1365 compatible = "renesas,r8a7795-canfd", 1366 "renesas,rcar-gen3-canfd"; 1367 reg = <0 0xe66c0000 0 0x8000>; 1368 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1369 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1370 interrupt-names = "ch_int", "g_int"; 1371 clocks = <&cpg CPG_MOD 914>, 1372 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1373 <&can_clk>; 1374 clock-names = "fck", "canfd", "can_clk"; 1375 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1376 assigned-clock-rates = <40000000>; 1377 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1378 resets = <&cpg 914>; 1379 status = "disabled"; 1380 1381 channel0 { 1382 status = "disabled"; 1383 }; 1384 1385 channel1 { 1386 status = "disabled"; 1387 }; 1388 }; 1389 1390 pwm0: pwm@e6e30000 { 1391 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1392 reg = <0 0xe6e30000 0 0x8>; 1393 clocks = <&cpg CPG_MOD 523>; 1394 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1395 resets = <&cpg 523>; 1396 #pwm-cells = <2>; 1397 status = "disabled"; 1398 }; 1399 1400 pwm1: pwm@e6e31000 { 1401 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1402 reg = <0 0xe6e31000 0 0x8>; 1403 clocks = <&cpg CPG_MOD 523>; 1404 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1405 resets = <&cpg 523>; 1406 #pwm-cells = <2>; 1407 status = "disabled"; 1408 }; 1409 1410 pwm2: pwm@e6e32000 { 1411 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1412 reg = <0 0xe6e32000 0 0x8>; 1413 clocks = <&cpg CPG_MOD 523>; 1414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1415 resets = <&cpg 523>; 1416 #pwm-cells = <2>; 1417 status = "disabled"; 1418 }; 1419 1420 pwm3: pwm@e6e33000 { 1421 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1422 reg = <0 0xe6e33000 0 0x8>; 1423 clocks = <&cpg CPG_MOD 523>; 1424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1425 resets = <&cpg 523>; 1426 #pwm-cells = <2>; 1427 status = "disabled"; 1428 }; 1429 1430 pwm4: pwm@e6e34000 { 1431 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1432 reg = <0 0xe6e34000 0 0x8>; 1433 clocks = <&cpg CPG_MOD 523>; 1434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1435 resets = <&cpg 523>; 1436 #pwm-cells = <2>; 1437 status = "disabled"; 1438 }; 1439 1440 pwm5: pwm@e6e35000 { 1441 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1442 reg = <0 0xe6e35000 0 0x8>; 1443 clocks = <&cpg CPG_MOD 523>; 1444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1445 resets = <&cpg 523>; 1446 #pwm-cells = <2>; 1447 status = "disabled"; 1448 }; 1449 1450 pwm6: pwm@e6e36000 { 1451 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1452 reg = <0 0xe6e36000 0 0x8>; 1453 clocks = <&cpg CPG_MOD 523>; 1454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1455 resets = <&cpg 523>; 1456 #pwm-cells = <2>; 1457 status = "disabled"; 1458 }; 1459 1460 scif0: serial@e6e60000 { 1461 compatible = "renesas,scif-r8a7795", 1462 "renesas,rcar-gen3-scif", "renesas,scif"; 1463 reg = <0 0xe6e60000 0 64>; 1464 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 207>, 1466 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1467 <&scif_clk>; 1468 clock-names = "fck", "brg_int", "scif_clk"; 1469 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1470 <&dmac2 0x51>, <&dmac2 0x50>; 1471 dma-names = "tx", "rx", "tx", "rx"; 1472 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1473 resets = <&cpg 207>; 1474 status = "disabled"; 1475 }; 1476 1477 scif1: serial@e6e68000 { 1478 compatible = "renesas,scif-r8a7795", 1479 "renesas,rcar-gen3-scif", "renesas,scif"; 1480 reg = <0 0xe6e68000 0 64>; 1481 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1482 clocks = <&cpg CPG_MOD 206>, 1483 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1484 <&scif_clk>; 1485 clock-names = "fck", "brg_int", "scif_clk"; 1486 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1487 <&dmac2 0x53>, <&dmac2 0x52>; 1488 dma-names = "tx", "rx", "tx", "rx"; 1489 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1490 resets = <&cpg 206>; 1491 status = "disabled"; 1492 }; 1493 1494 scif2: serial@e6e88000 { 1495 compatible = "renesas,scif-r8a7795", 1496 "renesas,rcar-gen3-scif", "renesas,scif"; 1497 reg = <0 0xe6e88000 0 64>; 1498 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1499 clocks = <&cpg CPG_MOD 310>, 1500 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1501 <&scif_clk>; 1502 clock-names = "fck", "brg_int", "scif_clk"; 1503 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1504 <&dmac2 0x13>, <&dmac2 0x12>; 1505 dma-names = "tx", "rx", "tx", "rx"; 1506 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1507 resets = <&cpg 310>; 1508 status = "disabled"; 1509 }; 1510 1511 scif3: serial@e6c50000 { 1512 compatible = "renesas,scif-r8a7795", 1513 "renesas,rcar-gen3-scif", "renesas,scif"; 1514 reg = <0 0xe6c50000 0 64>; 1515 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 204>, 1517 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1518 <&scif_clk>; 1519 clock-names = "fck", "brg_int", "scif_clk"; 1520 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1521 dma-names = "tx", "rx"; 1522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1523 resets = <&cpg 204>; 1524 status = "disabled"; 1525 }; 1526 1527 scif4: serial@e6c40000 { 1528 compatible = "renesas,scif-r8a7795", 1529 "renesas,rcar-gen3-scif", "renesas,scif"; 1530 reg = <0 0xe6c40000 0 64>; 1531 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 203>, 1533 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1534 <&scif_clk>; 1535 clock-names = "fck", "brg_int", "scif_clk"; 1536 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1537 dma-names = "tx", "rx"; 1538 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1539 resets = <&cpg 203>; 1540 status = "disabled"; 1541 }; 1542 1543 scif5: serial@e6f30000 { 1544 compatible = "renesas,scif-r8a7795", 1545 "renesas,rcar-gen3-scif", "renesas,scif"; 1546 reg = <0 0xe6f30000 0 64>; 1547 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1548 clocks = <&cpg CPG_MOD 202>, 1549 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1550 <&scif_clk>; 1551 clock-names = "fck", "brg_int", "scif_clk"; 1552 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1553 <&dmac2 0x5b>, <&dmac2 0x5a>; 1554 dma-names = "tx", "rx", "tx", "rx"; 1555 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1556 resets = <&cpg 202>; 1557 status = "disabled"; 1558 }; 1559 1560 tpu: pwm@e6e80000 { 1561 compatible = "renesas,tpu-r8a7795", "renesas,tpu"; 1562 reg = <0 0xe6e80000 0 0x148>; 1563 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1564 clocks = <&cpg CPG_MOD 304>; 1565 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1566 resets = <&cpg 304>; 1567 #pwm-cells = <3>; 1568 status = "disabled"; 1569 }; 1570 1571 msiof0: spi@e6e90000 { 1572 compatible = "renesas,msiof-r8a7795", 1573 "renesas,rcar-gen3-msiof"; 1574 reg = <0 0xe6e90000 0 0x0064>; 1575 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1576 clocks = <&cpg CPG_MOD 211>; 1577 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1578 <&dmac2 0x41>, <&dmac2 0x40>; 1579 dma-names = "tx", "rx", "tx", "rx"; 1580 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1581 resets = <&cpg 211>; 1582 #address-cells = <1>; 1583 #size-cells = <0>; 1584 status = "disabled"; 1585 }; 1586 1587 msiof1: spi@e6ea0000 { 1588 compatible = "renesas,msiof-r8a7795", 1589 "renesas,rcar-gen3-msiof"; 1590 reg = <0 0xe6ea0000 0 0x0064>; 1591 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1592 clocks = <&cpg CPG_MOD 210>; 1593 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1594 <&dmac2 0x43>, <&dmac2 0x42>; 1595 dma-names = "tx", "rx", "tx", "rx"; 1596 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1597 resets = <&cpg 210>; 1598 #address-cells = <1>; 1599 #size-cells = <0>; 1600 status = "disabled"; 1601 }; 1602 1603 msiof2: spi@e6c00000 { 1604 compatible = "renesas,msiof-r8a7795", 1605 "renesas,rcar-gen3-msiof"; 1606 reg = <0 0xe6c00000 0 0x0064>; 1607 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1608 clocks = <&cpg CPG_MOD 209>; 1609 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1610 dma-names = "tx", "rx"; 1611 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1612 resets = <&cpg 209>; 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 status = "disabled"; 1616 }; 1617 1618 msiof3: spi@e6c10000 { 1619 compatible = "renesas,msiof-r8a7795", 1620 "renesas,rcar-gen3-msiof"; 1621 reg = <0 0xe6c10000 0 0x0064>; 1622 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1623 clocks = <&cpg CPG_MOD 208>; 1624 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1625 dma-names = "tx", "rx"; 1626 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1627 resets = <&cpg 208>; 1628 #address-cells = <1>; 1629 #size-cells = <0>; 1630 status = "disabled"; 1631 }; 1632 1633 vin0: video@e6ef0000 { 1634 compatible = "renesas,vin-r8a7795"; 1635 reg = <0 0xe6ef0000 0 0x1000>; 1636 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 811>; 1638 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1639 resets = <&cpg 811>; 1640 renesas,id = <0>; 1641 status = "disabled"; 1642 1643 ports { 1644 #address-cells = <1>; 1645 #size-cells = <0>; 1646 1647 port@1 { 1648 #address-cells = <1>; 1649 #size-cells = <0>; 1650 1651 reg = <1>; 1652 1653 vin0csi20: endpoint@0 { 1654 reg = <0>; 1655 remote-endpoint = <&csi20vin0>; 1656 }; 1657 vin0csi40: endpoint@2 { 1658 reg = <2>; 1659 remote-endpoint = <&csi40vin0>; 1660 }; 1661 }; 1662 }; 1663 }; 1664 1665 vin1: video@e6ef1000 { 1666 compatible = "renesas,vin-r8a7795"; 1667 reg = <0 0xe6ef1000 0 0x1000>; 1668 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1669 clocks = <&cpg CPG_MOD 810>; 1670 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1671 resets = <&cpg 810>; 1672 renesas,id = <1>; 1673 status = "disabled"; 1674 1675 ports { 1676 #address-cells = <1>; 1677 #size-cells = <0>; 1678 1679 port@1 { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 reg = <1>; 1684 1685 vin1csi20: endpoint@0 { 1686 reg = <0>; 1687 remote-endpoint = <&csi20vin1>; 1688 }; 1689 vin1csi40: endpoint@2 { 1690 reg = <2>; 1691 remote-endpoint = <&csi40vin1>; 1692 }; 1693 }; 1694 }; 1695 }; 1696 1697 vin2: video@e6ef2000 { 1698 compatible = "renesas,vin-r8a7795"; 1699 reg = <0 0xe6ef2000 0 0x1000>; 1700 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 809>; 1702 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1703 resets = <&cpg 809>; 1704 renesas,id = <2>; 1705 status = "disabled"; 1706 1707 ports { 1708 #address-cells = <1>; 1709 #size-cells = <0>; 1710 1711 port@1 { 1712 #address-cells = <1>; 1713 #size-cells = <0>; 1714 1715 reg = <1>; 1716 1717 vin2csi20: endpoint@0 { 1718 reg = <0>; 1719 remote-endpoint = <&csi20vin2>; 1720 }; 1721 vin2csi40: endpoint@2 { 1722 reg = <2>; 1723 remote-endpoint = <&csi40vin2>; 1724 }; 1725 }; 1726 }; 1727 }; 1728 1729 vin3: video@e6ef3000 { 1730 compatible = "renesas,vin-r8a7795"; 1731 reg = <0 0xe6ef3000 0 0x1000>; 1732 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 808>; 1734 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1735 resets = <&cpg 808>; 1736 renesas,id = <3>; 1737 status = "disabled"; 1738 1739 ports { 1740 #address-cells = <1>; 1741 #size-cells = <0>; 1742 1743 port@1 { 1744 #address-cells = <1>; 1745 #size-cells = <0>; 1746 1747 reg = <1>; 1748 1749 vin3csi20: endpoint@0 { 1750 reg = <0>; 1751 remote-endpoint = <&csi20vin3>; 1752 }; 1753 vin3csi40: endpoint@2 { 1754 reg = <2>; 1755 remote-endpoint = <&csi40vin3>; 1756 }; 1757 }; 1758 }; 1759 }; 1760 1761 vin4: video@e6ef4000 { 1762 compatible = "renesas,vin-r8a7795"; 1763 reg = <0 0xe6ef4000 0 0x1000>; 1764 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1765 clocks = <&cpg CPG_MOD 807>; 1766 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1767 resets = <&cpg 807>; 1768 renesas,id = <4>; 1769 status = "disabled"; 1770 1771 ports { 1772 #address-cells = <1>; 1773 #size-cells = <0>; 1774 1775 port@1 { 1776 #address-cells = <1>; 1777 #size-cells = <0>; 1778 1779 reg = <1>; 1780 1781 vin4csi20: endpoint@0 { 1782 reg = <0>; 1783 remote-endpoint = <&csi20vin4>; 1784 }; 1785 vin4csi41: endpoint@3 { 1786 reg = <3>; 1787 remote-endpoint = <&csi41vin4>; 1788 }; 1789 }; 1790 }; 1791 }; 1792 1793 vin5: video@e6ef5000 { 1794 compatible = "renesas,vin-r8a7795"; 1795 reg = <0 0xe6ef5000 0 0x1000>; 1796 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1797 clocks = <&cpg CPG_MOD 806>; 1798 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1799 resets = <&cpg 806>; 1800 renesas,id = <5>; 1801 status = "disabled"; 1802 1803 ports { 1804 #address-cells = <1>; 1805 #size-cells = <0>; 1806 1807 port@1 { 1808 #address-cells = <1>; 1809 #size-cells = <0>; 1810 1811 reg = <1>; 1812 1813 vin5csi20: endpoint@0 { 1814 reg = <0>; 1815 remote-endpoint = <&csi20vin5>; 1816 }; 1817 vin5csi41: endpoint@3 { 1818 reg = <3>; 1819 remote-endpoint = <&csi41vin5>; 1820 }; 1821 }; 1822 }; 1823 }; 1824 1825 vin6: video@e6ef6000 { 1826 compatible = "renesas,vin-r8a7795"; 1827 reg = <0 0xe6ef6000 0 0x1000>; 1828 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1829 clocks = <&cpg CPG_MOD 805>; 1830 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1831 resets = <&cpg 805>; 1832 renesas,id = <6>; 1833 status = "disabled"; 1834 1835 ports { 1836 #address-cells = <1>; 1837 #size-cells = <0>; 1838 1839 port@1 { 1840 #address-cells = <1>; 1841 #size-cells = <0>; 1842 1843 reg = <1>; 1844 1845 vin6csi20: endpoint@0 { 1846 reg = <0>; 1847 remote-endpoint = <&csi20vin6>; 1848 }; 1849 vin6csi41: endpoint@3 { 1850 reg = <3>; 1851 remote-endpoint = <&csi41vin6>; 1852 }; 1853 }; 1854 }; 1855 }; 1856 1857 vin7: video@e6ef7000 { 1858 compatible = "renesas,vin-r8a7795"; 1859 reg = <0 0xe6ef7000 0 0x1000>; 1860 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1861 clocks = <&cpg CPG_MOD 804>; 1862 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1863 resets = <&cpg 804>; 1864 renesas,id = <7>; 1865 status = "disabled"; 1866 1867 ports { 1868 #address-cells = <1>; 1869 #size-cells = <0>; 1870 1871 port@1 { 1872 #address-cells = <1>; 1873 #size-cells = <0>; 1874 1875 reg = <1>; 1876 1877 vin7csi20: endpoint@0 { 1878 reg = <0>; 1879 remote-endpoint = <&csi20vin7>; 1880 }; 1881 vin7csi41: endpoint@3 { 1882 reg = <3>; 1883 remote-endpoint = <&csi41vin7>; 1884 }; 1885 }; 1886 }; 1887 }; 1888 1889 drif00: rif@e6f40000 { 1890 compatible = "renesas,r8a7795-drif", 1891 "renesas,rcar-gen3-drif"; 1892 reg = <0 0xe6f40000 0 0x64>; 1893 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1894 clocks = <&cpg CPG_MOD 515>; 1895 clock-names = "fck"; 1896 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1897 dma-names = "rx", "rx"; 1898 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1899 resets = <&cpg 515>; 1900 renesas,bonding = <&drif01>; 1901 status = "disabled"; 1902 }; 1903 1904 drif01: rif@e6f50000 { 1905 compatible = "renesas,r8a7795-drif", 1906 "renesas,rcar-gen3-drif"; 1907 reg = <0 0xe6f50000 0 0x64>; 1908 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1909 clocks = <&cpg CPG_MOD 514>; 1910 clock-names = "fck"; 1911 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1912 dma-names = "rx", "rx"; 1913 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1914 resets = <&cpg 514>; 1915 renesas,bonding = <&drif00>; 1916 status = "disabled"; 1917 }; 1918 1919 drif10: rif@e6f60000 { 1920 compatible = "renesas,r8a7795-drif", 1921 "renesas,rcar-gen3-drif"; 1922 reg = <0 0xe6f60000 0 0x64>; 1923 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1924 clocks = <&cpg CPG_MOD 513>; 1925 clock-names = "fck"; 1926 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1927 dma-names = "rx", "rx"; 1928 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1929 resets = <&cpg 513>; 1930 renesas,bonding = <&drif11>; 1931 status = "disabled"; 1932 }; 1933 1934 drif11: rif@e6f70000 { 1935 compatible = "renesas,r8a7795-drif", 1936 "renesas,rcar-gen3-drif"; 1937 reg = <0 0xe6f70000 0 0x64>; 1938 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1939 clocks = <&cpg CPG_MOD 512>; 1940 clock-names = "fck"; 1941 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1942 dma-names = "rx", "rx"; 1943 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1944 resets = <&cpg 512>; 1945 renesas,bonding = <&drif10>; 1946 status = "disabled"; 1947 }; 1948 1949 drif20: rif@e6f80000 { 1950 compatible = "renesas,r8a7795-drif", 1951 "renesas,rcar-gen3-drif"; 1952 reg = <0 0xe6f80000 0 0x64>; 1953 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1954 clocks = <&cpg CPG_MOD 511>; 1955 clock-names = "fck"; 1956 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1957 dma-names = "rx", "rx"; 1958 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1959 resets = <&cpg 511>; 1960 renesas,bonding = <&drif21>; 1961 status = "disabled"; 1962 }; 1963 1964 drif21: rif@e6f90000 { 1965 compatible = "renesas,r8a7795-drif", 1966 "renesas,rcar-gen3-drif"; 1967 reg = <0 0xe6f90000 0 0x64>; 1968 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1969 clocks = <&cpg CPG_MOD 510>; 1970 clock-names = "fck"; 1971 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1972 dma-names = "rx", "rx"; 1973 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1974 resets = <&cpg 510>; 1975 renesas,bonding = <&drif20>; 1976 status = "disabled"; 1977 }; 1978 1979 drif30: rif@e6fa0000 { 1980 compatible = "renesas,r8a7795-drif", 1981 "renesas,rcar-gen3-drif"; 1982 reg = <0 0xe6fa0000 0 0x64>; 1983 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1984 clocks = <&cpg CPG_MOD 509>; 1985 clock-names = "fck"; 1986 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1987 dma-names = "rx", "rx"; 1988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1989 resets = <&cpg 509>; 1990 renesas,bonding = <&drif31>; 1991 status = "disabled"; 1992 }; 1993 1994 drif31: rif@e6fb0000 { 1995 compatible = "renesas,r8a7795-drif", 1996 "renesas,rcar-gen3-drif"; 1997 reg = <0 0xe6fb0000 0 0x64>; 1998 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1999 clocks = <&cpg CPG_MOD 508>; 2000 clock-names = "fck"; 2001 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 2002 dma-names = "rx", "rx"; 2003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2004 resets = <&cpg 508>; 2005 renesas,bonding = <&drif30>; 2006 status = "disabled"; 2007 }; 2008 2009 rcar_sound: sound@ec500000 { 2010 /* 2011 * #sound-dai-cells is required if simple-card 2012 * 2013 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 2014 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 2015 */ 2016 /* 2017 * #clock-cells is required for audio_clkout0/1/2/3 2018 * 2019 * clkout : #clock-cells = <0>; <&rcar_sound>; 2020 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 2021 */ 2022 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; 2023 reg = <0 0xec500000 0 0x1000>, /* SCU */ 2024 <0 0xec5a0000 0 0x100>, /* ADG */ 2025 <0 0xec540000 0 0x1000>, /* SSIU */ 2026 <0 0xec541000 0 0x280>, /* SSI */ 2027 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 2028 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 2029 2030 clocks = <&cpg CPG_MOD 1005>, 2031 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 2032 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 2033 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 2034 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 2035 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 2036 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 2037 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 2038 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 2039 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 2040 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 2041 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2042 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2043 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 2044 <&audio_clk_a>, <&audio_clk_b>, 2045 <&audio_clk_c>, 2046 <&cpg CPG_MOD 922>; 2047 clock-names = "ssi-all", 2048 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2049 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2050 "ssi.1", "ssi.0", 2051 "src.9", "src.8", "src.7", "src.6", 2052 "src.5", "src.4", "src.3", "src.2", 2053 "src.1", "src.0", 2054 "mix.1", "mix.0", 2055 "ctu.1", "ctu.0", 2056 "dvc.0", "dvc.1", 2057 "clk_a", "clk_b", "clk_c", "clk_i"; 2058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2059 resets = <&cpg 1005>, 2060 <&cpg 1006>, <&cpg 1007>, 2061 <&cpg 1008>, <&cpg 1009>, 2062 <&cpg 1010>, <&cpg 1011>, 2063 <&cpg 1012>, <&cpg 1013>, 2064 <&cpg 1014>, <&cpg 1015>; 2065 reset-names = "ssi-all", 2066 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2067 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2068 "ssi.1", "ssi.0"; 2069 status = "disabled"; 2070 2071 rcar_sound,dvc { 2072 dvc0: dvc-0 { 2073 dmas = <&audma1 0xbc>; 2074 dma-names = "tx"; 2075 }; 2076 dvc1: dvc-1 { 2077 dmas = <&audma1 0xbe>; 2078 dma-names = "tx"; 2079 }; 2080 }; 2081 2082 rcar_sound,mix { 2083 mix0: mix-0 { }; 2084 mix1: mix-1 { }; 2085 }; 2086 2087 rcar_sound,ctu { 2088 ctu00: ctu-0 { }; 2089 ctu01: ctu-1 { }; 2090 ctu02: ctu-2 { }; 2091 ctu03: ctu-3 { }; 2092 ctu10: ctu-4 { }; 2093 ctu11: ctu-5 { }; 2094 ctu12: ctu-6 { }; 2095 ctu13: ctu-7 { }; 2096 }; 2097 2098 rcar_sound,src { 2099 src0: src-0 { 2100 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 2101 dmas = <&audma0 0x85>, <&audma1 0x9a>; 2102 dma-names = "rx", "tx"; 2103 }; 2104 src1: src-1 { 2105 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 2106 dmas = <&audma0 0x87>, <&audma1 0x9c>; 2107 dma-names = "rx", "tx"; 2108 }; 2109 src2: src-2 { 2110 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 2111 dmas = <&audma0 0x89>, <&audma1 0x9e>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 src3: src-3 { 2115 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 2116 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 src4: src-4 { 2120 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 2121 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 2122 dma-names = "rx", "tx"; 2123 }; 2124 src5: src-5 { 2125 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 2126 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 src6: src-6 { 2130 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2131 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 src7: src-7 { 2135 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2136 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 src8: src-8 { 2140 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2141 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2142 dma-names = "rx", "tx"; 2143 }; 2144 src9: src-9 { 2145 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2146 dmas = <&audma0 0x97>, <&audma1 0xba>; 2147 dma-names = "rx", "tx"; 2148 }; 2149 }; 2150 2151 rcar_sound,ssiu { 2152 ssiu00: ssiu-0 { 2153 dmas = <&audma0 0x15>, <&audma1 0x16>; 2154 dma-names = "rx", "tx"; 2155 }; 2156 ssiu01: ssiu-1 { 2157 dmas = <&audma0 0x35>, <&audma1 0x36>; 2158 dma-names = "rx", "tx"; 2159 }; 2160 ssiu02: ssiu-2 { 2161 dmas = <&audma0 0x37>, <&audma1 0x38>; 2162 dma-names = "rx", "tx"; 2163 }; 2164 ssiu03: ssiu-3 { 2165 dmas = <&audma0 0x47>, <&audma1 0x48>; 2166 dma-names = "rx", "tx"; 2167 }; 2168 ssiu04: ssiu-4 { 2169 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2170 dma-names = "rx", "tx"; 2171 }; 2172 ssiu05: ssiu-5 { 2173 dmas = <&audma0 0x43>, <&audma1 0x44>; 2174 dma-names = "rx", "tx"; 2175 }; 2176 ssiu06: ssiu-6 { 2177 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2178 dma-names = "rx", "tx"; 2179 }; 2180 ssiu07: ssiu-7 { 2181 dmas = <&audma0 0x53>, <&audma1 0x54>; 2182 dma-names = "rx", "tx"; 2183 }; 2184 ssiu10: ssiu-8 { 2185 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2186 dma-names = "rx", "tx"; 2187 }; 2188 ssiu11: ssiu-9 { 2189 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2190 dma-names = "rx", "tx"; 2191 }; 2192 ssiu12: ssiu-10 { 2193 dmas = <&audma0 0x57>, <&audma1 0x58>; 2194 dma-names = "rx", "tx"; 2195 }; 2196 ssiu13: ssiu-11 { 2197 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2198 dma-names = "rx", "tx"; 2199 }; 2200 ssiu14: ssiu-12 { 2201 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2202 dma-names = "rx", "tx"; 2203 }; 2204 ssiu15: ssiu-13 { 2205 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2206 dma-names = "rx", "tx"; 2207 }; 2208 ssiu16: ssiu-14 { 2209 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2210 dma-names = "rx", "tx"; 2211 }; 2212 ssiu17: ssiu-15 { 2213 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2214 dma-names = "rx", "tx"; 2215 }; 2216 ssiu20: ssiu-16 { 2217 dmas = <&audma0 0x63>, <&audma1 0x64>; 2218 dma-names = "rx", "tx"; 2219 }; 2220 ssiu21: ssiu-17 { 2221 dmas = <&audma0 0x67>, <&audma1 0x68>; 2222 dma-names = "rx", "tx"; 2223 }; 2224 ssiu22: ssiu-18 { 2225 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2226 dma-names = "rx", "tx"; 2227 }; 2228 ssiu23: ssiu-19 { 2229 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2230 dma-names = "rx", "tx"; 2231 }; 2232 ssiu24: ssiu-20 { 2233 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2234 dma-names = "rx", "tx"; 2235 }; 2236 ssiu25: ssiu-21 { 2237 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2238 dma-names = "rx", "tx"; 2239 }; 2240 ssiu26: ssiu-22 { 2241 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2242 dma-names = "rx", "tx"; 2243 }; 2244 ssiu27: ssiu-23 { 2245 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2246 dma-names = "rx", "tx"; 2247 }; 2248 ssiu30: ssiu-24 { 2249 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2250 dma-names = "rx", "tx"; 2251 }; 2252 ssiu31: ssiu-25 { 2253 dmas = <&audma0 0x21>, <&audma1 0x22>; 2254 dma-names = "rx", "tx"; 2255 }; 2256 ssiu32: ssiu-26 { 2257 dmas = <&audma0 0x23>, <&audma1 0x24>; 2258 dma-names = "rx", "tx"; 2259 }; 2260 ssiu33: ssiu-27 { 2261 dmas = <&audma0 0x25>, <&audma1 0x26>; 2262 dma-names = "rx", "tx"; 2263 }; 2264 ssiu34: ssiu-28 { 2265 dmas = <&audma0 0x27>, <&audma1 0x28>; 2266 dma-names = "rx", "tx"; 2267 }; 2268 ssiu35: ssiu-29 { 2269 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2270 dma-names = "rx", "tx"; 2271 }; 2272 ssiu36: ssiu-30 { 2273 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2274 dma-names = "rx", "tx"; 2275 }; 2276 ssiu37: ssiu-31 { 2277 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2278 dma-names = "rx", "tx"; 2279 }; 2280 ssiu40: ssiu-32 { 2281 dmas = <&audma0 0x71>, <&audma1 0x72>; 2282 dma-names = "rx", "tx"; 2283 }; 2284 ssiu41: ssiu-33 { 2285 dmas = <&audma0 0x17>, <&audma1 0x18>; 2286 dma-names = "rx", "tx"; 2287 }; 2288 ssiu42: ssiu-34 { 2289 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2290 dma-names = "rx", "tx"; 2291 }; 2292 ssiu43: ssiu-35 { 2293 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2294 dma-names = "rx", "tx"; 2295 }; 2296 ssiu44: ssiu-36 { 2297 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2298 dma-names = "rx", "tx"; 2299 }; 2300 ssiu45: ssiu-37 { 2301 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2302 dma-names = "rx", "tx"; 2303 }; 2304 ssiu46: ssiu-38 { 2305 dmas = <&audma0 0x31>, <&audma1 0x32>; 2306 dma-names = "rx", "tx"; 2307 }; 2308 ssiu47: ssiu-39 { 2309 dmas = <&audma0 0x33>, <&audma1 0x34>; 2310 dma-names = "rx", "tx"; 2311 }; 2312 ssiu50: ssiu-40 { 2313 dmas = <&audma0 0x73>, <&audma1 0x74>; 2314 dma-names = "rx", "tx"; 2315 }; 2316 ssiu60: ssiu-41 { 2317 dmas = <&audma0 0x75>, <&audma1 0x76>; 2318 dma-names = "rx", "tx"; 2319 }; 2320 ssiu70: ssiu-42 { 2321 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2322 dma-names = "rx", "tx"; 2323 }; 2324 ssiu80: ssiu-43 { 2325 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2326 dma-names = "rx", "tx"; 2327 }; 2328 ssiu90: ssiu-44 { 2329 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2330 dma-names = "rx", "tx"; 2331 }; 2332 ssiu91: ssiu-45 { 2333 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2334 dma-names = "rx", "tx"; 2335 }; 2336 ssiu92: ssiu-46 { 2337 dmas = <&audma0 0x81>, <&audma1 0x82>; 2338 dma-names = "rx", "tx"; 2339 }; 2340 ssiu93: ssiu-47 { 2341 dmas = <&audma0 0x83>, <&audma1 0x84>; 2342 dma-names = "rx", "tx"; 2343 }; 2344 ssiu94: ssiu-48 { 2345 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2346 dma-names = "rx", "tx"; 2347 }; 2348 ssiu95: ssiu-49 { 2349 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2350 dma-names = "rx", "tx"; 2351 }; 2352 ssiu96: ssiu-50 { 2353 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2354 dma-names = "rx", "tx"; 2355 }; 2356 ssiu97: ssiu-51 { 2357 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2358 dma-names = "rx", "tx"; 2359 }; 2360 }; 2361 2362 rcar_sound,ssi { 2363 ssi0: ssi-0 { 2364 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2365 dmas = <&audma0 0x01>, <&audma1 0x02>; 2366 dma-names = "rx", "tx"; 2367 }; 2368 ssi1: ssi-1 { 2369 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2370 dmas = <&audma0 0x03>, <&audma1 0x04>; 2371 dma-names = "rx", "tx"; 2372 }; 2373 ssi2: ssi-2 { 2374 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2375 dmas = <&audma0 0x05>, <&audma1 0x06>; 2376 dma-names = "rx", "tx"; 2377 }; 2378 ssi3: ssi-3 { 2379 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2380 dmas = <&audma0 0x07>, <&audma1 0x08>; 2381 dma-names = "rx", "tx"; 2382 }; 2383 ssi4: ssi-4 { 2384 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2385 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2386 dma-names = "rx", "tx"; 2387 }; 2388 ssi5: ssi-5 { 2389 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2390 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2391 dma-names = "rx", "tx"; 2392 }; 2393 ssi6: ssi-6 { 2394 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2395 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2396 dma-names = "rx", "tx"; 2397 }; 2398 ssi7: ssi-7 { 2399 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2400 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2401 dma-names = "rx", "tx"; 2402 }; 2403 ssi8: ssi-8 { 2404 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2405 dmas = <&audma0 0x11>, <&audma1 0x12>; 2406 dma-names = "rx", "tx"; 2407 }; 2408 ssi9: ssi-9 { 2409 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2410 dmas = <&audma0 0x13>, <&audma1 0x14>; 2411 dma-names = "rx", "tx"; 2412 }; 2413 }; 2414 }; 2415 2416 mlp: mlp@ec520000 { 2417 compatible = "renesas,r8a7795-mlp", 2418 "renesas,rcar-gen3-mlp"; 2419 reg = <0 0xec520000 0 0x800>; 2420 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2421 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2422 clocks = <&cpg CPG_MOD 802>; 2423 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2424 resets = <&cpg 802>; 2425 status = "disabled"; 2426 }; 2427 2428 audma0: dma-controller@ec700000 { 2429 compatible = "renesas,dmac-r8a7795", 2430 "renesas,rcar-dmac"; 2431 reg = <0 0xec700000 0 0x10000>; 2432 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2433 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2434 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2435 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2436 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2437 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2438 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2439 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2440 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2441 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2442 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2443 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2444 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2445 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2446 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2447 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2448 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2449 interrupt-names = "error", 2450 "ch0", "ch1", "ch2", "ch3", 2451 "ch4", "ch5", "ch6", "ch7", 2452 "ch8", "ch9", "ch10", "ch11", 2453 "ch12", "ch13", "ch14", "ch15"; 2454 clocks = <&cpg CPG_MOD 502>; 2455 clock-names = "fck"; 2456 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2457 resets = <&cpg 502>; 2458 #dma-cells = <1>; 2459 dma-channels = <16>; 2460 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2461 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2462 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2463 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2464 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2465 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2466 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2467 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2468 }; 2469 2470 audma1: dma-controller@ec720000 { 2471 compatible = "renesas,dmac-r8a7795", 2472 "renesas,rcar-dmac"; 2473 reg = <0 0xec720000 0 0x10000>; 2474 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2475 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2476 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2477 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2478 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2479 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2480 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2481 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2482 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2483 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2484 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2485 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2486 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2487 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2488 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2489 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2490 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2491 interrupt-names = "error", 2492 "ch0", "ch1", "ch2", "ch3", 2493 "ch4", "ch5", "ch6", "ch7", 2494 "ch8", "ch9", "ch10", "ch11", 2495 "ch12", "ch13", "ch14", "ch15"; 2496 clocks = <&cpg CPG_MOD 501>; 2497 clock-names = "fck"; 2498 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2499 resets = <&cpg 501>; 2500 #dma-cells = <1>; 2501 dma-channels = <16>; 2502 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2503 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2504 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2505 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2506 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2507 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2508 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2509 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2510 }; 2511 2512 xhci0: usb@ee000000 { 2513 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; 2514 reg = <0 0xee000000 0 0xc00>; 2515 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2516 clocks = <&cpg CPG_MOD 328>; 2517 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2518 resets = <&cpg 328>; 2519 status = "disabled"; 2520 }; 2521 2522 usb3_peri0: usb@ee020000 { 2523 compatible = "renesas,r8a7795-usb3-peri", 2524 "renesas,rcar-gen3-usb3-peri"; 2525 reg = <0 0xee020000 0 0x400>; 2526 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2527 clocks = <&cpg CPG_MOD 328>; 2528 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2529 resets = <&cpg 328>; 2530 status = "disabled"; 2531 }; 2532 2533 ohci0: usb@ee080000 { 2534 compatible = "generic-ohci"; 2535 reg = <0 0xee080000 0 0x100>; 2536 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2537 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2538 phys = <&usb2_phy0 1>; 2539 phy-names = "usb"; 2540 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2541 resets = <&cpg 703>, <&cpg 704>; 2542 status = "disabled"; 2543 }; 2544 2545 ohci1: usb@ee0a0000 { 2546 compatible = "generic-ohci"; 2547 reg = <0 0xee0a0000 0 0x100>; 2548 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2549 clocks = <&cpg CPG_MOD 702>; 2550 phys = <&usb2_phy1 1>; 2551 phy-names = "usb"; 2552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2553 resets = <&cpg 702>; 2554 status = "disabled"; 2555 }; 2556 2557 ohci2: usb@ee0c0000 { 2558 compatible = "generic-ohci"; 2559 reg = <0 0xee0c0000 0 0x100>; 2560 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2561 clocks = <&cpg CPG_MOD 701>; 2562 phys = <&usb2_phy2 1>; 2563 phy-names = "usb"; 2564 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2565 resets = <&cpg 701>; 2566 status = "disabled"; 2567 }; 2568 2569 ohci3: usb@ee0e0000 { 2570 compatible = "generic-ohci"; 2571 reg = <0 0xee0e0000 0 0x100>; 2572 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2573 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2574 phys = <&usb2_phy3 1>; 2575 phy-names = "usb"; 2576 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2577 resets = <&cpg 700>, <&cpg 705>; 2578 status = "disabled"; 2579 }; 2580 2581 ehci0: usb@ee080100 { 2582 compatible = "generic-ehci"; 2583 reg = <0 0xee080100 0 0x100>; 2584 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2585 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2586 phys = <&usb2_phy0 2>; 2587 phy-names = "usb"; 2588 companion = <&ohci0>; 2589 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2590 resets = <&cpg 703>, <&cpg 704>; 2591 status = "disabled"; 2592 }; 2593 2594 ehci1: usb@ee0a0100 { 2595 compatible = "generic-ehci"; 2596 reg = <0 0xee0a0100 0 0x100>; 2597 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2598 clocks = <&cpg CPG_MOD 702>; 2599 phys = <&usb2_phy1 2>; 2600 phy-names = "usb"; 2601 companion = <&ohci1>; 2602 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2603 resets = <&cpg 702>; 2604 status = "disabled"; 2605 }; 2606 2607 ehci2: usb@ee0c0100 { 2608 compatible = "generic-ehci"; 2609 reg = <0 0xee0c0100 0 0x100>; 2610 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2611 clocks = <&cpg CPG_MOD 701>; 2612 phys = <&usb2_phy2 2>; 2613 phy-names = "usb"; 2614 companion = <&ohci2>; 2615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2616 resets = <&cpg 701>; 2617 status = "disabled"; 2618 }; 2619 2620 ehci3: usb@ee0e0100 { 2621 compatible = "generic-ehci"; 2622 reg = <0 0xee0e0100 0 0x100>; 2623 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2624 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2625 phys = <&usb2_phy3 2>; 2626 phy-names = "usb"; 2627 companion = <&ohci3>; 2628 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2629 resets = <&cpg 700>, <&cpg 705>; 2630 status = "disabled"; 2631 }; 2632 2633 usb2_phy0: usb-phy@ee080200 { 2634 compatible = "renesas,usb2-phy-r8a7795", 2635 "renesas,rcar-gen3-usb2-phy"; 2636 reg = <0 0xee080200 0 0x700>; 2637 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2638 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2640 resets = <&cpg 703>, <&cpg 704>; 2641 #phy-cells = <1>; 2642 status = "disabled"; 2643 }; 2644 2645 usb2_phy1: usb-phy@ee0a0200 { 2646 compatible = "renesas,usb2-phy-r8a7795", 2647 "renesas,rcar-gen3-usb2-phy"; 2648 reg = <0 0xee0a0200 0 0x700>; 2649 clocks = <&cpg CPG_MOD 702>; 2650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2651 resets = <&cpg 702>; 2652 #phy-cells = <1>; 2653 status = "disabled"; 2654 }; 2655 2656 usb2_phy2: usb-phy@ee0c0200 { 2657 compatible = "renesas,usb2-phy-r8a7795", 2658 "renesas,rcar-gen3-usb2-phy"; 2659 reg = <0 0xee0c0200 0 0x700>; 2660 clocks = <&cpg CPG_MOD 701>; 2661 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2662 resets = <&cpg 701>; 2663 #phy-cells = <1>; 2664 status = "disabled"; 2665 }; 2666 2667 usb2_phy3: usb-phy@ee0e0200 { 2668 compatible = "renesas,usb2-phy-r8a7795", 2669 "renesas,rcar-gen3-usb2-phy"; 2670 reg = <0 0xee0e0200 0 0x700>; 2671 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2672 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2673 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2674 resets = <&cpg 700>, <&cpg 705>; 2675 #phy-cells = <1>; 2676 status = "disabled"; 2677 }; 2678 2679 sdhi0: mmc@ee100000 { 2680 compatible = "renesas,sdhi-r8a7795", 2681 "renesas,rcar-gen3-sdhi"; 2682 reg = <0 0xee100000 0 0x2000>; 2683 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2684 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; 2685 clock-names = "core", "clkh"; 2686 max-frequency = <200000000>; 2687 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2688 resets = <&cpg 314>; 2689 iommus = <&ipmmu_ds1 32>; 2690 status = "disabled"; 2691 }; 2692 2693 sdhi1: mmc@ee120000 { 2694 compatible = "renesas,sdhi-r8a7795", 2695 "renesas,rcar-gen3-sdhi"; 2696 reg = <0 0xee120000 0 0x2000>; 2697 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2698 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; 2699 clock-names = "core", "clkh"; 2700 max-frequency = <200000000>; 2701 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2702 resets = <&cpg 313>; 2703 iommus = <&ipmmu_ds1 33>; 2704 status = "disabled"; 2705 }; 2706 2707 sdhi2: mmc@ee140000 { 2708 compatible = "renesas,sdhi-r8a7795", 2709 "renesas,rcar-gen3-sdhi"; 2710 reg = <0 0xee140000 0 0x2000>; 2711 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2712 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; 2713 clock-names = "core", "clkh"; 2714 max-frequency = <200000000>; 2715 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2716 resets = <&cpg 312>; 2717 iommus = <&ipmmu_ds1 34>; 2718 status = "disabled"; 2719 }; 2720 2721 sdhi3: mmc@ee160000 { 2722 compatible = "renesas,sdhi-r8a7795", 2723 "renesas,rcar-gen3-sdhi"; 2724 reg = <0 0xee160000 0 0x2000>; 2725 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2726 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; 2727 clock-names = "core", "clkh"; 2728 max-frequency = <200000000>; 2729 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2730 resets = <&cpg 311>; 2731 iommus = <&ipmmu_ds1 35>; 2732 status = "disabled"; 2733 }; 2734 2735 rpc: spi@ee200000 { 2736 compatible = "renesas,r8a7795-rpc-if", 2737 "renesas,rcar-gen3-rpc-if"; 2738 reg = <0 0xee200000 0 0x200>, 2739 <0 0x08000000 0 0x04000000>, 2740 <0 0xee208000 0 0x100>; 2741 reg-names = "regs", "dirmap", "wbuf"; 2742 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2743 clocks = <&cpg CPG_MOD 917>; 2744 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2745 resets = <&cpg 917>; 2746 #address-cells = <1>; 2747 #size-cells = <0>; 2748 status = "disabled"; 2749 }; 2750 2751 sata: sata@ee300000 { 2752 compatible = "renesas,sata-r8a7795", 2753 "renesas,rcar-gen3-sata"; 2754 reg = <0 0xee300000 0 0x200000>; 2755 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2756 clocks = <&cpg CPG_MOD 815>; 2757 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2758 resets = <&cpg 815>; 2759 status = "disabled"; 2760 iommus = <&ipmmu_hc 2>; 2761 }; 2762 2763 gic: interrupt-controller@f1010000 { 2764 compatible = "arm,gic-400"; 2765 #interrupt-cells = <3>; 2766 #address-cells = <0>; 2767 interrupt-controller; 2768 reg = <0x0 0xf1010000 0 0x1000>, 2769 <0x0 0xf1020000 0 0x20000>, 2770 <0x0 0xf1040000 0 0x20000>, 2771 <0x0 0xf1060000 0 0x20000>; 2772 interrupts = <GIC_PPI 9 2773 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2774 clocks = <&cpg CPG_MOD 408>; 2775 clock-names = "clk"; 2776 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2777 resets = <&cpg 408>; 2778 }; 2779 2780 pciec0: pcie@fe000000 { 2781 compatible = "renesas,pcie-r8a7795", 2782 "renesas,pcie-rcar-gen3"; 2783 reg = <0 0xfe000000 0 0x80000>; 2784 #address-cells = <3>; 2785 #size-cells = <2>; 2786 bus-range = <0x00 0xff>; 2787 device_type = "pci"; 2788 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2789 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2790 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2791 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2792 /* Map all possible DDR/IOMMU as inbound ranges */ 2793 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2794 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2795 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2796 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2797 #interrupt-cells = <1>; 2798 interrupt-map-mask = <0 0 0 0>; 2799 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2800 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2801 clock-names = "pcie", "pcie_bus"; 2802 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2803 resets = <&cpg 319>; 2804 iommu-map = <0 &ipmmu_hc 0 1>; 2805 iommu-map-mask = <0>; 2806 status = "disabled"; 2807 }; 2808 2809 pciec1: pcie@ee800000 { 2810 compatible = "renesas,pcie-r8a7795", 2811 "renesas,pcie-rcar-gen3"; 2812 reg = <0 0xee800000 0 0x80000>; 2813 #address-cells = <3>; 2814 #size-cells = <2>; 2815 bus-range = <0x00 0xff>; 2816 device_type = "pci"; 2817 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2818 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2819 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2820 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2821 /* Map all possible DDR/IOMMU as inbound ranges */ 2822 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2823 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2824 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2825 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2826 #interrupt-cells = <1>; 2827 interrupt-map-mask = <0 0 0 0>; 2828 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2829 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2830 clock-names = "pcie", "pcie_bus"; 2831 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2832 resets = <&cpg 318>; 2833 iommu-map = <0 &ipmmu_hc 1 1>; 2834 iommu-map-mask = <0>; 2835 status = "disabled"; 2836 }; 2837 2838 pciec0_ep: pcie-ep@fe000000 { 2839 compatible = "renesas,r8a7795-pcie-ep", 2840 "renesas,rcar-gen3-pcie-ep"; 2841 reg = <0x0 0xfe000000 0 0x80000>, 2842 <0x0 0xfe100000 0 0x100000>, 2843 <0x0 0xfe200000 0 0x200000>, 2844 <0x0 0x30000000 0 0x8000000>, 2845 <0x0 0x38000000 0 0x8000000>; 2846 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2847 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2848 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2849 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2850 clocks = <&cpg CPG_MOD 319>; 2851 clock-names = "pcie"; 2852 resets = <&cpg 319>; 2853 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2854 status = "disabled"; 2855 }; 2856 2857 pciec1_ep: pcie-ep@ee800000 { 2858 compatible = "renesas,r8a7795-pcie-ep", 2859 "renesas,rcar-gen3-pcie-ep"; 2860 reg = <0x0 0xee800000 0 0x80000>, 2861 <0x0 0xee900000 0 0x100000>, 2862 <0x0 0xeea00000 0 0x200000>, 2863 <0x0 0xc0000000 0 0x8000000>, 2864 <0x0 0xc8000000 0 0x8000000>; 2865 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2866 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2867 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2868 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2869 clocks = <&cpg CPG_MOD 318>; 2870 clock-names = "pcie"; 2871 resets = <&cpg 318>; 2872 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2873 status = "disabled"; 2874 }; 2875 2876 imr-lx4@fe860000 { 2877 compatible = "renesas,r8a7795-imr-lx4", 2878 "renesas,imr-lx4"; 2879 reg = <0 0xfe860000 0 0x2000>; 2880 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2881 clocks = <&cpg CPG_MOD 823>; 2882 power-domains = <&sysc R8A7795_PD_A3VC>; 2883 resets = <&cpg 823>; 2884 }; 2885 2886 imr-lx4@fe870000 { 2887 compatible = "renesas,r8a7795-imr-lx4", 2888 "renesas,imr-lx4"; 2889 reg = <0 0xfe870000 0 0x2000>; 2890 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2891 clocks = <&cpg CPG_MOD 822>; 2892 power-domains = <&sysc R8A7795_PD_A3VC>; 2893 resets = <&cpg 822>; 2894 }; 2895 2896 imr-lx4@fe880000 { 2897 compatible = "renesas,r8a7795-imr-lx4", 2898 "renesas,imr-lx4"; 2899 reg = <0 0xfe880000 0 0x2000>; 2900 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2901 clocks = <&cpg CPG_MOD 821>; 2902 power-domains = <&sysc R8A7795_PD_A3VC>; 2903 resets = <&cpg 821>; 2904 }; 2905 2906 imr-lx4@fe890000 { 2907 compatible = "renesas,r8a7795-imr-lx4", 2908 "renesas,imr-lx4"; 2909 reg = <0 0xfe890000 0 0x2000>; 2910 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2911 clocks = <&cpg CPG_MOD 820>; 2912 power-domains = <&sysc R8A7795_PD_A3VC>; 2913 resets = <&cpg 820>; 2914 }; 2915 2916 vspbc: vsp@fe920000 { 2917 compatible = "renesas,vsp2"; 2918 reg = <0 0xfe920000 0 0x8000>; 2919 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2920 clocks = <&cpg CPG_MOD 624>; 2921 power-domains = <&sysc R8A7795_PD_A3VP>; 2922 resets = <&cpg 624>; 2923 2924 renesas,fcp = <&fcpvb1>; 2925 }; 2926 2927 vspbd: vsp@fe960000 { 2928 compatible = "renesas,vsp2"; 2929 reg = <0 0xfe960000 0 0x8000>; 2930 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2931 clocks = <&cpg CPG_MOD 626>; 2932 power-domains = <&sysc R8A7795_PD_A3VP>; 2933 resets = <&cpg 626>; 2934 2935 renesas,fcp = <&fcpvb0>; 2936 }; 2937 2938 vspd0: vsp@fea20000 { 2939 compatible = "renesas,vsp2"; 2940 reg = <0 0xfea20000 0 0x5000>; 2941 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2942 clocks = <&cpg CPG_MOD 623>; 2943 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2944 resets = <&cpg 623>; 2945 2946 renesas,fcp = <&fcpvd0>; 2947 }; 2948 2949 vspd1: vsp@fea28000 { 2950 compatible = "renesas,vsp2"; 2951 reg = <0 0xfea28000 0 0x5000>; 2952 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2953 clocks = <&cpg CPG_MOD 622>; 2954 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2955 resets = <&cpg 622>; 2956 2957 renesas,fcp = <&fcpvd1>; 2958 }; 2959 2960 vspd2: vsp@fea30000 { 2961 compatible = "renesas,vsp2"; 2962 reg = <0 0xfea30000 0 0x5000>; 2963 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2964 clocks = <&cpg CPG_MOD 621>; 2965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2966 resets = <&cpg 621>; 2967 2968 renesas,fcp = <&fcpvd2>; 2969 }; 2970 2971 vspi0: vsp@fe9a0000 { 2972 compatible = "renesas,vsp2"; 2973 reg = <0 0xfe9a0000 0 0x8000>; 2974 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2975 clocks = <&cpg CPG_MOD 631>; 2976 power-domains = <&sysc R8A7795_PD_A3VP>; 2977 resets = <&cpg 631>; 2978 2979 renesas,fcp = <&fcpvi0>; 2980 }; 2981 2982 vspi1: vsp@fe9b0000 { 2983 compatible = "renesas,vsp2"; 2984 reg = <0 0xfe9b0000 0 0x8000>; 2985 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2986 clocks = <&cpg CPG_MOD 630>; 2987 power-domains = <&sysc R8A7795_PD_A3VP>; 2988 resets = <&cpg 630>; 2989 2990 renesas,fcp = <&fcpvi1>; 2991 }; 2992 2993 fdp1@fe940000 { 2994 compatible = "renesas,fdp1"; 2995 reg = <0 0xfe940000 0 0x2400>; 2996 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2997 clocks = <&cpg CPG_MOD 119>; 2998 power-domains = <&sysc R8A7795_PD_A3VP>; 2999 resets = <&cpg 119>; 3000 renesas,fcp = <&fcpf0>; 3001 }; 3002 3003 fdp1@fe944000 { 3004 compatible = "renesas,fdp1"; 3005 reg = <0 0xfe944000 0 0x2400>; 3006 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 3007 clocks = <&cpg CPG_MOD 118>; 3008 power-domains = <&sysc R8A7795_PD_A3VP>; 3009 resets = <&cpg 118>; 3010 renesas,fcp = <&fcpf1>; 3011 }; 3012 3013 fcpf0: fcp@fe950000 { 3014 compatible = "renesas,fcpf"; 3015 reg = <0 0xfe950000 0 0x200>; 3016 clocks = <&cpg CPG_MOD 615>; 3017 power-domains = <&sysc R8A7795_PD_A3VP>; 3018 resets = <&cpg 615>; 3019 iommus = <&ipmmu_vp0 0>; 3020 }; 3021 3022 fcpf1: fcp@fe951000 { 3023 compatible = "renesas,fcpf"; 3024 reg = <0 0xfe951000 0 0x200>; 3025 clocks = <&cpg CPG_MOD 614>; 3026 power-domains = <&sysc R8A7795_PD_A3VP>; 3027 resets = <&cpg 614>; 3028 iommus = <&ipmmu_vp1 1>; 3029 }; 3030 3031 fcpvb0: fcp@fe96f000 { 3032 compatible = "renesas,fcpv"; 3033 reg = <0 0xfe96f000 0 0x200>; 3034 clocks = <&cpg CPG_MOD 607>; 3035 power-domains = <&sysc R8A7795_PD_A3VP>; 3036 resets = <&cpg 607>; 3037 iommus = <&ipmmu_vp0 5>; 3038 }; 3039 3040 fcpvb1: fcp@fe92f000 { 3041 compatible = "renesas,fcpv"; 3042 reg = <0 0xfe92f000 0 0x200>; 3043 clocks = <&cpg CPG_MOD 606>; 3044 power-domains = <&sysc R8A7795_PD_A3VP>; 3045 resets = <&cpg 606>; 3046 iommus = <&ipmmu_vp1 7>; 3047 }; 3048 3049 fcpvi0: fcp@fe9af000 { 3050 compatible = "renesas,fcpv"; 3051 reg = <0 0xfe9af000 0 0x200>; 3052 clocks = <&cpg CPG_MOD 611>; 3053 power-domains = <&sysc R8A7795_PD_A3VP>; 3054 resets = <&cpg 611>; 3055 iommus = <&ipmmu_vp0 8>; 3056 }; 3057 3058 fcpvi1: fcp@fe9bf000 { 3059 compatible = "renesas,fcpv"; 3060 reg = <0 0xfe9bf000 0 0x200>; 3061 clocks = <&cpg CPG_MOD 610>; 3062 power-domains = <&sysc R8A7795_PD_A3VP>; 3063 resets = <&cpg 610>; 3064 iommus = <&ipmmu_vp1 9>; 3065 }; 3066 3067 fcpvd0: fcp@fea27000 { 3068 compatible = "renesas,fcpv"; 3069 reg = <0 0xfea27000 0 0x200>; 3070 clocks = <&cpg CPG_MOD 603>; 3071 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3072 resets = <&cpg 603>; 3073 iommus = <&ipmmu_vi0 8>; 3074 }; 3075 3076 fcpvd1: fcp@fea2f000 { 3077 compatible = "renesas,fcpv"; 3078 reg = <0 0xfea2f000 0 0x200>; 3079 clocks = <&cpg CPG_MOD 602>; 3080 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3081 resets = <&cpg 602>; 3082 iommus = <&ipmmu_vi0 9>; 3083 }; 3084 3085 fcpvd2: fcp@fea37000 { 3086 compatible = "renesas,fcpv"; 3087 reg = <0 0xfea37000 0 0x200>; 3088 clocks = <&cpg CPG_MOD 601>; 3089 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3090 resets = <&cpg 601>; 3091 iommus = <&ipmmu_vi1 10>; 3092 }; 3093 3094 cmm0: cmm@fea40000 { 3095 compatible = "renesas,r8a7795-cmm", 3096 "renesas,rcar-gen3-cmm"; 3097 reg = <0 0xfea40000 0 0x1000>; 3098 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3099 clocks = <&cpg CPG_MOD 711>; 3100 resets = <&cpg 711>; 3101 }; 3102 3103 cmm1: cmm@fea50000 { 3104 compatible = "renesas,r8a7795-cmm", 3105 "renesas,rcar-gen3-cmm"; 3106 reg = <0 0xfea50000 0 0x1000>; 3107 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3108 clocks = <&cpg CPG_MOD 710>; 3109 resets = <&cpg 710>; 3110 }; 3111 3112 cmm2: cmm@fea60000 { 3113 compatible = "renesas,r8a7795-cmm", 3114 "renesas,rcar-gen3-cmm"; 3115 reg = <0 0xfea60000 0 0x1000>; 3116 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3117 clocks = <&cpg CPG_MOD 709>; 3118 resets = <&cpg 709>; 3119 }; 3120 3121 cmm3: cmm@fea70000 { 3122 compatible = "renesas,r8a7795-cmm", 3123 "renesas,rcar-gen3-cmm"; 3124 reg = <0 0xfea70000 0 0x1000>; 3125 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3126 clocks = <&cpg CPG_MOD 708>; 3127 resets = <&cpg 708>; 3128 }; 3129 3130 csi20: csi2@fea80000 { 3131 compatible = "renesas,r8a7795-csi2"; 3132 reg = <0 0xfea80000 0 0x10000>; 3133 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 3134 clocks = <&cpg CPG_MOD 714>; 3135 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3136 resets = <&cpg 714>; 3137 status = "disabled"; 3138 3139 ports { 3140 #address-cells = <1>; 3141 #size-cells = <0>; 3142 3143 port@0 { 3144 reg = <0>; 3145 }; 3146 3147 port@1 { 3148 #address-cells = <1>; 3149 #size-cells = <0>; 3150 3151 reg = <1>; 3152 3153 csi20vin0: endpoint@0 { 3154 reg = <0>; 3155 remote-endpoint = <&vin0csi20>; 3156 }; 3157 csi20vin1: endpoint@1 { 3158 reg = <1>; 3159 remote-endpoint = <&vin1csi20>; 3160 }; 3161 csi20vin2: endpoint@2 { 3162 reg = <2>; 3163 remote-endpoint = <&vin2csi20>; 3164 }; 3165 csi20vin3: endpoint@3 { 3166 reg = <3>; 3167 remote-endpoint = <&vin3csi20>; 3168 }; 3169 csi20vin4: endpoint@4 { 3170 reg = <4>; 3171 remote-endpoint = <&vin4csi20>; 3172 }; 3173 csi20vin5: endpoint@5 { 3174 reg = <5>; 3175 remote-endpoint = <&vin5csi20>; 3176 }; 3177 csi20vin6: endpoint@6 { 3178 reg = <6>; 3179 remote-endpoint = <&vin6csi20>; 3180 }; 3181 csi20vin7: endpoint@7 { 3182 reg = <7>; 3183 remote-endpoint = <&vin7csi20>; 3184 }; 3185 }; 3186 }; 3187 }; 3188 3189 csi40: csi2@feaa0000 { 3190 compatible = "renesas,r8a7795-csi2"; 3191 reg = <0 0xfeaa0000 0 0x10000>; 3192 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 3193 clocks = <&cpg CPG_MOD 716>; 3194 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3195 resets = <&cpg 716>; 3196 status = "disabled"; 3197 3198 ports { 3199 #address-cells = <1>; 3200 #size-cells = <0>; 3201 3202 port@0 { 3203 reg = <0>; 3204 }; 3205 3206 port@1 { 3207 #address-cells = <1>; 3208 #size-cells = <0>; 3209 3210 reg = <1>; 3211 3212 csi40vin0: endpoint@0 { 3213 reg = <0>; 3214 remote-endpoint = <&vin0csi40>; 3215 }; 3216 csi40vin1: endpoint@1 { 3217 reg = <1>; 3218 remote-endpoint = <&vin1csi40>; 3219 }; 3220 csi40vin2: endpoint@2 { 3221 reg = <2>; 3222 remote-endpoint = <&vin2csi40>; 3223 }; 3224 csi40vin3: endpoint@3 { 3225 reg = <3>; 3226 remote-endpoint = <&vin3csi40>; 3227 }; 3228 }; 3229 }; 3230 }; 3231 3232 csi41: csi2@feab0000 { 3233 compatible = "renesas,r8a7795-csi2"; 3234 reg = <0 0xfeab0000 0 0x10000>; 3235 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 3236 clocks = <&cpg CPG_MOD 715>; 3237 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3238 resets = <&cpg 715>; 3239 status = "disabled"; 3240 3241 ports { 3242 #address-cells = <1>; 3243 #size-cells = <0>; 3244 3245 port@0 { 3246 reg = <0>; 3247 }; 3248 3249 port@1 { 3250 #address-cells = <1>; 3251 #size-cells = <0>; 3252 3253 reg = <1>; 3254 3255 csi41vin4: endpoint@0 { 3256 reg = <0>; 3257 remote-endpoint = <&vin4csi41>; 3258 }; 3259 csi41vin5: endpoint@1 { 3260 reg = <1>; 3261 remote-endpoint = <&vin5csi41>; 3262 }; 3263 csi41vin6: endpoint@2 { 3264 reg = <2>; 3265 remote-endpoint = <&vin6csi41>; 3266 }; 3267 csi41vin7: endpoint@3 { 3268 reg = <3>; 3269 remote-endpoint = <&vin7csi41>; 3270 }; 3271 }; 3272 }; 3273 }; 3274 3275 hdmi0: hdmi@fead0000 { 3276 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3277 reg = <0 0xfead0000 0 0x10000>; 3278 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 3279 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3280 clock-names = "iahb", "isfr"; 3281 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3282 resets = <&cpg 729>; 3283 status = "disabled"; 3284 3285 ports { 3286 #address-cells = <1>; 3287 #size-cells = <0>; 3288 port@0 { 3289 reg = <0>; 3290 dw_hdmi0_in: endpoint { 3291 remote-endpoint = <&du_out_hdmi0>; 3292 }; 3293 }; 3294 port@1 { 3295 reg = <1>; 3296 }; 3297 port@2 { 3298 /* HDMI sound */ 3299 reg = <2>; 3300 }; 3301 }; 3302 }; 3303 3304 hdmi1: hdmi@feae0000 { 3305 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3306 reg = <0 0xfeae0000 0 0x10000>; 3307 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 3308 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3309 clock-names = "iahb", "isfr"; 3310 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3311 resets = <&cpg 728>; 3312 status = "disabled"; 3313 3314 ports { 3315 #address-cells = <1>; 3316 #size-cells = <0>; 3317 port@0 { 3318 reg = <0>; 3319 dw_hdmi1_in: endpoint { 3320 remote-endpoint = <&du_out_hdmi1>; 3321 }; 3322 }; 3323 port@1 { 3324 reg = <1>; 3325 }; 3326 port@2 { 3327 /* HDMI sound */ 3328 reg = <2>; 3329 }; 3330 }; 3331 }; 3332 3333 du: display@feb00000 { 3334 compatible = "renesas,du-r8a7795"; 3335 reg = <0 0xfeb00000 0 0x80000>; 3336 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 3337 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 3338 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 3339 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 3340 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 3341 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; 3342 clock-names = "du.0", "du.1", "du.2", "du.3"; 3343 resets = <&cpg 724>, <&cpg 722>; 3344 reset-names = "du.0", "du.2"; 3345 3346 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; 3347 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, 3348 <&vspd0 1>; 3349 3350 status = "disabled"; 3351 3352 ports { 3353 #address-cells = <1>; 3354 #size-cells = <0>; 3355 3356 port@0 { 3357 reg = <0>; 3358 }; 3359 port@1 { 3360 reg = <1>; 3361 du_out_hdmi0: endpoint { 3362 remote-endpoint = <&dw_hdmi0_in>; 3363 }; 3364 }; 3365 port@2 { 3366 reg = <2>; 3367 du_out_hdmi1: endpoint { 3368 remote-endpoint = <&dw_hdmi1_in>; 3369 }; 3370 }; 3371 port@3 { 3372 reg = <3>; 3373 du_out_lvds0: endpoint { 3374 remote-endpoint = <&lvds0_in>; 3375 }; 3376 }; 3377 }; 3378 }; 3379 3380 lvds0: lvds@feb90000 { 3381 compatible = "renesas,r8a7795-lvds"; 3382 reg = <0 0xfeb90000 0 0x14>; 3383 clocks = <&cpg CPG_MOD 727>; 3384 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3385 resets = <&cpg 727>; 3386 status = "disabled"; 3387 3388 ports { 3389 #address-cells = <1>; 3390 #size-cells = <0>; 3391 3392 port@0 { 3393 reg = <0>; 3394 lvds0_in: endpoint { 3395 remote-endpoint = <&du_out_lvds0>; 3396 }; 3397 }; 3398 port@1 { 3399 reg = <1>; 3400 }; 3401 }; 3402 }; 3403 3404 prr: chipid@fff00044 { 3405 compatible = "renesas,prr"; 3406 reg = <0 0xfff00044 0 4>; 3407 bootph-all; 3408 }; 3409 }; 3410 3411 thermal-zones { 3412 sensor1_thermal: sensor1-thermal { 3413 polling-delay-passive = <250>; 3414 polling-delay = <1000>; 3415 thermal-sensors = <&tsc 0>; 3416 sustainable-power = <6313>; 3417 3418 trips { 3419 sensor1_crit: sensor1-crit { 3420 temperature = <120000>; 3421 hysteresis = <1000>; 3422 type = "critical"; 3423 }; 3424 }; 3425 }; 3426 3427 sensor2_thermal: sensor2-thermal { 3428 polling-delay-passive = <250>; 3429 polling-delay = <1000>; 3430 thermal-sensors = <&tsc 1>; 3431 sustainable-power = <6313>; 3432 3433 trips { 3434 sensor2_crit: sensor2-crit { 3435 temperature = <120000>; 3436 hysteresis = <1000>; 3437 type = "critical"; 3438 }; 3439 }; 3440 }; 3441 3442 sensor3_thermal: sensor3-thermal { 3443 polling-delay-passive = <250>; 3444 polling-delay = <1000>; 3445 thermal-sensors = <&tsc 2>; 3446 3447 trips { 3448 target: trip-point1 { 3449 temperature = <100000>; 3450 hysteresis = <1000>; 3451 type = "passive"; 3452 }; 3453 3454 sensor3_crit: sensor3-crit { 3455 temperature = <120000>; 3456 hysteresis = <1000>; 3457 type = "critical"; 3458 }; 3459 }; 3460 3461 cooling-maps { 3462 map0 { 3463 trip = <&target>; 3464 cooling-device = <&a57_0 2 4>; 3465 contribution = <1024>; 3466 }; 3467 3468 map1 { 3469 trip = <&target>; 3470 cooling-device = <&a53_0 0 2>; 3471 contribution = <1024>; 3472 }; 3473 }; 3474 }; 3475 }; 3476 3477 timer { 3478 compatible = "arm,armv8-timer"; 3479 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3480 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3481 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3482 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3483 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 3484 }; 3485 3486 /* External USB clocks - can be overridden by the board */ 3487 usb3s0_clk: usb3s0 { 3488 compatible = "fixed-clock"; 3489 #clock-cells = <0>; 3490 clock-frequency = <0>; 3491 }; 3492 3493 usb_extal_clk: usb_extal { 3494 compatible = "fixed-clock"; 3495 #clock-cells = <0>; 3496 clock-frequency = <0>; 3497 }; 3498}; 3499