1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
3 #include "qat_freebsd.h"
4 #include "adf_cfg.h"
5 #include "adf_common_drv.h"
6 #include "adf_accel_devices.h"
7 #include "adf_c62x_hw_data.h"
8 #include "adf_fw_counters.h"
9 #include "adf_cfg_device.h"
10 #include "adf_dbgfs.h"
11 #include <sys/types.h>
12 #include <sys/kernel.h>
13 #include <sys/malloc.h>
14 #include <machine/bus_dma.h>
15 #include <dev/pci/pcireg.h>
16
17 static MALLOC_DEFINE(M_QAT_C62X, "qat_c62x", "qat_c62x");
18
19 #define ADF_SYSTEM_DEVICE(device_id) \
20 { \
21 PCI_VENDOR_ID_INTEL, device_id \
22 }
23
24 static const struct pci_device_id adf_pci_tbl[] = { ADF_SYSTEM_DEVICE(
25 ADF_C62X_PCI_DEVICE_ID),
26 {
27 0,
28 } };
29
30 static int
adf_probe(device_t dev)31 adf_probe(device_t dev)
32 {
33 const struct pci_device_id *id;
34
35 for (id = adf_pci_tbl; id->vendor != 0; id++) {
36 if (pci_get_vendor(dev) == id->vendor &&
37 pci_get_device(dev) == id->device) {
38 device_set_desc(dev,
39 "Intel " ADF_C62X_DEVICE_NAME
40 " QuickAssist");
41 return BUS_PROBE_GENERIC;
42 }
43 }
44 return ENXIO;
45 }
46
47 static void
adf_cleanup_accel(struct adf_accel_dev * accel_dev)48 adf_cleanup_accel(struct adf_accel_dev *accel_dev)
49 {
50 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
51 int i;
52
53 if (accel_dev->dma_tag)
54 bus_dma_tag_destroy(accel_dev->dma_tag);
55 for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
56 struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
57
58 if (bar->virt_addr)
59 bus_free_resource(accel_pci_dev->pci_dev,
60 SYS_RES_MEMORY,
61 bar->virt_addr);
62 }
63
64 if (accel_dev->hw_device) {
65 switch (pci_get_device(accel_pci_dev->pci_dev)) {
66 case ADF_C62X_PCI_DEVICE_ID:
67 adf_clean_hw_data_c62x(accel_dev->hw_device);
68 break;
69 default:
70 break;
71 }
72 free(accel_dev->hw_device, M_QAT_C62X);
73 accel_dev->hw_device = NULL;
74 }
75 adf_dbgfs_exit(accel_dev);
76 adf_cfg_dev_remove(accel_dev);
77 adf_devmgr_rm_dev(accel_dev, NULL);
78 }
79
80 static int
adf_attach(device_t dev)81 adf_attach(device_t dev)
82 {
83 struct adf_accel_dev *accel_dev;
84 struct adf_accel_pci *accel_pci_dev;
85 struct adf_hw_device_data *hw_data;
86 unsigned int i, bar_nr;
87 int ret = 0, rid;
88 struct adf_cfg_device *cfg_dev = NULL;
89
90 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of
91 * Pci-passthrough causing Maxpayload to be reset to 128 bytes
92 * when the device is reset. */
93 if (pci_get_max_payload(dev) != 256)
94 pci_set_max_payload(dev, 256);
95
96 accel_dev = device_get_softc(dev);
97
98 mutex_init(&accel_dev->lock);
99 INIT_LIST_HEAD(&accel_dev->crypto_list);
100 accel_pci_dev = &accel_dev->accel_pci_dev;
101 accel_pci_dev->pci_dev = dev;
102
103 if (bus_get_domain(dev, &accel_pci_dev->node) != 0)
104 accel_pci_dev->node = 0;
105
106 /* XXX: Revisit if we actually need a devmgr table at all. */
107
108 /* Add accel device to accel table.
109 * This should be called before adf_cleanup_accel is called */
110 ret = adf_devmgr_add_dev(accel_dev, NULL);
111 if (ret) {
112 device_printf(dev, "Failed to add new accelerator device.\n");
113 goto out_err_lock;
114 }
115
116 /* Allocate and configure device configuration structure */
117 hw_data = malloc(sizeof(*hw_data), M_QAT_C62X, M_WAITOK | M_ZERO);
118
119 accel_dev->hw_device = hw_data;
120 adf_init_hw_data_c62x(accel_dev->hw_device);
121 accel_pci_dev->revid = pci_get_revid(dev);
122 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4);
123 if (accel_pci_dev->revid == 0x00) {
124 device_printf(dev, "A0 stepping is not supported.\n");
125 ret = ENODEV;
126 goto out_err;
127 }
128
129 /* Get PPAERUCM values and store */
130 ret = adf_aer_store_ppaerucm_reg(dev, hw_data);
131 if (ret)
132 goto out_err;
133
134 /* Get Accelerators and Accelerators Engines masks */
135 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev);
136 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev);
137 hw_data->admin_ae_mask = hw_data->ae_mask;
138 accel_pci_dev->sku = hw_data->get_sku(hw_data);
139 /* If the device has no acceleration engines then ignore it. */
140 if (!hw_data->accel_mask || !hw_data->ae_mask ||
141 ((~hw_data->ae_mask) & 0x01)) {
142 device_printf(dev, "No acceleration units found\n");
143 ret = ENXIO;
144 goto out_err;
145 }
146
147 /* Create device configuration table */
148 ret = adf_cfg_dev_add(accel_dev);
149 if (ret)
150 goto out_err;
151
152 ret = adf_clock_debugfs_add(accel_dev);
153 if (ret)
154 goto out_err;
155
156 pci_set_max_read_req(dev, 1024);
157
158 ret = bus_dma_tag_create(bus_get_dma_tag(dev),
159 1,
160 0,
161 BUS_SPACE_MAXADDR,
162 BUS_SPACE_MAXADDR,
163 NULL,
164 NULL,
165 BUS_SPACE_MAXSIZE,
166 /* BUS_SPACE_UNRESTRICTED */ 1,
167 BUS_SPACE_MAXSIZE,
168 0,
169 NULL,
170 NULL,
171 &accel_dev->dma_tag);
172 if (ret)
173 goto out_err;
174
175 if (hw_data->get_accel_cap) {
176 hw_data->accel_capabilities_mask =
177 hw_data->get_accel_cap(accel_dev);
178 }
179
180 /* Find and map all the device's BARS */
181 i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0;
182 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0;
183 bar_nr++) {
184 struct adf_bar *bar;
185
186 /*
187 * XXX: This isn't quite right as it will ignore a BAR
188 * that wasn't assigned a valid resource range by the
189 * firmware.
190 */
191 rid = PCIR_BAR(bar_nr);
192 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0)
193 continue;
194 bar = &accel_pci_dev->pci_bars[i++];
195 bar->virt_addr = bus_alloc_resource_any(dev,
196 SYS_RES_MEMORY,
197 &rid,
198 RF_ACTIVE);
199
200 if (bar->virt_addr == NULL) {
201 device_printf(dev, "Failed to map BAR %d\n", bar_nr);
202 ret = ENXIO;
203 goto out_err;
204 }
205 bar->base_addr = rman_get_start(bar->virt_addr);
206 bar->size = rman_get_size(bar->virt_addr);
207 }
208 ret = pci_enable_busmaster(dev);
209 if (ret)
210 goto out_err;
211
212 adf_dbgfs_init(accel_dev);
213
214 if (!accel_dev->hw_device->config_device) {
215 ret = EFAULT;
216 goto out_err_disable;
217 }
218
219 ret = accel_dev->hw_device->config_device(accel_dev);
220 if (ret)
221 goto out_err_disable;
222
223 ret = adf_dev_init(accel_dev);
224 if (ret)
225 goto out_dev_shutdown;
226
227 ret = adf_dev_start(accel_dev);
228 if (ret)
229 goto out_dev_stop;
230
231 cfg_dev = accel_dev->cfg->dev;
232 adf_cfg_device_clear(cfg_dev, accel_dev);
233 free(cfg_dev, M_QAT);
234 accel_dev->cfg->dev = NULL;
235 return ret;
236 out_dev_stop:
237 adf_dev_stop(accel_dev);
238 out_dev_shutdown:
239 adf_dev_shutdown(accel_dev);
240 out_err_disable:
241 pci_disable_busmaster(dev);
242 out_err:
243 adf_cleanup_accel(accel_dev);
244 out_err_lock:
245 mutex_destroy(&accel_dev->lock);
246
247 return ret;
248 }
249
250 static int
adf_detach(device_t dev)251 adf_detach(device_t dev)
252 {
253 struct adf_accel_dev *accel_dev = device_get_softc(dev);
254
255 if (adf_dev_stop(accel_dev)) {
256 device_printf(dev, "Failed to stop QAT accel dev\n");
257 return EBUSY;
258 }
259
260 adf_dev_shutdown(accel_dev);
261
262 pci_disable_busmaster(dev);
263 adf_cleanup_accel(accel_dev);
264 mutex_destroy(&accel_dev->lock);
265
266 return 0;
267 }
268
269 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe),
270 DEVMETHOD(device_attach, adf_attach),
271 DEVMETHOD(device_detach, adf_detach),
272
273 DEVMETHOD_END };
274
275 static driver_t adf_driver = { "qat",
276 adf_methods,
277 sizeof(struct adf_accel_dev) };
278
279 DRIVER_MODULE_ORDERED(qat_c62x, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD);
280 MODULE_VERSION(qat_c62x, 1);
281 MODULE_DEPEND(qat_c62x, qat_common, 1, 1, 1);
282 MODULE_DEPEND(qat_c62x, qat_api, 1, 1, 1);
283 MODULE_DEPEND(qat_c62x, linuxkpi, 1, 1, 1);
284