1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
3 #include "qat_freebsd.h"
4 #include "adf_cfg.h"
5 #include "adf_common_drv.h"
6 #include "adf_accel_devices.h"
7 #include "adf_c4xxx_hw_data.h"
8 #include "adf_fw_counters.h"
9 #include "adf_cfg_device.h"
10 #include <sys/types.h>
11 #include <sys/kernel.h>
12 #include <sys/malloc.h>
13 #include <machine/bus_dma.h>
14 #include <dev/pci/pcireg.h>
15 #include "adf_heartbeat_dbg.h"
16 #include "adf_cnvnr_freq_counters.h"
17
18 static MALLOC_DEFINE(M_QAT_C4XXX, "qat_c4xx", "qat_c4xx");
19
20 #define ADF_SYSTEM_DEVICE(device_id) \
21 { \
22 PCI_VENDOR_ID_INTEL, device_id \
23 }
24
25 static const struct pci_device_id adf_pci_tbl[] =
26 { ADF_SYSTEM_DEVICE(ADF_C4XXX_PCI_DEVICE_ID),
27 {
28 0,
29 } };
30
31 static int
adf_probe(device_t dev)32 adf_probe(device_t dev)
33 {
34 const struct pci_device_id *id;
35
36 for (id = adf_pci_tbl; id->vendor != 0; id++) {
37 if (pci_get_vendor(dev) == id->vendor &&
38 pci_get_device(dev) == id->device) {
39 device_set_desc(dev,
40 "Intel " ADF_C4XXX_DEVICE_NAME
41 " QuickAssist");
42 return BUS_PROBE_GENERIC;
43 }
44 }
45 return ENXIO;
46 }
47
48 static void
adf_cleanup_accel(struct adf_accel_dev * accel_dev)49 adf_cleanup_accel(struct adf_accel_dev *accel_dev)
50 {
51 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
52 int i;
53
54 if (accel_dev->dma_tag)
55 bus_dma_tag_destroy(accel_dev->dma_tag);
56 for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
57 struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
58
59 if (bar->virt_addr)
60 bus_free_resource(accel_pci_dev->pci_dev,
61 SYS_RES_MEMORY,
62 bar->virt_addr);
63 }
64
65 if (accel_dev->hw_device) {
66 switch (pci_get_device(accel_pci_dev->pci_dev)) {
67 case ADF_C4XXX_PCI_DEVICE_ID:
68 adf_clean_hw_data_c4xxx(accel_dev->hw_device);
69 break;
70 default:
71 break;
72 }
73 free(accel_dev->hw_device, M_QAT_C4XXX);
74 accel_dev->hw_device = NULL;
75 }
76 adf_cfg_dev_remove(accel_dev);
77 adf_devmgr_rm_dev(accel_dev, NULL);
78 }
79
80 static int
adf_attach(device_t dev)81 adf_attach(device_t dev)
82 {
83 struct adf_accel_dev *accel_dev;
84 struct adf_accel_pci *accel_pci_dev;
85 struct adf_hw_device_data *hw_data;
86 unsigned int i, bar_nr;
87 int ret, rid;
88 struct adf_cfg_device *cfg_dev = NULL;
89
90 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of
91 * Pci-passthrough causing Maxpayload to be reset to 128 bytes
92 * when the device is reset.
93 */
94 if (pci_get_max_payload(dev) != 256)
95 pci_set_max_payload(dev, 256);
96
97 accel_dev = device_get_softc(dev);
98
99 INIT_LIST_HEAD(&accel_dev->crypto_list);
100 accel_pci_dev = &accel_dev->accel_pci_dev;
101 accel_pci_dev->pci_dev = dev;
102
103 if (bus_get_domain(dev, &accel_pci_dev->node) != 0)
104 accel_pci_dev->node = 0;
105
106 /* XXX: Revisit if we actually need a devmgr table at all. */
107
108 /* Add accel device to accel table.
109 * This should be called before adf_cleanup_accel is called
110 */
111 if (adf_devmgr_add_dev(accel_dev, NULL)) {
112 device_printf(dev, "Failed to add new accelerator device.\n");
113 return ENXIO;
114 }
115
116 /* Allocate and configure device configuration structure */
117 hw_data = malloc(sizeof(*hw_data), M_QAT_C4XXX, M_WAITOK | M_ZERO);
118
119 accel_dev->hw_device = hw_data;
120 adf_init_hw_data_c4xxx(accel_dev->hw_device);
121 accel_pci_dev->revid = pci_get_revid(dev);
122 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4);
123
124 /* Get PPAERUCM values and store */
125 ret = adf_aer_store_ppaerucm_reg(dev, hw_data);
126 if (ret)
127 goto out_err;
128
129 /* Get Accelerators and Accelerators Engines masks */
130 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev);
131 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev);
132 hw_data->admin_ae_mask = hw_data->ae_mask;
133
134 /* If the device has no acceleration engines then ignore it. */
135 if (!hw_data->accel_mask || !hw_data->ae_mask ||
136 (~hw_data->ae_mask & 0x01)) {
137 device_printf(dev, "No acceleration units found\n");
138 ret = ENXIO;
139 goto out_err;
140 }
141
142 /* Create device configuration table */
143 ret = adf_cfg_dev_add(accel_dev);
144 if (ret)
145 goto out_err;
146
147 ret = adf_clock_debugfs_add(accel_dev);
148 if (ret)
149 goto out_err;
150
151 pci_set_max_read_req(dev, 1024);
152
153 ret = bus_dma_tag_create(bus_get_dma_tag(dev),
154 1,
155 0,
156 BUS_SPACE_MAXADDR,
157 BUS_SPACE_MAXADDR,
158 NULL,
159 NULL,
160 BUS_SPACE_MAXSIZE,
161 /*BUS_SPACE_UNRESTRICTED*/ 1,
162 BUS_SPACE_MAXSIZE,
163 0,
164 NULL,
165 NULL,
166 &accel_dev->dma_tag);
167 if (ret)
168 goto out_err;
169
170 if (hw_data->get_accel_cap) {
171 hw_data->accel_capabilities_mask =
172 hw_data->get_accel_cap(accel_dev);
173 }
174
175 accel_pci_dev->sku = hw_data->get_sku(hw_data);
176
177 /* Find and map all the device's BARS */
178 i = 0;
179 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0;
180 bar_nr++) {
181 struct adf_bar *bar;
182
183 /*
184 * XXX: This isn't quite right as it will ignore a BAR
185 * that wasn't assigned a valid resource range by the
186 * firmware.
187 */
188 rid = PCIR_BAR(bar_nr);
189 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0)
190 continue;
191 bar = &accel_pci_dev->pci_bars[i++];
192 bar->virt_addr = bus_alloc_resource_any(dev,
193 SYS_RES_MEMORY,
194 &rid,
195 RF_ACTIVE);
196 if (!bar->virt_addr) {
197 device_printf(dev, "Failed to map BAR %d\n", bar_nr);
198 ret = ENXIO;
199 goto out_err;
200 }
201 bar->base_addr = rman_get_start(bar->virt_addr);
202 bar->size = rman_get_start(bar->virt_addr);
203 }
204 pci_enable_busmaster(dev);
205
206 if (!accel_dev->hw_device->config_device) {
207 ret = EFAULT;
208 goto out_err;
209 }
210
211 ret = accel_dev->hw_device->config_device(accel_dev);
212 if (ret)
213 goto out_err;
214
215 ret = adf_dev_init(accel_dev);
216 if (ret)
217 goto out_dev_shutdown;
218
219 ret = adf_dev_start(accel_dev);
220 if (ret)
221 goto out_dev_stop;
222
223 cfg_dev = accel_dev->cfg->dev;
224 adf_cfg_device_clear(cfg_dev, accel_dev);
225 free(cfg_dev, M_QAT);
226 accel_dev->cfg->dev = NULL;
227 return ret;
228 out_dev_stop:
229 adf_dev_stop(accel_dev);
230 out_dev_shutdown:
231 adf_dev_shutdown(accel_dev);
232 out_err:
233 adf_cleanup_accel(accel_dev);
234 return ret;
235 }
236
237 static int
adf_detach(device_t dev)238 adf_detach(device_t dev)
239 {
240 struct adf_accel_dev *accel_dev = device_get_softc(dev);
241
242 if (adf_dev_stop(accel_dev)) {
243 device_printf(dev, "Failed to stop QAT accel dev\n");
244 return EBUSY;
245 }
246
247 adf_dev_shutdown(accel_dev);
248
249 adf_cleanup_accel(accel_dev);
250
251 return 0;
252 }
253
254 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe),
255 DEVMETHOD(device_attach, adf_attach),
256 DEVMETHOD(device_detach, adf_detach),
257
258 DEVMETHOD_END };
259
260 static driver_t adf_driver = { "qat",
261 adf_methods,
262 sizeof(struct adf_accel_dev) };
263
264 DRIVER_MODULE_ORDERED(qat_c4xxx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD);
265 MODULE_VERSION(qat_c4xxx, 1);
266 MODULE_DEPEND(qat_c4xxx, qat_common, 1, 1, 1);
267 MODULE_DEPEND(qat_c4xxx, qat_api, 1, 1, 1);
268 MODULE_DEPEND(qat_c4xxx, linuxkpi, 1, 1, 1);
269