1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2016 Nexenta Systems, Inc. 14 * Copyright 2022 RackTop Systems, Inc. 15 */ 16 17 #ifndef _PVSCSI_VAR_H_ 18 #define _PVSCSI_VAR_H_ 19 20 typedef struct pvscsi_dma_buf { 21 ddi_dma_handle_t dmah; 22 caddr_t addr; 23 uint64_t pa; 24 ddi_acc_handle_t acch; 25 } pvscsi_dma_buf_t; 26 27 #define PVSCSI_MAX_IO_PAGES 256 28 #define PVSCSI_MAX_IO_SIZE (PVSCSI_MAX_IO_PAGES * PAGE_SIZE) 29 #define PVSCSI_MAX_SG_SIZE (PVSCSI_MAX_IO_PAGES + 1) 30 31 typedef struct pvscsi_cmd { 32 struct scsi_pkt *pkt; 33 struct scsi_arq_status cmd_scb; 34 uint8_t cdb[SCSI_CDB_SIZE]; 35 size_t cdblen; 36 uint8_t tag; 37 uint8_t scsi_status; 38 uint32_t host_status; 39 uint64_t transferred; 40 boolean_t poll; 41 int target; 42 int lun; 43 uint32_t ctx; 44 list_node_t queue_node; 45 clock_t timeout; 46 clock_t start; 47 struct pvscsi_softc *pvs; 48 struct pvscsi_cmd *next_cmd; 49 50 ddi_dma_handle_t sgl_dmah; 51 ddi_acc_handle_t sgl_acch; 52 uint64_t sgl_pa; 53 struct PVSCSISGElement *sgl; 54 55 uint64_t arq_pa; 56 uint8_t arq_sense[SENSE_LENGTH]; 57 ddi_dma_handle_t arq_dmah; 58 59 uint32_t dma_dir; 60 61 uint8_t done; 62 uint8_t expired; 63 } pvscsi_cmd_t; 64 65 typedef struct pvscsi_msg { 66 struct pvscsi_softc *pvs; 67 int type; 68 int target; 69 int lun; 70 } pvscsi_msg_t; 71 72 typedef struct pvscsi_device { 73 list_node_t node; 74 struct pvscsi_softc *pvs; 75 int target; 76 int lun; 77 } pvscsi_device_t; 78 79 typedef struct pvscsi_softc { 80 dev_info_t *dip; 81 scsi_hba_tran_t *tran; 82 scsi_hba_tgtmap_t *tgtmap; 83 pvscsi_dma_buf_t state_buf; 84 pvscsi_dma_buf_t req_ring_buf; 85 uint_t req_pages; 86 uint_t req_depth; 87 pvscsi_dma_buf_t cmp_ring_buf; 88 uint_t cmp_pages; 89 pvscsi_dma_buf_t msg_ring_buf; 90 uint_t msg_pages; 91 ddi_acc_handle_t mmio_handle; 92 caddr_t mmio_base; 93 int intr_cnt; 94 int intr_pri; 95 int intr_type; 96 uint32_t max_targets; 97 ddi_intr_handle_t intr_handles[PVSCSI_MAX_INTRS]; 98 list_t cmd_queue; 99 list_t devices; 100 kmutex_t lock; 101 ddi_taskq_t *tq; 102 timeout_id_t timeout; 103 boolean_t detach; 104 } pvscsi_softc_t; 105 106 #define REQ_RING(pvs) \ 107 ((struct PVSCSIRingReqDesc *)((pvs)->req_ring_buf.addr)) 108 109 #define CMP_RING(pvs) \ 110 ((struct PVSCSIRingCmpDesc *)((pvs)->cmp_ring_buf.addr)) 111 112 #define MSG_RING(pvs) \ 113 ((struct PVSCSIRingMsgDesc *)((pvs)->msg_ring_buf.addr)) 114 115 #define RINGS_STATE(pvs) \ 116 ((struct PVSCSIRingsState *)((pvs)->state_buf.addr)) 117 118 #define PVSCSI_MAXTGTS 16 119 120 #define PAGE_SIZE 4096 121 #define PAGE_SHIFT 12 122 123 #define PVSCSI_DEFAULT_NUM_PAGES_PER_RING 8 124 #define PVSCSI_DEFAULT_NUM_PAGES_MSG_RING 1 125 126 #endif /* _PVSCSI_VAR_H_ */ 127