xref: /freebsd/sys/powerpc/powerpc/swtch32.S (revision 71625ec9ad2a9bc8c09784fbd23b759830e0ee5f)
1/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */
2
3/*-
4 * Copyright (C) 2001 Benno Rice
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26*/
27/*-
28 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
29 * Copyright (C) 1995, 1996 TooLs GmbH.
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 *    notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 *    notice, this list of conditions and the following disclaimer in the
39 *    documentation and/or other materials provided with the distribution.
40 * 3. All advertising materials mentioning features or use of this software
41 *    must display the following acknowledgement:
42 *	This product includes software developed by TooLs GmbH.
43 * 4. The name of TooLs GmbH may not be used to endorse or promote products
44 *    derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
49 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 */
57
58#include "assym.inc"
59#include "opt_sched.h"
60
61#include <sys/syscall.h>
62
63#include <machine/trap.h>
64#include <machine/param.h>
65#include <machine/asm.h>
66#include <machine/spr.h>
67
68/*
69 * void cpu_throw(struct thread *old, struct thread *new)
70 */
71ENTRY(cpu_throw)
72	mr	%r2, %r4
73	li	%r14,0	/* Tell cpu_switchin not to release a thread */
74
75	b	cpu_switchin
76END(cpu_throw)
77
78/*
79 * void cpu_switch(struct thread *old,
80 *		   struct thread *new,
81 *		   struct mutex *mtx);
82 *
83 * Switch to a new thread saving the current state in the old thread.
84 */
85ENTRY(cpu_switch)
86	lwz	%r6,TD_PCB(%r3)		/* Get the old thread's PCB ptr */
87	stmw	%r12,PCB_CONTEXT(%r6)	/* Save the non-volatile GP regs.
88					   These can now be used for scratch */
89
90	mfcr	%r16			/* Save the condition register */
91	stw	%r16,PCB_CR(%r6)
92	mflr	%r16			/* Save the link register */
93	stw	%r16,PCB_LR(%r6)
94	stw	%r1,PCB_SP(%r6)		/* Save the stack pointer */
95	bl	1f
961:
97	mflr	%r30			/* Prepare for secure-PLT calls */
98	addis	%r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@ha
99	addi	%r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@l
100
101	mr	%r14,%r3		/* Copy the old thread ptr... */
102	mr	%r2,%r4			/* and the new thread ptr in curthread */
103	mr	%r16,%r5		/* and the new lock */
104	mr	%r17,%r6		/* and the PCB */
105
106	/* Keep this next section in sync with cpu_save_thread_regs()! */
107
108	lwz	%r18,PCB_FLAGS(%r17)
109	/* Save FPU context if needed */
110	andi.	%r7, %r18, PCB_FPU
111	beq	.L1
112	bl	save_fpu
113
114.L1:
115	mr	%r3,%r14		/* restore old thread ptr */
116	/* Save Altivec context if needed */
117	andi.	%r7, %r18, PCB_VEC
118	beq	.L2
119	bl	save_vec
120
121.L2:
122#if defined(__SPE__)
123	mfspr	%r3,SPR_SPEFSCR
124	stw	%r3,PCB_VSCR(%r17)
125#endif
126	mr	%r3,%r14		/* restore old thread ptr */
127	bl	pmap_deactivate		/* Deactivate the current pmap */
128
129	sync				/* Make sure all of that finished */
130
131cpu_switchin:
132#if defined(SMP) && defined(SCHED_ULE)
133	/* Wait for the new thread to become unblocked */
134	bl	1f
1351:
136	mflr	%r6
137	addis	%r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@ha
138	addi	%r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@l
139	mr	%r30, %r6		/* Prepare for secure-PLT calls */
140	lwz	%r6,blocked_lock@got(%r6)
141blocked_loop:
142	lwz	%r7,TD_LOCK(%r2)
143	cmpw	%r6,%r7
144	beq-	blocked_loop
145	isync
146#endif
147
148	lwz	%r17,TD_PCB(%r2)	/* Get new current PCB */
149	lwz	%r1,PCB_SP(%r17)	/* Load new stack pointer */
150
151	/* Release old thread now that we have a stack pointer set up */
152	cmpwi	%r14,0
153	beq-	1f
154	stw	%r16,TD_LOCK(%r14)	/* ULE:	update old thread's lock */
155
1561:	mfsprg	%r7,0			/* Get the pcpu pointer */
157	stw	%r2,PC_CURTHREAD(%r7)	/* Store new current thread */
158	lwz	%r17,TD_PCB(%r2)	/* Store new current PCB */
159	stw	%r17,PC_CURPCB(%r7)
160
161	mr	%r3,%r2			/* Get new thread ptr */
162	bl	pmap_activate		/* Activate the new address space */
163
164	lwz	%r19, PCB_FLAGS(%r17)
165	/* Restore FPU context if needed */
166	andi.	%r6, %r19, PCB_FPU
167	beq	.L3
168	mr	%r3,%r2			/* Pass curthread to enable_fpu */
169	bl	enable_fpu
170
171.L3:
172	/* Restore Altivec context if needed */
173	andi.	%r6, %r19, PCB_VEC
174	beq	.L4
175	mr	%r3,%r2			/* Pass curthread to enable_vec */
176	bl	enable_vec
177
178.L4:
179#if defined(__SPE__)
180	lwz	%r3,PCB_VSCR(%r17)
181	mtspr	SPR_SPEFSCR,%r3
182#endif
183	/* thread to restore is in r3 */
184	mr	%r3,%r17		/* Recover PCB ptr */
185	lmw	%r12,PCB_CONTEXT(%r3)	/* Load the non-volatile GP regs */
186	lwz	%r5,PCB_CR(%r3)		/* Load the condition register */
187	mtcr	%r5
188	lwz	%r5,PCB_LR(%r3)		/* Load the link register */
189	mtlr	%r5
190	lwz	%r1,PCB_SP(%r3)		/* Load the stack pointer */
191	/*
192	 * Perform a dummy stwcx. to clear any reservations we may have
193	 * inherited from the previous thread. It doesn't matter if the
194	 * stwcx succeeds or not. pcb_context[0] can be clobbered.
195	 */
196	stwcx.	%r1, 0, %r3
197	blr
198END(cpu_switch)
199
200/*
201 * savectx(pcb)
202 * Update pcb, saving current processor state
203 */
204ENTRY(savectx)
205	stmw	%r12,PCB_CONTEXT(%r3)	/* Save the non-volatile GP regs */
206	mfcr	%r4			/* Save the condition register */
207	stw	%r4,PCB_CR(%r3)
208	stw	%r1,PCB_SP(%r3)		/* Save the stack pointer */
209	mflr	%r4			/* Save the link register */
210	stw	%r4,PCB_LR(%r3)
211	blr
212END(savectx)
213
214/*
215 * fork_trampoline()
216 * Set up the return from cpu_fork()
217 */
218ENTRY(fork_trampoline)
219	lwz	%r3,CF_FUNC(%r1)
220	lwz	%r4,CF_ARG0(%r1)
221	lwz	%r5,CF_ARG1(%r1)
222	bl	fork_exit
223	addi	%r1,%r1,CF_SIZE-FSP	/* Allow 8 bytes in front of
224					   trapframe to simulate FRAME_SETUP
225					   does when allocating space for
226					   a frame pointer/saved LR */
227#ifdef __SPE__
228	li	%r3,SPEFSCR_DFLT
229	mtspr	SPR_SPEFSCR, %r3
230#endif
231	b	trapexit
232END(fork_trampoline)
233