1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 #include <sys/param.h>
28 #include <sys/systm.h>
29 #include <sys/sysmacros.h>
30 #include <sys/sunddi.h>
31 #include <sys/esunddi.h>
32
33 #include <sys/platform_module.h>
34 #include <sys/errno.h>
35 #include <sys/cpu_sgnblk_defs.h>
36 #include <sys/rmc_comm_dp.h>
37 #include <sys/rmc_comm_drvintf.h>
38 #include <sys/modctl.h>
39 #include <sys/lgrp.h>
40 #include <sys/memnode.h>
41 #include <sys/promif.h>
42
43 #define SHARED_MI2CV_PATH "/i2c@1f,520000"
44 static dev_info_t *shared_mi2cv_dip;
45 static kmutex_t mi2cv_mutex;
46
47 int (*p2get_mem_unum)(int, uint64_t, char *, int, int *);
48 static void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int);
49 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL;
50
51 void
startup_platform(void)52 startup_platform(void)
53 {
54 mutex_init(&mi2cv_mutex, NULL, NULL, NULL);
55 }
56
57 int
set_platform_tsb_spares()58 set_platform_tsb_spares()
59 {
60 return (0);
61 }
62
63 void
set_platform_defaults(void)64 set_platform_defaults(void)
65 {
66 extern char *tod_module_name;
67 /* Set appropriate tod module */
68 if (tod_module_name == NULL)
69 tod_module_name = "todm5823";
70
71 cpu_sgn_func = cpu_sgn_update;
72 }
73
74 /*
75 * these two dummy functions are loaded over the original
76 * todm5823 set and clear_power_alarm functions. On Boston
77 * these functions are not supported, and thus we need to provide
78 * dummy functions that just returns.
79 * On Boston, clock chip is not persistant across reboots,
80 * and moreover it has a bug sending memory access.
81 * This fix is done by writing over the original
82 * tod_ops function pointer with our dummy replacement functions.
83 */
84 /*ARGSUSED*/
85 static void
dummy_todm5823_set_power_alarm(timestruc_t ts)86 dummy_todm5823_set_power_alarm(timestruc_t ts)
87 {
88 }
89
90 static void
dummy_todm5823_clear_power_alarm(void)91 dummy_todm5823_clear_power_alarm(void)
92 {
93 }
94
95 /*
96 * Definitions for accessing the pci config space of the isa node
97 * of Southbridge.
98 */
99 static ddi_acc_handle_t isa_handle = NULL; /* handle for isa pci space */
100
101 /*
102 * Definition for accessing rmclomv
103 */
104 #define RMCLOMV_PATHNAME "/pseudo/rmclomv@0"
105
106 void
load_platform_drivers(void)107 load_platform_drivers(void)
108 {
109 /*
110 * It is OK to return error because 'us' driver is not available
111 * in all clusters (e.g. missing in Core cluster).
112 */
113 (void) i_ddi_attach_hw_nodes("us");
114
115
116 /*
117 * mc-us3i must stay loaded for plat_get_mem_unum()
118 */
119 if (i_ddi_attach_hw_nodes("mc-us3i") != DDI_SUCCESS)
120 cmn_err(CE_WARN, "mc-us3i driver failed to install");
121 (void) ddi_hold_driver(ddi_name_to_major("mc-us3i"));
122
123 /*
124 * load the power button driver
125 */
126 if (i_ddi_attach_hw_nodes("power") != DDI_SUCCESS)
127 cmn_err(CE_WARN, "power button driver failed to install");
128 (void) ddi_hold_driver(ddi_name_to_major("power"));
129
130 /*
131 * load the GPIO driver for the ALOM reset and watchdog lines
132 */
133 if (i_ddi_attach_hw_nodes("pmugpio") != DDI_SUCCESS)
134 cmn_err(CE_WARN, "pmugpio failed to install");
135 else {
136 extern int watchdog_enable, watchdog_available;
137 extern int disable_watchdog_on_exit;
138
139 /*
140 * Disable an active h/w watchdog timer upon exit to OBP.
141 */
142 disable_watchdog_on_exit = 1;
143
144 watchdog_enable = 1;
145 watchdog_available = 1;
146 }
147 (void) ddi_hold_driver(ddi_name_to_major("pmugpio"));
148
149 /*
150 * Figure out which mi2cv dip is shared with OBP for the nvram
151 * device, so the lock can be acquired.
152 */
153 shared_mi2cv_dip = e_ddi_hold_devi_by_path(SHARED_MI2CV_PATH, 0);
154
155 /*
156 * Load the environmentals driver (rmclomv)
157 *
158 * We need this driver to handle events from the RMC when state
159 * changes occur in the environmental data.
160 */
161 if (i_ddi_attach_hw_nodes("rmc_comm") != DDI_SUCCESS) {
162 cmn_err(CE_WARN, "rmc_comm failed to install");
163 } else {
164 (void) ddi_hold_driver(ddi_name_to_major("rmc_comm"));
165
166 if (e_ddi_hold_devi_by_path(RMCLOMV_PATHNAME, 0) == NULL) {
167 cmn_err(CE_WARN, "Could not install rmclomv driver\n");
168 }
169 }
170
171 /*
172 * These two dummy functions are loaded over the original
173 * todm5823 set and clear_power_alarm functions. On Boston,
174 * these functionalities are not supported.
175 * The load_platform_drivers(void) is called from post_startup()
176 * which is after all the initialization of the tod module is
177 * finished, then we replace 2 of the tod_ops function pointers
178 * with our dummy version.
179 */
180 tod_ops.tod_set_power_alarm = dummy_todm5823_set_power_alarm;
181 tod_ops.tod_clear_power_alarm = dummy_todm5823_clear_power_alarm;
182
183 /*
184 * create a handle to the rmc_comm_request_nowait() function
185 * inside the rmc_comm module.
186 *
187 * The Seattle/Boston todm5823 driver will use this handle to
188 * use the rmc_comm_request_nowait() function to send time/date
189 * updates to ALOM.
190 */
191 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t))
192 modgetsymvalue("rmc_comm_request_nowait", 0);
193 }
194
195 /*
196 * This routine is needed if a device error or timeout occurs before the
197 * driver is loaded.
198 */
199 /*ARGSUSED*/
200 int
plat_ide_chipreset(dev_info_t * dip,int chno)201 plat_ide_chipreset(dev_info_t *dip, int chno)
202 {
203 int ret = DDI_SUCCESS;
204
205 if (isa_handle == NULL) {
206 return (DDI_FAILURE);
207 }
208
209 /*
210 * This will be filled in with the reset logic
211 * for the ULI1573 when that becomes available.
212 * currently this is just a stub.
213 */
214 return (ret);
215 }
216
217
218 /*ARGSUSED*/
219 int
plat_cpu_poweron(struct cpu * cp)220 plat_cpu_poweron(struct cpu *cp)
221 {
222 return (ENOTSUP); /* not supported on this platform */
223 }
224
225 /*ARGSUSED*/
226 int
plat_cpu_poweroff(struct cpu * cp)227 plat_cpu_poweroff(struct cpu *cp)
228 {
229 return (ENOTSUP); /* not supported on this platform */
230 }
231
232 /*ARGSUSED*/
233 void
plat_freelist_process(int mnode)234 plat_freelist_process(int mnode)
235 {
236 }
237
238 char *platform_module_list[] = {
239 "mi2cv",
240 "pca9556",
241 (char *)0
242 };
243
244 /*ARGSUSED*/
245 void
plat_tod_fault(enum tod_fault_type tod_bad)246 plat_tod_fault(enum tod_fault_type tod_bad)
247 {
248 }
249
250 /*ARGSUSED*/
251 int
plat_get_mem_unum(int synd_code,uint64_t flt_addr,int flt_bus_id,int flt_in_memory,ushort_t flt_status,char * buf,int buflen,int * lenp)252 plat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id,
253 int flt_in_memory, ushort_t flt_status, char *buf, int buflen, int *lenp)
254 {
255 if (flt_in_memory && (p2get_mem_unum != NULL))
256 return (p2get_mem_unum(synd_code, P2ALIGN(flt_addr, 8),
257 buf, buflen, lenp));
258 else
259 return (ENOTSUP);
260 }
261
262 /*
263 * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3i
264 * driver giving each platform the opportunity to add platform
265 * specific label information to the unum for ECC error logging purposes.
266 */
267 /*ARGSUSED*/
268 void
plat_add_mem_unum_label(char * unum,int mcid,int bank,int dimm)269 plat_add_mem_unum_label(char *unum, int mcid, int bank, int dimm)
270 {
271 char old_unum[UNUM_NAMLEN];
272 int printed;
273 int buflen = UNUM_NAMLEN;
274
275 (void) strcpy(old_unum, unum);
276 printed = snprintf(unum, buflen, "MB/C%d/P0/B%d", mcid, bank);
277 buflen -= printed;
278 unum += printed;
279
280 if (dimm != -1) {
281 printed = snprintf(unum, buflen, "/D%d", dimm);
282 buflen -= printed;
283 unum += printed;
284 }
285
286 (void) snprintf(unum, buflen, ": %s", old_unum);
287 }
288
289 /*ARGSUSED*/
290 int
plat_get_cpu_unum(int cpuid,char * buf,int buflen,int * lenp)291 plat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp)
292 {
293 if (snprintf(buf, buflen, "MB/C%d", cpuid) >= buflen) {
294 return (ENOSPC);
295 } else {
296 *lenp = strlen(buf);
297 return (0);
298 }
299 }
300
301 /*
302 * Our nodename has been set, pass it along to the RMC.
303 */
304 void
plat_nodename_set(void)305 plat_nodename_set(void)
306 {
307 rmc_comm_msg_t req; /* request */
308 int (*rmc_req_res)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t) = NULL;
309
310 /*
311 * find the symbol for the mailbox routine
312 */
313 rmc_req_res = (int (*)(rmc_comm_msg_t *, rmc_comm_msg_t *, time_t))
314 modgetsymvalue("rmc_comm_request_response", 0);
315
316 if (rmc_req_res == NULL) {
317 return;
318 }
319
320 /*
321 * construct the message telling the RMC our nodename
322 */
323 req.msg_type = DP_SET_CPU_NODENAME;
324 req.msg_len = strlen(utsname.nodename) + 1;
325 req.msg_bytes = 0;
326 req.msg_buf = (caddr_t)utsname.nodename;
327
328 /*
329 * ship it
330 */
331 (void) (rmc_req_res)(&req, NULL, 2000);
332 }
333
334 sig_state_t current_sgn;
335
336 /*
337 * cpu signatures - we're only interested in the overall system
338 * "signature" on this platform - not individual cpu signatures
339 */
340 /*ARGSUSED*/
341 static void
cpu_sgn_update(ushort_t sig,uchar_t state,uchar_t sub_state,int cpuid)342 cpu_sgn_update(ushort_t sig, uchar_t state, uchar_t sub_state, int cpuid)
343 {
344 dp_cpu_signature_t signature;
345 rmc_comm_msg_t req; /* request */
346 int (*rmc_req_now)(rmc_comm_msg_t *, uint8_t) = NULL;
347
348
349 /*
350 * Differentiate a panic reboot from a non-panic reboot in the
351 * setting of the substate of the signature.
352 *
353 * If the new substate is REBOOT and we're rebooting due to a panic,
354 * then set the new substate to a special value indicating a panic
355 * reboot, SIGSUBST_PANIC_REBOOT.
356 *
357 * A panic reboot is detected by a current (previous) signature
358 * state of SIGST_EXIT, and a new signature substate of SIGSUBST_REBOOT.
359 * The domain signature state SIGST_EXIT is used as the panic flow
360 * progresses.
361 *
362 * At the end of the panic flow, the reboot occurs but we should know
363 * one that was involuntary, something that may be quite useful to know
364 * at OBP level.
365 */
366 if (state == SIGST_EXIT && sub_state == SIGSUBST_REBOOT) {
367 if (current_sgn.state_t.state == SIGST_EXIT &&
368 current_sgn.state_t.sub_state != SIGSUBST_REBOOT)
369 sub_state = SIGSUBST_PANIC_REBOOT;
370 }
371
372 /*
373 * offline and detached states only apply to a specific cpu
374 * so ignore them.
375 */
376 if (state == SIGST_OFFLINE || state == SIGST_DETACHED) {
377 return;
378 }
379
380 current_sgn.signature = CPU_SIG_BLD(sig, state, sub_state);
381
382 /*
383 * find the symbol for the mailbox routine
384 */
385 rmc_req_now = (int (*)(rmc_comm_msg_t *, uint8_t))
386 modgetsymvalue("rmc_comm_request_nowait", 0);
387 if (rmc_req_now == NULL) {
388 return;
389 }
390
391 signature.cpu_id = -1;
392 signature.sig = sig;
393 signature.states = state;
394 signature.sub_state = sub_state;
395 req.msg_type = DP_SET_CPU_SIGNATURE;
396 req.msg_len = (int)(sizeof (signature));
397 req.msg_bytes = 0;
398 req.msg_buf = (caddr_t)&signature;
399
400 /*
401 * We need to tell the SP that the host is about to stop running. The
402 * SP will then allow the date to be set at its console, it will change
403 * state of the activity indicator, it will display the correct host
404 * status, and it will stop sending console messages and alerts to the
405 * host communication channel.
406 *
407 * This requires the RMC_COMM_DREQ_URGENT as we want to
408 * be sure activity indicators will reflect the correct status.
409 *
410 * When sub_state SIGSUBST_DUMP is sent, the urgent flag
411 * (RMC_COMM_DREQ_URGENT) is not required as SIGSUBST_PANIC_REBOOT
412 * has already been sent and changed activity indicators.
413 */
414 if (state == SIGST_EXIT && (sub_state == SIGSUBST_HALT ||
415 sub_state == SIGSUBST_REBOOT || sub_state == SIGSUBST_ENVIRON ||
416 sub_state == SIGSUBST_PANIC_REBOOT))
417 (void) (rmc_req_now)(&req, RMC_COMM_DREQ_URGENT);
418 else
419 (void) (rmc_req_now)(&req, 0);
420 }
421
422 /*
423 * Fiesta support for lgroups.
424 *
425 * On fiesta platform, an lgroup platform handle == CPU id
426 */
427
428 /*
429 * Macro for extracting the CPU number from the CPU id
430 */
431 #define CPUID_TO_LGRP(id) ((id) & 0x7)
432 #define PLATFORM_MC_SHIFT 36
433
434 /*
435 * Return the platform handle for the lgroup containing the given CPU
436 */
437 void *
plat_lgrp_cpu_to_hand(processorid_t id)438 plat_lgrp_cpu_to_hand(processorid_t id)
439 {
440 return ((void *)(uintptr_t)CPUID_TO_LGRP(id));
441 }
442
443 /*
444 * Platform specific lgroup initialization
445 */
446 void
plat_lgrp_init(void)447 plat_lgrp_init(void)
448 {
449 pnode_t curnode;
450 char tmp_name[sizeof (OBP_CPU) + 1]; /* extra padding */
451 int portid;
452 int cpucnt = 0;
453 int max_portid = -1;
454 extern uint32_t lgrp_expand_proc_thresh;
455 extern uint32_t lgrp_expand_proc_diff;
456 extern pgcnt_t lgrp_mem_free_thresh;
457 extern uint32_t lgrp_loadavg_tolerance;
458 extern uint32_t lgrp_loadavg_max_effect;
459 extern uint32_t lgrp_load_thresh;
460 extern lgrp_mem_policy_t lgrp_mem_policy_root;
461
462 /*
463 * Count the number of CPUs installed to determine if
464 * NUMA optimization should be enabled or not.
465 *
466 * All CPU nodes reside in the root node and have a
467 * device type "cpu".
468 */
469 curnode = prom_rootnode();
470 for (curnode = prom_childnode(curnode); curnode;
471 curnode = prom_nextnode(curnode)) {
472 bzero(tmp_name, sizeof (tmp_name));
473 if (prom_bounded_getprop(curnode, OBP_DEVICETYPE, tmp_name,
474 sizeof (OBP_CPU)) == -1 || strcmp(tmp_name, OBP_CPU) != 0)
475 continue;
476
477 cpucnt++;
478
479 if (prom_getprop(curnode, "portid", (caddr_t)&portid) !=
480 -1 && portid > max_portid)
481 max_portid = portid;
482 }
483 if (cpucnt <= 1)
484 max_mem_nodes = 1;
485 else if (max_portid >= 0 && max_portid < MAX_MEM_NODES)
486 max_mem_nodes = max_portid + 1;
487
488 /*
489 * Set tuneables for fiesta architecture
490 *
491 * lgrp_expand_proc_thresh is the minimum load on the lgroups
492 * this process is currently running on before considering
493 * expanding threads to another lgroup.
494 *
495 * lgrp_expand_proc_diff determines how much less the remote lgroup
496 * must be loaded before expanding to it.
497 *
498 * Optimize for memory bandwidth by spreading multi-threaded
499 * program to different lgroups.
500 */
501 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1;
502 lgrp_expand_proc_diff = lgrp_loadavg_max_effect / 2;
503 lgrp_loadavg_tolerance = lgrp_loadavg_max_effect / 2;
504 lgrp_mem_free_thresh = 1; /* home lgrp must have some memory */
505 lgrp_expand_proc_thresh = lgrp_loadavg_max_effect - 1;
506 lgrp_mem_policy_root = LGRP_MEM_POLICY_NEXT;
507 lgrp_load_thresh = 0;
508
509 mem_node_pfn_shift = PLATFORM_MC_SHIFT - MMU_PAGESHIFT;
510 }
511
512 /*
513 * Return latency between "from" and "to" lgroups
514 *
515 * This latency number can only be used for relative comparison
516 * between lgroups on the running system, cannot be used across platforms,
517 * and may not reflect the actual latency. It is platform and implementation
518 * specific, so platform gets to decide its value. It would be nice if the
519 * number was at least proportional to make comparisons more meaningful though.
520 * NOTE: The numbers below are supposed to be load latencies for uncached
521 * memory divided by 10.
522 */
523 int
plat_lgrp_latency(void * from,void * to)524 plat_lgrp_latency(void *from, void *to)
525 {
526 /*
527 * Return remote latency when there are more than two lgroups
528 * (root and child) and getting latency between two different
529 * lgroups or root is involved
530 */
531 if (lgrp_optimizations() && (from != to || from ==
532 (void *) LGRP_DEFAULT_HANDLE || to == (void *) LGRP_DEFAULT_HANDLE))
533 return (17);
534 else
535 return (12);
536 }
537
538 int
plat_pfn_to_mem_node(pfn_t pfn)539 plat_pfn_to_mem_node(pfn_t pfn)
540 {
541 ASSERT(max_mem_nodes > 1);
542 return (pfn >> mem_node_pfn_shift);
543 }
544
545 /*
546 * Assign memnode to lgroups
547 */
548 void
plat_fill_mc(pnode_t nodeid)549 plat_fill_mc(pnode_t nodeid)
550 {
551 int portid;
552
553 /*
554 * Memory controller portid == global CPU id
555 */
556 if ((prom_getprop(nodeid, "portid", (caddr_t)&portid) == -1) ||
557 (portid < 0))
558 return;
559
560 if (portid < max_mem_nodes)
561 plat_assign_lgrphand_to_mem_node((lgrp_handle_t)portid, portid);
562 }
563
564
565 /*
566 * Common locking enter code
567 */
568 void
plat_setprop_enter(void)569 plat_setprop_enter(void)
570 {
571 mutex_enter(&mi2cv_mutex);
572 }
573
574 /*
575 * Common locking exit code
576 */
577 void
plat_setprop_exit(void)578 plat_setprop_exit(void)
579 {
580 mutex_exit(&mi2cv_mutex);
581 }
582
583 /*
584 * Called by mi2cv driver
585 */
586 void
plat_shared_i2c_enter(dev_info_t * i2cnexus_dip)587 plat_shared_i2c_enter(dev_info_t *i2cnexus_dip)
588 {
589 if (i2cnexus_dip == shared_mi2cv_dip) {
590 plat_setprop_enter();
591 }
592 }
593
594 /*
595 * Called by mi2cv driver
596 */
597 void
plat_shared_i2c_exit(dev_info_t * i2cnexus_dip)598 plat_shared_i2c_exit(dev_info_t *i2cnexus_dip)
599 {
600 if (i2cnexus_dip == shared_mi2cv_dip) {
601 plat_setprop_exit();
602 }
603 }
604
605 /*
606 * Called by todm5823 driver
607 */
608 void
plat_rmc_comm_req(struct rmc_comm_msg * request)609 plat_rmc_comm_req(struct rmc_comm_msg *request)
610 {
611 if (rmc_req_now)
612 (void) rmc_req_now(request, 0);
613 }
614