1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff) 4 * 5 * Written by: Aaro Koskinen <aaro.koskinen@iki.fi> 6 */ 7 8#include "omap36xx.dtsi" 9 10/ { 11 cpus { 12 cpu@0 { 13 cpu0-supply = <&vcc>; 14 }; 15 }; 16 17 memory@80000000 { 18 device_type = "memory"; 19 reg = <0x80000000 0x40000000>; /* 1 GB */ 20 }; 21 22 vemmc: fixedregulator0 { 23 compatible = "regulator-fixed"; 24 regulator-name = "VEMMC"; 25 regulator-min-microvolt = <2900000>; 26 regulator-max-microvolt = <2900000>; 27 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */ 28 startup-delay-us = <150>; 29 enable-active-high; 30 }; 31 32 vwlan_fixed: fixedregulator2 { 33 compatible = "regulator-fixed"; 34 regulator-name = "VWLAN"; 35 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */ 36 enable-active-high; 37 }; 38 39 leds { 40 compatible = "gpio-leds"; 41 42 heartbeat { 43 label = "debug::sleep"; 44 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; /* gpio92 */ 45 linux,default-trigger = "default-on"; 46 pinctrl-names = "default"; 47 pinctrl-0 = <&debug_leds>; 48 }; 49 }; 50 51 /* controlled (enabled/disabled) directly by wl1271 */ 52 vctcxo: vctcxo { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <38400000>; 56 }; 57}; 58 59&omap3_pmx_core { 60 accelerator_pins: accelerator-pins { 61 pinctrl-single,pins = < 62 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */ 63 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */ 64 >; 65 }; 66 67 debug_leds: debug-led-pins { 68 pinctrl-single,pins = < 69 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */ 70 >; 71 }; 72 73 mmc2_pins: mmc2-pins { 74 pinctrl-single,pins = < 75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */ 76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */ 77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */ 78 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */ 79 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */ 80 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */ 81 >; 82 }; 83 84 wlan_pins: wlan-pins { 85 pinctrl-single,pins = < 86 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */ 87 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */ 88 >; 89 }; 90 91 ssi_pins: ssi-pins { 92 pinctrl-single,pins = < 93 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */ 94 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */ 95 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */ 96 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */ 97 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */ 98 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */ 99 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */ 100 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */ 101 >; 102 }; 103 104 ssi_pins_idle: ssi-idle-pins { 105 pinctrl-single,pins = < 106 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */ 107 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */ 108 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */ 109 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */ 110 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */ 111 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */ 112 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */ 113 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7) /* ssi1_wake */ 114 >; 115 }; 116 117 modem_pins1: modem-core1-pins { 118 pinctrl-single,pins = < 119 OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4) /* gpio_34 (ape_rst_rq) */ 120 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */ 121 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */ 122 >; 123 }; 124 125 uart2_pins: uart2-pins { 126 pinctrl-single,pins = < 127 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */ 128 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */ 129 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ 130 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */ 131 >; 132 }; 133}; 134 135&omap3_pmx_core2 { 136 modem_pins2: modem-core2-pins { 137 pinctrl-single,pins = < 138 OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* gpio_23 (cmt_en) */ 139 >; 140 }; 141}; 142 143&i2c1 { 144 clock-frequency = <2900000>; 145 146 twl: twl@48 { 147 reg = <0x48>; 148 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 149 interrupt-parent = <&intc>; 150 }; 151}; 152 153/include/ "twl4030.dtsi" 154 155&twl { 156 compatible = "ti,twl5031"; 157 158 twl_power: power { 159 compatible = "ti,twl4030-power"; 160 ti,use_poweroff; 161 }; 162}; 163 164&twl_gpio { 165 ti,pullups = <0x000001>; /* BIT(0) */ 166 ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */ 167}; 168 169&vdac { 170 regulator-name = "vdac"; 171 regulator-min-microvolt = <1800000>; 172 regulator-max-microvolt = <1800000>; 173}; 174 175&vpll1 { 176 regulator-name = "vpll1"; 177 regulator-min-microvolt = <1800000>; 178 regulator-max-microvolt = <1800000>; 179}; 180 181&vpll2 { 182 regulator-name = "vpll2"; 183 regulator-min-microvolt = <1800000>; 184 regulator-max-microvolt = <1800000>; 185}; 186 187&vaux1 { 188 regulator-name = "vaux1"; 189 regulator-min-microvolt = <2800000>; 190 regulator-max-microvolt = <2800000>; 191}; 192 193/* CSI-2 receiver */ 194&vaux2 { 195 regulator-name = "vaux2"; 196 regulator-min-microvolt = <1800000>; 197 regulator-max-microvolt = <1800000>; 198}; 199 200/* Cameras */ 201&vaux3 { 202 regulator-name = "vaux3"; 203 regulator-min-microvolt = <2800000>; 204 regulator-max-microvolt = <2800000>; 205}; 206 207&vaux4 { 208 regulator-name = "vaux4"; 209 regulator-min-microvolt = <2800000>; 210 regulator-max-microvolt = <2800000>; 211}; 212 213&vmmc1 { 214 regulator-name = "vmmc1"; 215 regulator-min-microvolt = <1850000>; 216 regulator-max-microvolt = <3150000>; 217}; 218 219&vmmc2 { 220 regulator-name = "vmmc2"; 221 regulator-min-microvolt = <3000000>; 222 regulator-max-microvolt = <3000000>; 223}; 224 225&vintana1 { 226 regulator-name = "vintana1"; 227 regulator-min-microvolt = <1500000>; 228 regulator-max-microvolt = <1500000>; 229}; 230 231&vintana2 { 232 regulator-name = "vintana2"; 233 regulator-min-microvolt = <2750000>; 234 regulator-max-microvolt = <2750000>; 235}; 236 237&vintdig { 238 regulator-name = "vintdig"; 239 regulator-min-microvolt = <1500000>; 240 regulator-max-microvolt = <1500000>; 241}; 242 243&vsim { 244 regulator-name = "vsim"; 245 regulator-min-microvolt = <1800000>; 246 regulator-max-microvolt = <1800000>; 247}; 248 249&vio { 250 regulator-name = "vio"; 251 regulator-min-microvolt = <1800000>; 252 regulator-max-microvolt = <1800000>; 253}; 254 255&i2c2 { 256 clock-frequency = <400000>; 257 258 as3645a@30 { 259 #address-cells = <1>; 260 #size-cells = <0>; 261 reg = <0x30>; 262 compatible = "ams,as3645a"; 263 as3645a_flash: flash@0 { 264 reg = <0x0>; 265 flash-timeout-us = <150000>; 266 flash-max-microamp = <320000>; 267 led-max-microamp = <60000>; 268 ams,input-max-microamp = <1750000>; 269 }; 270 as3645a_indicator: indicator@1 { 271 reg = <0x1>; 272 led-max-microamp = <10000>; 273 }; 274 }; 275}; 276 277&i2c3 { 278 clock-frequency = <400000>; 279 280 lis302: lis302@1d { 281 compatible = "st,lis3lv02d"; 282 reg = <0x1d>; 283 284 Vdd-supply = <&vaux1>; 285 Vdd_IO-supply = <&vio>; 286 287 pinctrl-names = "default"; 288 pinctrl-0 = <&accelerator_pins>; 289 290 interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */ 291 292 /* click flags */ 293 st,click-single-x; 294 st,click-single-y; 295 st,click-single-z; 296 297 /* Limits are 0.5g * value */ 298 st,click-threshold-x = <8>; 299 st,click-threshold-y = <8>; 300 st,click-threshold-z = <10>; 301 302 /* Click must be longer than time limit */ 303 st,click-time-limit = <9>; 304 305 /* Kind of debounce filter */ 306 st,click-latency = <50>; 307 308 st,wakeup-x-hi; 309 st,wakeup-y-hi; 310 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */ 311 312 st,wakeup2-z-hi; 313 st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */ 314 315 st,highpass-cutoff-hz = <2>; 316 317 /* Interrupt line 1 for thresholds */ 318 st,irq1-ff-wu-1; 319 st,irq1-ff-wu-2; 320 /* Interrupt line 2 for click detection */ 321 st,irq2-click; 322 323 st,wu-duration-1 = <8>; 324 st,wu-duration-2 = <8>; 325 }; 326}; 327 328&mmc1 { 329 status = "disabled"; 330}; 331 332&mmc2 { 333 pinctrl-names = "default"; 334 pinctrl-0 = <&mmc2_pins>; 335 vmmc-supply = <&vemmc>; 336 bus-width = <4>; 337 ti,non-removable; 338}; 339 340&mmc3 { 341 status = "disabled"; 342}; 343 344/* RNG not directly accessible on N950/N9. */ 345&rng_target { 346 status = "disabled"; 347}; 348 349&usb_otg_hs { 350 interface-type = <0>; 351 usb-phy = <&usb2_phy>; 352 phys = <&usb2_phy>; 353 phy-names = "usb2-phy"; 354 mode = <3>; 355 power = <50>; 356}; 357 358&gpmc { 359 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ 360 361 onenand@0,0 { 362 #address-cells = <1>; 363 #size-cells = <1>; 364 compatible = "ti,omap2-onenand"; 365 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 366 367 /* 368 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported 369 * bootloader set values when booted with v4.19 using both N950 370 * and N9 devices (OneNAND Manufacturer: Samsung): 371 * 372 * gpmc cs0 before gpmc_cs_program_settings: 373 * cs0 GPMC_CS_CONFIG1: 0xfd001202 374 * cs0 GPMC_CS_CONFIG2: 0x00181800 375 * cs0 GPMC_CS_CONFIG3: 0x00030300 376 * cs0 GPMC_CS_CONFIG4: 0x18001804 377 * cs0 GPMC_CS_CONFIG5: 0x03171d1d 378 * cs0 GPMC_CS_CONFIG6: 0x97080000 379 */ 380 gpmc,sync-read; 381 gpmc,sync-write; 382 gpmc,burst-length = <16>; 383 gpmc,burst-read; 384 gpmc,burst-wrap; 385 gpmc,burst-write; 386 gpmc,device-width = <2>; 387 gpmc,mux-add-data = <2>; 388 gpmc,cs-on-ns = <0>; 389 gpmc,cs-rd-off-ns = <122>; 390 gpmc,cs-wr-off-ns = <122>; 391 gpmc,adv-on-ns = <0>; 392 gpmc,adv-rd-off-ns = <15>; 393 gpmc,adv-wr-off-ns = <15>; 394 gpmc,oe-on-ns = <20>; 395 gpmc,oe-off-ns = <122>; 396 gpmc,we-on-ns = <0>; 397 gpmc,we-off-ns = <122>; 398 gpmc,rd-cycle-ns = <148>; 399 gpmc,wr-cycle-ns = <148>; 400 gpmc,access-ns = <117>; 401 gpmc,page-burst-access-ns = <15>; 402 gpmc,bus-turnaround-ns = <0>; 403 gpmc,cycle2cycle-delay-ns = <0>; 404 gpmc,wait-monitoring-ns = <0>; 405 gpmc,clk-activation-ns = <10>; 406 gpmc,wr-data-mux-bus-ns = <40>; 407 gpmc,wr-access-ns = <117>; 408 409 gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */ 410 411 /* 412 * MTD partition table corresponding to Nokia's MeeGo 1.2 413 * Harmattan release. 414 */ 415 partition@0 { 416 label = "bootloader"; 417 reg = <0x00000000 0x00100000>; 418 }; 419 partition@1 { 420 label = "config"; 421 reg = <0x00100000 0x002c0000>; 422 }; 423 partition@2 { 424 label = "kernel"; 425 reg = <0x003c0000 0x01000000>; 426 }; 427 partition@3 { 428 label = "log"; 429 reg = <0x013c0000 0x00200000>; 430 }; 431 partition@4 { 432 label = "var"; 433 reg = <0x015c0000 0x1ca40000>; 434 }; 435 partition@5 { 436 label = "moslo"; 437 reg = <0x1e000000 0x02000000>; 438 }; 439 partition@6 { 440 label = "omap2-onenand"; 441 reg = <0x00000000 0x20000000>; 442 }; 443 }; 444}; 445 446&ssi_port1 { 447 pinctrl-names = "default", "idle"; 448 pinctrl-0 = <&ssi_pins>; 449 pinctrl-1 = <&ssi_pins_idle>; 450 451 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */ 452 453 modem: hsi-client { 454 pinctrl-names = "default"; 455 pinctrl-0 = <&modem_pins1 &modem_pins2>; 456 457 hsi-channel-ids = <0>, <1>, <2>, <3>; 458 hsi-channel-names = "mcsaab-control", 459 "speech-control", 460 "speech-data", 461 "mcsaab-data"; 462 hsi-speed-kbps = <96000>; 463 hsi-mode = "frame"; 464 hsi-flow = "synchronized"; 465 hsi-arb-mode = "round-robin"; 466 467 interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */ 468 469 gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */ 470 <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */ 471 <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */ 472 gpio-names = "cmt_apeslpx", 473 "cmt_rst_rq", 474 "cmt_en"; 475 }; 476}; 477 478&ssi_port2 { 479 status = "disabled"; 480}; 481 482&uart2 { 483 pinctrl-names = "default"; 484 pinctrl-0 = <&uart2_pins>; 485 486 bluetooth { 487 compatible = "ti,wl1271-bluetooth-nokia", "nokia,h4p-bluetooth"; 488 489 reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; /* 26 */ 490 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */ 491 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */ 492 493 clocks = <&vctcxo>; 494 clock-names = "sysclk"; 495 }; 496}; 497 498&aes1_target { 499 status = "disabled"; 500}; 501 502&aes2_target { 503 status = "disabled"; 504}; 505